CN203870558U - Main control chip for dynamic token system - Google Patents

Main control chip for dynamic token system Download PDF

Info

Publication number
CN203870558U
CN203870558U CN201420238352.6U CN201420238352U CN203870558U CN 203870558 U CN203870558 U CN 203870558U CN 201420238352 U CN201420238352 U CN 201420238352U CN 203870558 U CN203870558 U CN 203870558U
Authority
CN
China
Prior art keywords
clock
chip
dynamic token
main control
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201420238352.6U
Other languages
Chinese (zh)
Inventor
夏军虎
何友军
韩涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Synochip Data Security Technology Co ltd
Original Assignee
HANGZHOU SHENGYUAN CHIP TECHNIQUE CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANGZHOU SHENGYUAN CHIP TECHNIQUE CO Ltd filed Critical HANGZHOU SHENGYUAN CHIP TECHNIQUE CO Ltd
Priority to CN201420238352.6U priority Critical patent/CN203870558U/en
Application granted granted Critical
Publication of CN203870558U publication Critical patent/CN203870558U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A main control chip for a dynamic token system comprises a chip body, wherein a 32-bit RISCCPU, an AD conversion module, an LCD display module, a universal GPIO interface, a real-time clock module, two timers, an algorithm accelerator, an ROM (Read-only Memory), a memory unit, a power supply control unit, a reset generation unit and a clock generation clock unit are encapsulated on the chip body; the AD conversion module, the LCD display module, the universal GPIO interface, the real-time clock module, the two timers, the algorithm accelerator, the ROM (Read-only Memory), the memory unit, the power supply control unit, the reset generation unit and a clock generation clock unit are all connected with the RISCCPU. The main control chip for the dynamic token system has the benefits of simple function, high operation speed and low power consumption.

Description

A kind of main control chip for dynamic token system
Technical field
The utility model relates to a kind of main control chip for dynamic token system.
Background technology
Dynamic password is a kind of disposal password, and each password can only use once.Dynamic password can be in time, number of times and challenge information and change.Dynamic password has good security, is widely used in various information system.The application scenario of dynamic token is a lot of at present, mainly concentrate in the software systems that online game, Financial Software System, ERP software system, System Government Electronic Affairs, military system, VPN VPN (virtual private network) system, financial sector etc. have relatively high expectations to cryptosecurity, especially in financial sector, the use occasion of dynamic token is a lot, at present in financial sector, the main mode that adopts Free distribution, very strict to the cost requirement of dynamic token like this.It is reported, the dynamic cipher device year amount of purchase of industrial and commercial bank 2013 has exceeded 2,000 ten thousand, and the amount of purchase of the dynamic token in national financial sector exceeded 100,000,000 in 2013.If with 5 yuans of calculating of each dynamic token cost price, in annual financial sector, the purchase cost of dynamic token exceedes 500,000,000 yuans.The main control chip adopting in dynamic token is in the market mainly the mcu chip with Taiwan or Japan, mcu chip is not the special chip of dynamic token, so the many resources in chip are otiose, simultaneously mcu chip is not the special chip of dynamic token, so there is lower face phenomenon: 1. the function in MCU in dynamic token system, use less than; 2. in MCU, partial function is too complicated, requires simple in dynamic token system; 3. when requiring executing arithmetic in dynamic token, want fast, current mcu main flow is 8, in speed, is restricted.These have all affected function and the cost of dynamic token virtually.
The power consumption of the final system centered by chip of impact mainly contain be subject to below several factors affect: the logic gate number of design, the area of chip die, the method for designing of chip, chip is the method for operation when reality is used, and these all can have influence on the power consumption of final system.In current chip design, power consumption mainly comprises and is divided into dynamic power consumption and quiescent dissipation.Dynamic power consumption is mainly that the upset of level causes the power consumption that the impulse electricity of electric capacity causes, reduction dynamic power consumption can adopt the method for clock gate, stops the upset of signal to reduce dynamic power consumption by the clock of closing module.After quiescent dissipation refers to chip power, there is no the power consumption in transistor switch situation, be mainly derived from the leakage current of chip, the leakage current of chip is affected by transistorized type.
Dynamic token mainly contains three kinds of forms: time type, event mode, challenge/reply type.After the token of three kinds of forms all requires to power on, chip is always in there being electricity condition (seed information that after power down, chip algorithm uses can be lost), dynamic token in the market mainly adopts the lithium battery power supply of button shape, the electric energy of its storage is limited, therefore the power consumption that reduces dynamic token main control chip just can indirectly reduce the overall power of dynamic token, extends the service time (mainly relying on the power consumption of main control chip in the time of park mode and deep power down mode service time) of dynamic token.The power consumption that reduces chip is mainly in chip design, to adopt Low-power Technology, and Low-power Technology starts to be subject in actual applications extensive concern and development in the nineties in last century, and the benefit of low-power consumption also embodies gradually:
1, power-dissipation-reduced, has improved the reliability of circuit; Because temperature raises, electromigration increases, and temperature height can cause chip not worked to a certain extent;
2, reduced chip package cost; Chip power-consumption reduces can adopt more cheap encapsulating material;
3, reduce power consumption, extended the service time that adopts powered battery product, especially significant on the impact of the Related products such as handheld device.
Along with the development of technique, the especially technique below 0.18um processing procedure (130um, 90um, 45um etc.), it is increasing that quiescent dissipation accounts for the ratio of whole chip, and quiescent dissipation becomes an important indicator that affects chip overall power; Main way is the power supply of temporary transient no logical gate in chip to be turned off to (method that adopts power gate) according to the duty of chip at present, when use, opens again, can farthest reduce like this quiescent dissipation of chip.
The structure of mcu chip in the dynamic token adopting at present, see Fig. 1, comprise the module such as general MCU chip, POR & PDR, simulation benchmark provides the voltage of whole chip or the benchmark of electric current, clock has low-frequency clock and high frequency clock, and in dynamic token, MCU chip adopts the mode of LDO as power conversion unit at present; The analog module relating to has the analog module comprising in other modules of Lcd driver & lcd bias & POR & PDR & ADC & simulation benchmark &.
The various mode of operations of the dynamic token system that existing use mcu makes mainly contain park mode and normal mode of operation, dormancy decline low-power consumption depends on the clock (module that still will work under park mode still provides clock) of shutdown system, reduces chip system power consumption by the dynamic power consumption that reduces chip.The relevant action relating to when switching between park mode and mode of operation, is shown in Fig. 2.The token of three kinds of forms, the most of the time is to be all operated in park mode, especially challenge type token.
Time type: can be worth accordingly the dynamic password raw new from movable property according to shared secret and with date and the moment in sky in each minute.Authentication service is calculated a series of expection dynamic passwords according to shared secret and certain date/time value scope, and wherein said date/time value scope means and comprised the date/time value using on token.This can consider between token clock and service clock, cause token and service to lose any drift of synchronizeing.If one of dynamic password of service compute mates with the dynamic password receiving, user is by certification so.In each minute, token all will switch under 2 kinds of mode of operations.Time type dynamic token park mode and wake up between switch sequential chart, see Fig. 3, enter park mode and mainly rely on that CPU sends dormancy dependent instruction and request enters dormant state, wake up and depend on counter and automatically wake up within the time of setting, the dynamic token of time type enter park mode and wake up between blocked operation more frequent, at present time type token requires the process that per minute is at least carried out a dormancy and waken up.Under park mode, be mainly that clock by turning off correlation module makes Digital Logic enter pause mode, the upset that reduces signal by the frequency of closing the clock signal of operational module and reducing system clock reaches the object that reduces dynamic power consumption.
Event mode: as input, by calculating consistent password in HASH algorithm, event feature can be the Counter Value that user increases progressively while pressing the button on token at every turn by a certain specific event order and identical seed.Authentication service root Ju shared secret and this Counter Value calculate dynamic password scope, and wherein this Counter Value starts from last the known Counter Value on token.This has considered those button press that causes the dynamic password of the service that is not sent to (button-pushes).If one of dynamic password calculating in service matches with the dynamic password receiving, user is by checking.
Challenge/reply type: service end issues challenge code, dynamic token input challenge code, generates a random digit by dynamic token, and the numeral coupling that the random number of generation and service end generate is mated unanimously user and passed through checking.
Seemingly, dynamic token is in park mode the most of the time, needs just can to wake token up when use and enters mode of operation for the pattern photograph of event mode and challenge/reply type.Event mode, challenge/reply type token park mode and wake up between the sequential chart that switches, see Fig. 4, enter park mode and mainly rely on that CPU sends dormancy dependent instruction and request enters dormant state, wake up and rely on outside wake request (when needs by the external pin wake request of setting out).Event mode, challenge, reply the park mode of type token and wake up between the blocked operation token of comparing time type to reduce a lot, the dynamic token wake request signal that only just can set out when in use.The dynamic token overwhelming majority time is in dormant state, under park mode, be mainly that clock by turning off correlation module makes Digital Logic enter pause mode, the upset that reduces signal by the frequency of closing clock signal and reducing system clock reaches the object that reduces dynamic power consumption.
Summary of the invention
The utility model provides that a kind of function is simple, fast operation, the main control chip for dynamic token system that power consumption is little.
The technical solution adopted in the utility model is:
A kind of main control chip for dynamic token system, comprise chip body, it is characterized in that: on described chip body, be packaged with the RISC CPU of 32, AD modular converter, LCD display module, general GPIO interface, real-time clock module, 2 timers, algorithm accelerator, ROM, memory cell, power supply management control unit, reset generation unit, clock generation unit, described AD modular converter, LCD display module, general GPIO interface, real-time clock module, 2 timers, algorithm accelerator, ROM, memory cell, power supply management control unit, reset generation unit, clock generation unit is all connected with described RISC CPU.
Further, described memory cell comprises the kind subpool of data storage area, accelerator RAM and algorithm logic computing needs, and described accelerator RAM is connected with algorithm accelerator.
Further, the simulation part of the AD core of described AD modular converter is the voltage detecting mimic channel of individual 3.
Further, described clock generation unit is the clock of a 32768Hz, and its inside also includes the internal oscillator of a 500k that can switch with the clock of 32768Hz.When dormancy, adopt the clock of 32768Hz, when dynamic token work, be switched to internal oscillator.
Further, described LCD display module is connected with LCD driver module.
The utility model is by removing some unwanted resources in dynamic token system in general mcu chip, such as removing unnecessary POR & PDR unit, change 8 above analog to digital conversion circuits the analog to digital conversion circuit of 3 into, replace UART communication port to carry out the download of seed with general GPIO interface, adopt again the module of some low-power consumption, such as adopting the method for clock-gate, close the way of clock, reduce the power consumption of whole main control chip.And the utility model adopted the RISC CPU of 32, i.e. the reduced instruction central processing unit of 32, speed, instruction execution speed and dormancy when having improved executing arithmetic and wake up between switch speed.
Whole system (pin part forecloses) is divided four power domain by the utility model: Always on power domain, ROM power domain, LCD power domain and core power territory.Always on power domain charged region always after referring to and powering on, comprises the kind subpool (seed) of power supply management control unit (PMU controller), reset generation unit (RST generator), clock generation unit (clock generator) and algorithm logic computing needs; Wherein PMU controller part is controlled the power control logic of whole chip; RST generator is responsible for the reseting logic of chip system reset and modules; Clock generator is responsible for the system clock of chip and the clock generation logic of modules clock; The seed that seed area stores dynamic token uses, this part seed one is entered when programming, just can not lose, otherwise whole dynamic token is with regard to cisco unity malfunction.ROM power domain comprises ROM part, can turn off to reduce the power consumption of dynamic token chip system in chip system penetration depth park mode or park mode.LCD power domain comprises LCD display module and its corresponding LCD driver module (Driver), the power supply of LCD driver module is from the energization pins (VLCD) of outside LCD driver, the pin of LCD driver module is P_COM (4), P_SGE (32), P_VLCD3, P_VLCD2, P_VLCD1, P_C1, P_C2, it is powered from P_VLCD3, and chip system can be powered and be had or not the power consumption that farthest reduces LCD driver module by logic control simultaneously.Core power territory comprises algorithm accelerator, timer, general GPIO interface, AD modular converter, data storage area, accelerator RAM, can turn off to reduce the power consumption of dynamic token chip system in chip system penetration depth park mode or park mode.
The utility model is in order further to reduce power consumption, and the power supply of pin part also can optionally be turned off and further reduce power consumption.The pin of chip comprises that 16 general-purpose interface GPIO pins, 41 LCD display section pins, 2 clock pins, 7 relevant pins of power supply, 1 resetting pin, 1 outside wake pin up.Can mainly be divided into following components: power pins, clock and reset pin, general GPIO pin, the relevant pin of LCD, outside are waken dedicated pin up.Wherein general GPIO pin, the relevant pin of LCD and the outside dedicated pin of waking up can, by chip internal logic according to the connection of the mode of operation control power supply signal of dynamic token, reduce the overall power of chip by turn-offing the power supply of pin.
The beneficial effects of the utility model: function is simple, fast operation, power consumption are little.
Brief description of the drawings
Fig. 1 is the structural representation of the MCU chip in existing dynamic token system.
Fig. 2 is the relevant action schematic diagram relating to while switching between the park mode of the MCU chip in existing dynamic token system and mode of operation.
Fig. 3 be in existing dynamic token system time type token park mode and wake up between switch sequential chart.
Fig. 4 be event mode in existing dynamic token system, challenge/reply type token park mode and wake up between the sequential chart that switches.
Fig. 5 is structural representation of the present utility model.
Fig. 6 be time type token deep power down mode of the present utility model and wake up between switch sequential chart.
Fig. 7 be event mode of the present utility model, challenge/reply type token deep power down mode and wake up between the sequential chart that switches.
Embodiment
Below in conjunction with specific embodiment, the utility model is further described, but the utility model is not confined to these embodiments.One skilled in the art would recognize that the utility model contained all alternativess, improvement project and the equivalents that within the scope of claims, may comprise.
With reference to 5, a kind of main control chip for dynamic token system, comprise chip body, on described chip body, be packaged with the RISC CPU 1 of 32, AD modular converter 2, LCD display module 6, general GPIO interface 4, real-time clock module 3, 2 timers 5, algorithm accelerator 8, ROM12, memory cell, power supply management control unit 13, reset generation unit 14, clock generation unit 15, described AD modular converter 2, LCD display module 6, general GPIO interface 4, real-time clock module 3, 2 timers 5, algorithm accelerator 8, ROM12, memory cell, power supply management control unit 13, reset generation unit 14, clock generation unit 15 is all connected with described RISC CPU 1.
Described in the present embodiment, memory cell comprises the kind subpool 11 of data storage area 9, accelerator RAM10 and algorithm logic computing needs, and described accelerator RAM10 is connected with algorithm accelerator 8.
Described in the present embodiment, the simulation part of the AD core of AD modular converter 2 is the voltage detecting mimic channel of individual 3.
Described in the present embodiment, clock generation unit 14 is clocks of a 32768Hz, and its inside also includes the internal oscillator of a 500k that can switch with the clock of 32768Hz.When dormancy, adopt the clock of 32768Hz, when dynamic token work, be switched to internal oscillator.
Described in the present embodiment, LCD display module 6 is connected with LCD driver module 7.
The utility model is by removing some unwanted resources in dynamic token system in general mcu chip, such as removing unnecessary POR & PDR unit, change 8 above analog to digital conversion circuits the analog to digital conversion circuit of 3 into, replace UART communication port to carry out the download of seed with general GPIO interface 4, adopt again the module of some low-power consumption, such as adopting the method for clock-gate, close the way of clock, reduce the power consumption of whole main control chip.And the utility model adopted the RISC CPU 1 of 32, i.e. the reduced instruction central processing unit of 32, speed, instruction execution speed and dormancy when having improved executing arithmetic and wake up between switch speed.
Whole system (pin part forecloses) is divided four power domain by the utility model: Always on power domain, ROM power domain, LCD power domain and core power territory.Always on power domain charged region always after referring to and powering on, comprises power supply management control unit 13(PMU controller), reset generation unit 14(RST generator), clock generation unit 15(clock generator) and the kind subpool 11(seed of algorithm logic computing needs); Wherein PMU controller part is controlled the power control logic of whole chip; RST generator is responsible for the reseting logic of chip system reset and modules; Clock generator is responsible for the system clock of chip and the clock generation logic of modules clock; The seed that seed area stores dynamic token uses, this part seed one is entered when programming, just can not lose, otherwise whole dynamic token is with regard to cisco unity malfunction.ROM power domain comprises ROM part, can turn off to reduce the power consumption of dynamic token chip system in chip system penetration depth park mode or park mode.LCD power domain comprises LCD display module 6 and its corresponding LCD driver module 7(Driver), the power supply of LCD driver module 7 is from the energization pins (VLCD) of outside LCD driver, the pin of LCD driver module is P_COM (4), P_SGE (32), P_VLCD3, P_VLCD2, P_VLCD1, P_C1, P_C2, it is powered from P_VLCD3, and chip system can be powered and be had or not the power consumption that farthest reduces LCD driver module by logic control simultaneously.Core power territory comprises algorithm accelerator 8, timer 5, general GPIO interface 4, AD modular converter 2, data storage area 9, accelerator RAM10, can turn off to reduce the power consumption of dynamic token chip system in chip system penetration depth park mode or park mode.
The utility model is in order further to reduce power consumption, and the power supply of pin part also can optionally be turned off and further reduce power consumption.The pin of chip comprises that 16 general-purpose interface GPIO pins, 41 LCD display section pins, 2 clock pins, 7 relevant pins of power supply, 1 resetting pin, 1 outside wake pin up.Can mainly be divided into following components: power pins, clock and reset pin, general GPIO pin, the relevant pin of LCD, outside are waken dedicated pin up.Wherein general GPIO pin, the relevant pin of LCD and the outside dedicated pin of waking up can, by chip internal logic according to the connection of the mode of operation control power supply signal of dynamic token, reduce the overall power of chip by turn-offing the power supply of pin.
Carry out corresponding method of reducing power consumption explanation according to the dynamic token of different mode below.
Electrical source exchange relation under time type pattern: the function of the dynamic token of time type is that LCD display module shows dynamic code all the time, calculated a dynamic code every one minute, so corresponding function is switched the mode that can adopt below: close ROM power domain under deep power down mode, core power territory, turns off the power supply of general GPIO pin and turns off outside the pin powered that wakes pin up.Chip penetration depth park mode, the real-time clock of chip is in work, and LCD display module is in work; Under normal mode of operation, turn off the power supply of general GPIO pin, turn off outside and wake up the pin powered of pin, other parts power supplies are all opened, and enter normal mode of operation.
Event mode, challenge/the reply electrical source exchange relation under pattern formula: the function of event mode, challenge/the reply dynamic token of type is that computing is once in triggering computing for dynamic code, show dynamic code, the dynamic token chip system most of the time is all in deep sleep state simultaneously.The power supply of closing ROM power domain, LCD power domain, core power territory and turning off general GPIO pin under deep power down mode; Under normal mode of operation, open all power supplies and enter normal mode of operation.
The time type token deep power down mode of dynamic token chip and wake up between switch sequential chart, see Fig. 6, penetration depth park mode relies on CPU and sends dormancy dependent instruction and ask to enter dormant state, wake up and depend on counter and automatically wake up within the time of setting, the dynamic token penetration depth park mode of time type and wake up between blocked operation more frequent, at present time type token requires the process that per minute is at least carried out a dormancy and waken up.Deep power down mode decline low-power consumption mainly adopts the system clock frequency of wakeup logic when closing the not power supply of operational module (comprising unwanted pin powered) and reduce deep power down mode.It is charged that when system enters park mode, chip internal only has Always on region, and the electricity in other regions is turned off (comprising the power supply of pin part).
The switching of event mode dynamic token module and challenge/the reply power consumption mode of type dynamic token to hardware is similar.Event mode, challenge/reply type token deep power down mode and wake up between the sequential chart that switches, see Fig. 7, penetration depth park mode mainly relies on that CPU sends dormancy dependent instruction and request enters dormant state, wakes up and relies on outside wake request (need time wake pin up by outside send wake request).Event mode, challenge, reply the deep power down mode of type token and wake up between the blocked operation token of comparing time type to reduce a lot, the token wake request signal that only just can set out when in use.The token overwhelming majority time is in dormant state, and deep power down mode decline low-power consumption mainly adopts the system clock frequency of wakeup logic when closing not operational module (comprising unwanted pin powered) and reduction deep power down mode.It is charged that when system penetration depth park mode, chip internal only has Always on region, and the electricity in other regions is turned off (pin is except waking pin up in outside, and the power supply of other pin parts is also turned off).
For dynamic token, time is important factor of algorithm, so no matter be the associated token such as time type token or challenge type, under park mode or deep power down mode, clock all needs normally to work, in park mode, real-time clock module (RTC) is all wanted normally to work, and the relevant pin of RTC relating to also need to can normally be worked under park mode, can not turn-off the power supply of the relevant pin of RTC.And the power supply of the power domain of CPU relevant portion is turned off under deep power down mode.

Claims (5)

1. the main control chip for dynamic token system, comprise chip body, it is characterized in that: on described chip body, be packaged with the RISC CPU of 32, AD modular converter, LCD display module, general GPIO interface, real-time clock module, 2 timers, algorithm accelerator, ROM, memory cell, power supply management control unit, reset generation unit, clock generation unit, described AD modular converter, LCD display module, general GPIO interface, real-time clock module, 2 timers, algorithm accelerator, ROM, memory cell, power supply management control unit, reset generation unit, clock generation unit is all connected with described RISC CPU.
2. a kind of main control chip for dynamic token system according to claim 1, it is characterized in that: described memory cell comprises the kind subpool of data storage area, accelerator RAM and algorithm logic computing needs, and described accelerator RAM is connected with algorithm accelerator.
3. a kind of main control chip for dynamic token system according to claim 1 and 2, is characterized in that: the simulation part of the AD core of described AD modular converter is the voltage detecting mimic channel of individual 3.
4. a kind of main control chip for dynamic token system according to claim 3, is characterized in that: described clock generation unit is the clock of a 32768Hz, and its inside also includes the internal oscillator of a 500k that can switch with the clock of 32768Hz.
5. a kind of main control chip for dynamic token system according to claim 4, is characterized in that: described LCD display module is connected with LCD driver module.
CN201420238352.6U 2014-05-09 2014-05-09 Main control chip for dynamic token system Expired - Lifetime CN203870558U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420238352.6U CN203870558U (en) 2014-05-09 2014-05-09 Main control chip for dynamic token system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420238352.6U CN203870558U (en) 2014-05-09 2014-05-09 Main control chip for dynamic token system

Publications (1)

Publication Number Publication Date
CN203870558U true CN203870558U (en) 2014-10-08

Family

ID=51651489

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420238352.6U Expired - Lifetime CN203870558U (en) 2014-05-09 2014-05-09 Main control chip for dynamic token system

Country Status (1)

Country Link
CN (1) CN203870558U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016095555A1 (en) * 2014-12-15 2016-06-23 飞天诚信科技股份有限公司 Working method for multi-seed one-time password

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016095555A1 (en) * 2014-12-15 2016-06-23 飞天诚信科技股份有限公司 Working method for multi-seed one-time password
US10255421B2 (en) * 2014-12-15 2019-04-09 Feitian Technologies Co., Ltd. Working method for multi-seed one-time password

Similar Documents

Publication Publication Date Title
CN107515662B (en) Low-power-consumption management method in MCU chip for keying application
CN106055026B (en) Real time clock unit in a kind of microcontroller SOC
TWI475373B (en) Control device, control method, computer program product, and electronic device
GB2462046A (en) Dynamic processor power management device and method thereof
CN204926079U (en) Control integrated circuit board based on DSP and FPGA
CN106293005A (en) Reduce the system and method for MCU chip stand-by power consumption
CN204066009U (en) A kind of system of fingerprints reducing power consumption and complicacy
CN104111850A (en) Method and system for reducing power consumption of MCU (Micro-Control Unit)
CN103617475B (en) A kind of energy efficiency management system and method for micro remote tracker
CN203870558U (en) Main control chip for dynamic token system
Lallement et al. A 2.7 pJ/cycle 16MHz SoC with 4.3 nW power-off ARM Cortex-M0+ core in 28nm FD-SOI
CN106708642A (en) Watch dog timer used for MCU (Microprogrammed Control Unit) chip
CN206133459U (en) System for reduce MCU chip stand -by power consumption
CN106774788B (en) SOC based on MCU and kernel cooperation control unit thereof
CN206021129U (en) Real time clock unit in a kind of microcontroller SOC
CN202887096U (en) Central processing unit (CPU) reset circuit
CN204856116U (en) Multi -functional signal generator of pocket type
CN209336500U (en) A kind of battery management system and electric car applied to electric car
CN202351320U (en) Intelligent electric energy meter
CN202453804U (en) Long-time watchdog reset circuit
CN206162380U (en) Heterogeneous multi-core processor power consumption control device and heterogeneous multi-core processor system
CN203054999U (en) Centralized recharge device of electric energy meter
CN203689078U (en) Online performance monitoring device based on DSP
CN204256844U (en) Gas meter monitoring terminal
CN206411608U (en) A kind of computer motherboard power supply module

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee
CP01 Change in the name or title of a patent holder

Address after: Hangzhou City, Zhejiang province Yuhang District 311121 West Street Wuchang No. 998 Building 9 East

Patentee after: HANGZHOU SYNOCHIP DATA SECURITY TECHNOLOGY Co.,Ltd.

Address before: Hangzhou City, Zhejiang province Yuhang District 311121 West Street Wuchang No. 998 Building 9 East

Patentee before: Hangzhou Synochip Technologies Co.,Ltd.

CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20141008