CN203812534U - Drive circuit and display device including same - Google Patents
Drive circuit and display device including same Download PDFInfo
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- CN203812534U CN203812534U CN201420221932.4U CN201420221932U CN203812534U CN 203812534 U CN203812534 U CN 203812534U CN 201420221932 U CN201420221932 U CN 201420221932U CN 203812534 U CN203812534 U CN 203812534U
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- display screen
- driving circuit
- programmable logic
- data line
- logic device
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- 101000885321 Homo sapiens Serine/threonine-protein kinase DCLK1 Proteins 0.000 description 1
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- 238000006073 displacement reaction Methods 0.000 description 1
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Abstract
An embodiment of the utility model discloses a drive circuit and a display device including the drive circuit. The drive circuit comprises a microprocessor, a programmable logic device, a scanning line drive circuit, and a data line drive circuit. The programmable logic device converts image driving signals output by the microprocessor to digital driving signals, and outputs the signals to the scanning line drive circuit and the data line drive circuit. Thus, compared with drive circuits in the prior art, the drive circuit uses the programmable logic device to replace a time schedule controller circuit in the prior art. Since resolution ratio of the programmable logic device can be set according to different resolution requirement, the drive circuit can be applied to display screens in different resolutions, and versatility of the device is good.
Description
Technical field
The utility model relates to display technique field, relates in particular to a kind of driving circuit and comprises the display device of this driving circuit.
Background technology
Organic light emitting diode display, OLED display, relies on its autoluminescence, fast response time, operating voltage is low, and plate thickness is little, and working temperature interval is wide, and visual angle is wide, can make the many merits such as the flexible panel of large scale, gather around and have broad application prospects, be current display technique of greatest concern.Wherein, active matrix organic light-emitting diode display technique, AMOLED display technique, is considered to display technique of future generation.
For the correct AMOLED display screen that drives, except exact connect ion drives each pin of chip, also need to utilize time schedule controller for driving chip that suitable control signal is provided, in prior art, in LCD and OLED display products, time schedule controller mainly contains two kinds: a kind of is using time schedule controller as a module and line driving chip (being scanning line driving chip), row drive chip (being that data line drives chip) and power supply buck module integration in a chip; Another kind is that time schedule controller is as an independently timing controller existence.Wherein, time schedule controller, line driving chip and row drive integrated chip in same driving chip, as the driving circuit of display screen, are more conducive to integratedly, and advantage is more obvious.
But driving circuit of the prior art, when being applied to the display screen of different resolution, need to be made the circuit structure matching with it again, cause in prior art the versatility of driving circuit poor.
Utility model content
For solving the problems of the technologies described above, the utility model embodiment provides a kind of driving circuit and has comprised the display device of this driving circuit, to improve the versatility of described driving circuit.
For addressing the above problem, the utility model embodiment provides following technical scheme:
A driving circuit, is applied to display screen, comprising:
Microprocessor, for described display screen provides the image-driven signal that shows image;
Programmable logic device (PLD), the input end of described programmable logic device (PLD) is connected with described microprocessor, described image-driven signal is converted to digital drive signals and exports, wherein, described digital drive signals comprises sweep trace digital drive signals and data line digital drive signals;
Scan line drive circuit, the input end of described scan line drive circuit is connected with the sweep trace output terminal of described programmable logic device (PLD), output terminal is connected with the sweep trace of display screen, and described sweep trace digital drive signals is converted to sweep trace electric drive signal, offers the sweep trace in display screen;
Data line drive circuit, the input end of described data line drive circuit is connected with the data line output terminal of described programmable logic device (PLD), output terminal is connected with the data line of display screen, and described data line digital drive signals is converted to data line electric drive signal, offers the data line in display screen.
Preferably, described programmable logic device (PLD) is CPLD.
Preferably, described programmable logic device (PLD) is FPGA.
Preferably, described driving circuit also comprises: for described driving circuit provides the power circuit of operating voltage.
Preferably, described display screen is AMOLED display screen, described driving circuit also comprises: frequency multiplier circuit, and the output signal frequency of described microprocessor is double, two horizontal scanning lines in the corresponding described display screen of a line image-driven signal that described microprocessor is exported.
A display device, comprising: display screen and for described display screen provides the driving circuit that drives signal, wherein, described driving circuit is the driving circuit described in above-mentioned any one.
Preferably, when described display device is AMOLED display device, also comprise: frequency multiplier circuit, the output signal frequency of described microprocessor is double, two horizontal scanning lines in the corresponding described display screen of a line image-driven signal that described microprocessor is exported.
Compared with prior art, technique scheme has the following advantages:
The technical scheme that the utility model embodiment provides, comprise: microprocessor, programmable logic device (PLD), scan line drive circuit and data line drive circuit, wherein, described programmable logic device (PLD) is converted to digital drive signals by the image-driven signal of described microprocessor output, exports to scan line drive circuit and data line drive circuit.As can be seen here, compared to technical scheme of the prior art, the technical scheme that the utility model embodiment provides, utilize programmable logic device (PLD) to substitute time schedule controller circuit of the prior art, because described programmable logic device (PLD) can arrange its resolution parameter according to different resolution demand, thus the driving circuit that the utility model embodiment is provided, the display screen that can be applied to various resolution, versatility is stronger.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
The structural representation that Fig. 1 is the driving circuit that provides in embodiment of the utility model;
The structural representation that Fig. 2 is the driving circuit that provides in another embodiment of the utility model;
The structural representation that Fig. 3 is the driving circuit that provides in another embodiment of the utility model;
The structural representation that Fig. 4 is the driving circuit that provides in another embodiment of the utility model.
Embodiment
Just as described in the background section, driving circuit of the prior art, when being applied to the display screen of different resolution, need to be made the circuit structure matching with it again, causes in prior art the versatility of driving circuit poor.
Inventor studies discovery, this is mainly time schedule controller circuit (the TCON IC due to prior art, Timing Controller) belong to ASIC (Application Specific Integrated Circuit, be special object and designing integrated circuit) a kind of, inner frequency dividing circuit is limited, cannot make a large amount of modifications, can only be by selecting pin, limited resolution circuit is set, thereby cause time schedule controller of the prior art can only support several resolution at most, time sequence parameter is non-adjustable, cause driving circuit of the prior art when being applied to the display screen of different resolution, need to again make the circuit structure matching with it, cause in prior art the versatility of driving circuit poor.
In view of this, the utility model embodiment provides a kind of driving circuit, is applied to display screen, comprising:
Microprocessor, for described display screen provides the image-driven signal that shows image;
Programmable logic device (PLD), the input end of described programmable logic device (PLD) is connected with described microprocessor, described image-driven signal is converted to digital drive signals and exports, wherein, described digital drive signals comprises sweep trace digital drive signals and data line digital drive signals;
Scan line drive circuit, the input end of described scan line drive circuit is connected with the sweep trace output terminal of described programmable logic device (PLD), output terminal is connected with the sweep trace of display screen, and described sweep trace digital drive signals is converted to sweep trace electric drive signal, offers the sweep trace in display screen;
Data line drive circuit, the input end of described data line drive circuit is connected with the data line output terminal of described programmable logic device (PLD), output terminal is connected with the data line of display screen, and described data line digital drive signals is converted to data line electric drive signal, offers the data line in display screen.
As can be seen here, compared to driving circuit of the prior art, the driving circuit that the utility model embodiment provides, utilize programmable logic device (PLD) to substitute time schedule controller circuit of the prior art, because described programmable logic device (PLD) can, according to different resolution demand, arrange its resolution parameter, and be not limited only to several resolution, thereby make the driving circuit in the utility model embodiment technical scheme, can be applied to the display screen of various resolution, versatility is stronger.
For above-mentioned purpose of the present utility model, feature and advantage can more be become apparent, below in conjunction with accompanying drawing, embodiment of the present utility model is described in detail.
Set forth detail in the following description so that fully understand the utility model.But the utility model can be different from alternate manner described here and implements with multiple, and those skilled in the art can do similar popularization without prejudice to the utility model intension in the situation that.Therefore the utility model is not subject to the restriction of following public concrete enforcement.
As shown in Figure 1, the utility model embodiment provides a kind of driving circuit, is applied to display screen 5, comprising:
Microprocessor 1, for described display screen 5 provides the image-driven signal that shows image;
Programmable logic device (PLD) 2, the input end of described programmable logic device (PLD) 2 is connected with described microprocessor 1, described image-driven signal is converted to digital drive signals and exports, wherein, described digital drive signals comprises sweep trace digital drive signals and data line digital drive signals;
Scan line drive circuit 3, the input end of described scan line drive circuit 3 is connected with the sweep trace output terminal of described programmable logic device (PLD) 2, output terminal is connected with the sweep trace of display screen 5, described sweep trace digital drive signals is converted to sweep trace electric drive signal, offers the sweep trace in display screen 5;
Data line drive circuit 4, the input end of described data line drive circuit 4 is connected with the data line output terminal of described programmable logic device (PLD) 2, output terminal is connected with the data line of display screen 5, described data line digital drive signals is converted to data line electric drive signal, offers the data line in display screen 5.
Concrete, described microprocessor 1 is preferably micro-control unit MCU (being Micro Control Unit), then by following the interface of rgb interface sequential, be connected with described programmable logic device (PLD) 2, by the image-driven signal of described microprocessor 1 output, convert logic control signal to, be digital drive signals, export to described scan line drive circuit 3 and data line drive circuit 4.
In an embodiment of the present utility model, as shown in Figure 2, the signal that described programmable logic device (PLD) 2 input ends receive comprises: data clock signal DCLK, frame synchronizing signal (being data line synchronizing signal) VSYNC, line synchronizing signal (being sweep trace synchronizing signal) HSYNC and data enable signal DE, thereby can show data by catching the rising and falling edges displacement of described frame synchronizing signal (being data line synchronizing signal) VSYNC and data enable signal DE, the sweep trace commencing signal DIO of described data line drive circuit 4 is controlled in output, data output enable signal LD, the clock signals such as the frame start signal STV of gated sweep line drive circuit 3.
Therefore, the driving circuit that the utility model embodiment provides, only need arrange the difference switching that sweep trace can meet multiresolution synchronizing cycle, and corresponding resolution is only switched and need in programmable logic device (PLD) 2, be revised resolution parameter.
In an embodiment of the present utility model, described programmable logic device (PLD) 2 is complex programmable logic device (CPLD) (Complex Programable Logic Device), in another embodiment of the present utility model, described programmable logic device (PLD) 2 is field programmable logic device FPGA (being Field-Programmable Gate Array), the utility model does not limit this, specifically depends on the circumstances.
Because LCD and AMOLED are all rgb interface sequential, therefore, the driving circuit that the utility model embodiment provides, is not only applicable to LCD display, also be applicable to AMOLED display screen, and do not need described microprocessor 1 and programmable logic device (PLD) 2 to modify.It should be noted that, because the type of drive of LCD display is overturn for putting, row upset or face upset, it requires the polarity between neighbor contrary, and AMOLED does not require that the polarity between neighbor is contrary, when therefore the driving circuit providing as the utility model embodiment is applied to AMOLED display screen, described driving circuit also comprises: frequency multiplier circuit 6, the output signal frequency of described microprocessor 1 is double, make two horizontal scanning lines in the corresponding described display screen 5 of a line image-driven signal of described microprocessor 1 output, so that described microprocessor 1 and programmable logic device (PLD) 2 both can be for the drivings of LCD display, again can be for the driving of described AMOLED display screen, applied widely, highly versatile.
It should be noted that, it (is Phase Locked Loop that described frequency multiplier circuit 6 is preferably PLL, phaselocked loop), and described frequency multiplier circuit 6 can arrange separately, as shown in Figure 3, also can be integrated in described programmable logic device (PLD) 2, as shown in Figure 4, the utility model does not limit this, specifically depends on the circumstances.
On the basis of above-mentioned arbitrary embodiment, the driving circuit that the utility model embodiment provides also comprises: for described driving circuit provides the power circuit of operating voltage, to guarantee that described driving circuit can normally work.
As from the foregoing, the driving circuit that the utility model embodiment provides, without upgrading, applicable to the display screen 5 of different resolution, to complete the upgrading of display screen 5, improve the display effect of display screen 5, versatility is stronger, thereby shorten the design cycle of display screen 5, accelerate the listing progress of product, reduce difficulty and cost that client upgrades and switches.
Accordingly, the utility model embodiment also provides a kind of display device, comprising: display screen and for described display screen provides the driving circuit that drives signal, wherein, the driving circuit of described driving circuit for providing in above-mentioned arbitrary embodiment.
In the utility model embodiment, described display screen can be LCD display, can be also AMOLED display screen, and the utility model does not limit this, specifically depends on the circumstances.It should be noted that, because the type of drive of LCD display is overturn for putting, row upset or face upset, it requires the polarity between neighbor contrary, and AMOLED display screen does not require that the polarity between neighbor is contrary, therefore in the display device that the utility model embodiment provides, when described display screen is AMOLED display screen, described driving circuit also comprises: frequency multiplier circuit, the output signal frequency of described microprocessor is double, two horizontal scanning lines in the corresponding described display screen of a line image-driven signal that described microprocessor is exported, so that described microprocessor and programmable logic device (PLD) both can be for the drivings of LCD display, again can be for the driving of described AMOLED display screen, applied widely, highly versatile.
Also it should be noted that, described frequency multiplier circuit is preferably PLL (being Phase Locked Loop, phaselocked loop), and described frequency multiplier circuit can arrange separately, can be integrated in described programmable logic device (PLD), the utility model does not limit this, specifically depends on the circumstances yet.
In sum, the driving circuit that the utility model embodiment provides, comprise: microprocessor, programmable logic device (PLD), scan line drive circuit and data line drive circuit, wherein, described programmable logic device (PLD) is converted to digital drive signals by the image-driven signal of described microprocessor output, exports to scan line drive circuit and data line drive circuit.As can be seen here, compared to technical scheme of the prior art, the driving circuit that the utility model embodiment provides, utilize programmable logic device (PLD) to substitute time schedule controller circuit of the prior art, because described programmable logic device (PLD) can, according to different resolution demand, arrange its resolution parameter, thereby make the driving circuit in the utility model embodiment, without upgrading, can be applicable to the display screen of various resolution, versatility is stronger.
In this instructions, various piece adopts the mode go forward one by one to describe, and each part stresses is the difference with other parts, between various piece identical similar part mutually referring to.
Above-mentioned explanation to the disclosed embodiments, makes professional and technical personnel in the field can realize or use the utility model.To the multiple modification of these embodiment, will be apparent for those skilled in the art, General Principle as defined herein can, in the situation that not departing from spirit or scope of the present utility model, realize in other embodiments.Therefore, the utility model will can not be restricted to embodiment illustrated herein, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (7)
1. a driving circuit, is applied to display screen, it is characterized in that, comprising:
Microprocessor, for described display screen provides the image-driven signal that shows image;
Programmable logic device (PLD), the input end of described programmable logic device (PLD) is connected with described microprocessor, described image-driven signal is converted to digital drive signals and exports, wherein, described digital drive signals comprises sweep trace digital drive signals and data line digital drive signals;
Scan line drive circuit, the input end of described scan line drive circuit is connected with the sweep trace output terminal of described programmable logic device (PLD), output terminal is connected with the sweep trace of display screen, and described sweep trace digital drive signals is converted to sweep trace electric drive signal, offers the sweep trace in display screen;
Data line drive circuit, the input end of described data line drive circuit is connected with the data line output terminal of described programmable logic device (PLD), output terminal is connected with the data line of display screen, and described data line digital drive signals is converted to data line electric drive signal, offers the data line in display screen.
2. driving circuit according to claim 1, is characterized in that, described programmable logic device (PLD) is CPLD.
3. driving circuit according to claim 1, is characterized in that, described programmable logic device (PLD) is FPGA.
4. according to the driving circuit described in claim 1-3 any one, it is characterized in that, described driving circuit also comprises: for described driving circuit provides the power circuit of operating voltage.
5. driving circuit according to claim 4, is characterized in that, described display screen is AMOLED display screen, and described driving circuit also comprises:
Frequency multiplier circuit, the output signal frequency of described microprocessor is double, two horizontal scanning lines in the corresponding described display screen of a line image-driven signal that described microprocessor is exported.
6. a display device, is characterized in that, comprising: display screen and for described display screen provides the driving circuit that drives signal, wherein, described driving circuit is the driving circuit described in claim 1-4 any one.
7. display device according to claim 6, it is characterized in that, when described display device is AMOLED display device, also comprise: frequency multiplier circuit, the output signal frequency of described microprocessor is double, two horizontal scanning lines in the corresponding described display screen of a line image-driven signal that described microprocessor is exported.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420221932.4U CN203812534U (en) | 2014-04-30 | 2014-04-30 | Drive circuit and display device including same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420221932.4U CN203812534U (en) | 2014-04-30 | 2014-04-30 | Drive circuit and display device including same |
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| Publication Number | Publication Date |
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| CN203812534U true CN203812534U (en) | 2014-09-03 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420221932.4U Expired - Lifetime CN203812534U (en) | 2014-04-30 | 2014-04-30 | Drive circuit and display device including same |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108091296A (en) * | 2018-01-17 | 2018-05-29 | 合肥惠科金扬科技有限公司 | A kind of display driver circuit, method and display device |
| CN111142670A (en) * | 2019-12-29 | 2020-05-12 | 青岛歌尔声学科技有限公司 | VR glasses and signal processing method, device and medium thereof |
| CN111369930A (en) * | 2020-04-15 | 2020-07-03 | 昆山迈致治具科技有限公司 | Display screen driving board, display screen driving system and driving method |
-
2014
- 2014-04-30 CN CN201420221932.4U patent/CN203812534U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108091296A (en) * | 2018-01-17 | 2018-05-29 | 合肥惠科金扬科技有限公司 | A kind of display driver circuit, method and display device |
| CN111142670A (en) * | 2019-12-29 | 2020-05-12 | 青岛歌尔声学科技有限公司 | VR glasses and signal processing method, device and medium thereof |
| CN111369930A (en) * | 2020-04-15 | 2020-07-03 | 昆山迈致治具科技有限公司 | Display screen driving board, display screen driving system and driving method |
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Granted publication date: 20140903 |