CN203801035U - Decoder with BNC output - Google Patents
Decoder with BNC output Download PDFInfo
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- CN203801035U CN203801035U CN201320815604.2U CN201320815604U CN203801035U CN 203801035 U CN203801035 U CN 203801035U CN 201320815604 U CN201320815604 U CN 201320815604U CN 203801035 U CN203801035 U CN 203801035U
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- decoder
- bnc
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- interface
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Abstract
The utility model provides a decoder with BNC output, and the decoder comprises a decoder mainboard and a BNC interface board connected with the output end of the decoder mainboard. The decoder mainboard comprises a network subsystem, a Calpella platform subsystem, and a decoding output subsystem, wherein the network subsystem, the Calpella platform subsystem and the decoding output subsystem are sequentially coupled through PCIE interfaces. The decoder provided by the utility model enables a front-end code stream to be decoded through a central processor (CPU), enables the front-end code stream to be converted into BNC analog data through a BNC output logic unit and a digital-analog converter, and enables the front-end code stream to be outputted from a BNC interface and displayed.
Description
Technical field
The utility model relates to technical field of video monitoring, particularly a kind of decoder with BNC output.
Background technology
Omnipotent decoder is integrated decoder and separator is to carry out to the encoding device of all kinds of safety monitoring manufacturer the video-audio decoder of network decoding.
The decoding device of current safety defense monitoring system is divided into two kinds substantially: embedded decoder and soft decoding server.
The major function of embedded decoder is that the video that Internet Transmission is come carries out the work of decoding on-wall in networking monitoring project.It is mainly by ARM main control chip, DSP(microprocessor) etc. the decoding of special-purpose decoding chip, and by BNC(Bayonet Nut Connector, bayonet nut connector) interface output.Especially, described bnc interface is a kind of connector for coaxial cable
Mainly being formed by a PC mainboard and polylith video card of soft decoding server.Described PC mainboard operation windows operating system.Described soft decoding server is only supported the main flow interfaces such as VGA, DVI conventionally, and does not support bnc interface.
Utility model content
The purpose of this utility model is to provide a kind of decoder of the BNC of having output, does not support the problem of bnc interface to solve soft decoding server in the decoding device of existing safety defense monitoring system.
For solving the problems of the technologies described above, the utility model provides a kind of decoder of the BNC of having output, comprising: decoder mainboard and the bnc interface plate being connected with described decoder mainboard output; Wherein,
Described decoder mainboard comprises network subsystem, Calpella platform subsystem and the decoding output subsystem being coupled successively by PCIE interface.
Preferably, in the described decoder with BNC output, described network subsystem comprises front end code stream and the network interface card being connected with described front end code stream by RJ45 interface.
Preferably, in the described decoder with BNC output, described Calpella platform subsystem comprises central processing unit, provides the internal storage location and the south bridge being connected with described central processing unit by FDI interface and DMI interface of internal memory for described central processing unit.
Preferably, in the described decoder with BNC output, described decoding output subsystem comprises BNC output logic unit and the digital to analog converter being connected with described BNC output logic unit.
Preferably, in the described decoder with BNC output, described decoding output subsystem comprises two BNC output logic unit inputs, the corresponding eight way weighted-voltage D/A converter outputs in each BNC output logic unit.
Preferably, in the described decoder with BNC output, also comprise the power supply, fan and the LED light panel that are connected respectively with described decoder mainboard.
The decoder with BNC output that the utility model provides, there is following beneficial effect: the utility model is decoded top end stops stream by central processing unit (CPU) after, by BNC output logic unit and digital to analog converter, convert BNC analogue data to, finally from bnc interface plate output display.
Accompanying drawing explanation
Fig. 1 is the schematic diagram that the utlity model has the decoder of BNC output;
Fig. 2 is the decoder mainboard schematic diagram that the utlity model has the decoder of BNC output;
Fig. 3 is the BNC hardware logic diagram that the utlity model has the decoder of BNC output.
Embodiment
Below in conjunction with the drawings and specific embodiments, the decoder with BNC output the utility model proposes is described in further detail.According to the following describes and claims, advantage of the present utility model and feature will be clearer.It should be noted that, accompanying drawing all adopts very the form of simplifying and all uses non-ratio accurately, only in order to convenient, the object of aid illustration the utility model embodiment lucidly.
As shown in Figure 1, the utility model provides a kind of decoder of the BNC of having output, based on WindowsXP Embedded operating system, having realized BNC decoding shows, specifically comprise: decoder mainboard 11 and the bnc interface plate 12 being connected with described decoder mainboard 11 outputs, further comprise the power supply 13, fan 14 and the LED light panel 15 that are connected respectively with described decoder mainboard 11.
As shown in Figure 2, further illustrate the framework of decoder mainboard.Described decoder mainboard comprises network subsystem 21, Calpella platform subsystem 22 and the decoding output subsystem 23 of coupling successively.Between described network subsystem 21, Calpella platform subsystem 22 and decoding output subsystem 23, by PCIE interface, be connected.
Concrete, the medium of described network subsystem 21 for transmitting as data, calls interface that driving provides network code is circulated in system to realize decoding.Described network subsystem 21 specifically comprises front end code stream 211 and the network interface card 212 being connected with described front end code stream 211 by RJ45 interface 222.
Preferably, to select model be the network interface card of RTL8111D to described network interface card 212.
Further, described Calpella platform subsystem 22 is cores of whole system, for realizing decoding.Described Calpella platform subsystem 22 specifically comprises central processing unit (CPU) 221, is the internal storage location 222 and the south bridge (PCH) 225 being connected with described central processing unit (CPU) 221 by FDI interface 223 and DMI interface 224 that described central processing unit (CPU) 221 provides internal memory.
Preferably, described central processing unit (CPU) 221 uses the Arrandale CPU of Intel, is mainly responsible for the start-up and operation of operating system and application program, guarantees the system call of whole equipment.
Preferably, described internal storage location 222 is selected DDR3, for the operation of system and application program provides internal memory.
Concrete, the main implementation platform of described south bridge (PCH, platform controller hub) 225 is controlled, and the peripheral interface of some low speed is provided, and comprises USB, SATA, SPI, SMBus, HAD, PCIE, LPC etc.
Concrete, between described central processing unit 221 and described south bridge 225, by FDI interface 223 and 224 two kinds of modes of DMI interface, transmitting, described FDI interface 223 is responsible for transmission data, and described DMI interface 224 is responsible for transmission video signal.
Further, described decoding output subsystem 23, for decoded code stream being converted to BNC output, specifically comprises BNC output logic unit 231 and the digital to analog converter 232 being connected with described BNC output logic unit 231.
Preferably, CX25821 chip is selected in described BNC output logic unit 231.
Preferably, to select model be the digital to analog converter of SAA7121H to described digital to analog converter 232.
Concrete, by CX25821, the code stream in PCIE bus is changed into BT.656 and then via SAA7121, change into BNC and export.
Based on this, described decoder mainboard adopts X86-based Calpella platform, and the front end code stream that network is come in is used CPU to decode, and then decoded data is sent into BNC output logic unit via PCH, changes into BNC export by SAA7121.
Further as shown in Figure 3, described decoding output subsystem comprises two BNC output logic unit inputs, the corresponding eight way weighted-voltage D/A converter outputs in each BNC output logic unit.After CPU decoded bit stream, data after decoding are sent into south bridge, and by the PCIE interface providing, code stream is changed into relevant video standard by peripheral chip and export.Especially, 8 road BNC outputs are supported in a BNC output logic unit, adopt many BNC output logic unit, support a plurality of BNC output.
Foregoing description is only the description to the utility model preferred embodiment; the not any restriction to the utility model scope; any change, modification that the those of ordinary skill in the utility model field is done according to above-mentioned disclosure, all belong to the protection range of claims.
Claims (6)
1. a decoder with BNC output, is characterized in that, comprising: decoder mainboard and the bnc interface plate being connected with described decoder mainboard output; Wherein,
Described decoder mainboard comprises network subsystem, Calpella platform subsystem and the decoding output subsystem being coupled successively by PCIE interface.
2. the decoder with BNC output as claimed in claim 1, is characterized in that, described network subsystem comprises front end code stream and the network interface card being connected with described front end code stream by RJ45 interface.
3. the decoder with BNC output as claimed in claim 1, it is characterized in that, described Calpella platform subsystem comprises central processing unit, provides the internal storage location and the south bridge being connected with described central processing unit by FDI interface and DMI interface of internal memory for described central processing unit.
4. the decoder with BNC output as claimed in claim 1, is characterized in that, described decoding output subsystem comprises BNC output logic unit and the digital to analog converter being connected with described BNC output logic unit.
5. the decoder with BNC output as claimed in claim 4, is characterized in that, described decoding output subsystem comprises two BNC output logic unit inputs, the corresponding eight way weighted-voltage D/A converter outputs in each BNC output logic unit.
6. as the decoder with BNC output as described in arbitrary in claim 1-5, it is characterized in that, also comprise the power supply, fan and the LED light panel that are connected respectively with described decoder mainboard.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320815604.2U CN203801035U (en) | 2013-12-10 | 2013-12-10 | Decoder with BNC output |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201320815604.2U CN203801035U (en) | 2013-12-10 | 2013-12-10 | Decoder with BNC output |
Publications (1)
Publication Number | Publication Date |
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CN203801035U true CN203801035U (en) | 2014-08-27 |
Family
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Family Applications (1)
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CN201320815604.2U Expired - Fee Related CN203801035U (en) | 2013-12-10 | 2013-12-10 | Decoder with BNC output |
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CN (1) | CN203801035U (en) |
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2013
- 2013-12-10 CN CN201320815604.2U patent/CN203801035U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140827 Termination date: 20211210 |