CN203801002U - Synchronization scanning circuit system based on PLL and DDS - Google Patents
Synchronization scanning circuit system based on PLL and DDS Download PDFInfo
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- CN203801002U CN203801002U CN201320883713.8U CN201320883713U CN203801002U CN 203801002 U CN203801002 U CN 203801002U CN 201320883713 U CN201320883713 U CN 201320883713U CN 203801002 U CN203801002 U CN 203801002U
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- 230000001360 synchronised effect Effects 0.000 claims description 71
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- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
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- 238000011084 recovery Methods 0.000 claims description 2
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- 238000010586 diagram Methods 0.000 description 7
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Abstract
The utility model provides a synchronization scanning circuit system based on PLL and DDS; the synchronization scanning circuit system comprises a trigger laser and a lens; the trigger laser is divided into two paths by the lens; an optical path of one trigger laser path is provided with a synchronization scanning streak camera; an optical path of the other trigger laser path is provided with a photoelectric converter and a synchronization scanning circuit; a trigger signal is converted by the photoelectric converter into an electric impluse signal entering a trigger input end of the synchronization scanning circuit. The synchronization scanning circuit system based on PLL and DDS mainly solves the problems that a simulation oscillation circuit is complex, low in integrated level, and narrow in synchronization tracking scope.
Description
Technical field
The utility model relates to high speed photography field, relates in particular to a kind of synchronous scanning streak camera scanning circuit system.
Background technology
Synchronous scanning circuit system is the important component part of synchronous scanning streak camera, and its function composing and index performance are directly connected to the performance of synchronous scanning streak camera complete machine.Synchronous scanning circuit system is mainly to provide synchronous and the adjustable sinusoidal deflecting voltage of phase place for scan deflection plate, generally by synchronous sinusoidal signal, produced, the functional units such as phase place adjustment, radiofrequency signal amplification, impedance matching form, and wherein synchronous sinusoidal signal generation is the key of synchronous scanning circuit system.The synchronous sinusoidal signal production method generally adopting in the world is at present the oscillating circuit method based on avalanche photodide and tunnel diode, and this Analog Circuit Design method circuit complexity, debug difficulties, synchronously following range is narrow.
Utility model content
In order to solve existing technical problem in background technology, the utility model provides a kind of synchronous scanning circuit system based on PLL and DDS, has mainly solved simulation oscillating circuit complexity, the narrow problem of low, the synchronous following range of integrated level.
Technical solution of the present utility model is: the synchronous scanning circuit system based on PLL and DDS, it is characterized in that: comprise and trigger laser 1, lens 2, trigger laser 1 and be divided into two-way by lens 2, wherein in the light path of a road triggering laser, synchronous scanning streak camera 4 is set; In the light path of another road triggering laser, optical-electrical converter 5 and synchronous scanning circuit 9 are set, triggering signal, through optical-electrical converter 5, is converted into electric impulse signal, enters the triggering input of synchronous scanning circuit 9.
Above-mentioned synchronous scanning circuit 9 comprises that the synchronous sinusoidal signal connecting successively produces circuit 6, rf signal amplification circuit 7 and impedance matching circuit 8; Impedance matching circuit 8 is connected with synchronous scanning streak camera 4.
Synchronous sinusoidal signal produces circuit 6 and comprises phase-locked loop 61 and Direct Digital Frequency Synthesizers 62, the synchronous electric impulse signal that triggers is divided into two-way, one tunnel enters phase-locked loop 61 reference inputs, 61 pairs of input signal lockings of phase-locked loop, frequency multiplication, the frequency-doubled signal of output is as the clock signal of Direct Digital Frequency Synthesizers 62, regulate the frequency control word of Direct Digital Frequency Synthesizers 62, make the sinusoidal signal of its output and triggering signal same frequency; Electric impulse signal incoming frequency detecting unit 63 is triggered on another road, detects the frequency of triggering signal, realizes synchronous sinusoidal signal produce circuit 6 from motion tracking and locking according to the triggering signal frequency values detecting.
Synchronous sinusoidal signal produces circuit 6 and also comprises control unit 64, and control unit 64 carries out parameter configuration according to detected triggering signal frequency to phase-locked loop 64 and Direct Digital Frequency Synthesizers 62.
Said frequencies detecting unit 63 is clock recovery chips.
The utility model has the advantages that: PLL and DDS have high-performance, reliability high as Frequency Synthesis Techniques, and wherein PLL can realize the tracking of input reference signal and locking, and locking bandwidth can be very wide by selecting suitable voltage controlled oscillator; DDS not only can realize high-precision sinusoidal signal by suitable parameter configuration and export, and also has phase of output signal and adjusts function.In conjunction with function separately of PLL and DDS and feature as synchronous scanning circuit sine wave generator and phase-adjusted scheme, not only improved greatly the integrated level of synchronous scanning circuit, reduce design difficulty, also realized the triggering signal of synchronous scanning circuit from motion tracking and lock function.
In order further to improve synchronous scanning bandwidth, realize synchronous scanning circuit from motion tracking and locking, the utility model provides a kind of employing modern digital synthesis method of the frequency, uses phase-locked loop (PLL) and Direct Digital Frequency Synthesizers (DDS) to realize synchronous sinusoidal signal and produces and phase-adjusted scheme.The advantage of the method is the integrated level that has improved greatly synchronous scanning circuit system, reduce its design difficulty, and realized the wider following range of synchronous scanning circuit and to triggering signal from motion tracking and lock function.
Accompanying drawing explanation
Fig. 1 is the utility model synchronous scanning streak camera theory diagram;
Fig. 2 is that the utility model synchronous sinusoidal signal produces theory diagram;
Fig. 3 is that the utility model synchronous sinusoidal signal produces control and signal flow graph;
Fig. 4 is the utility model PLL input signal schematic diagram;
Fig. 5 is the utility model PLL output (DDS input) signal schematic representation;
Fig. 6 is the utility model DDS output signal schematic diagram;
Embodiment
The utility model provides a kind of synchronous scanning streak camera scanning circuit based on PLL and DDS, specific implementation step is as follows: 1) triggering light signal completes opto-electronic conversion through high speed optoelectronic switching device, obtains the reference electrical signal with triggering light same frequency.Triggering light opto-electronic conversion adopts low noise electrooptical device, and this electrooptical device should be able to be made significant response to triggering light, and responsive bandwidth should be greater than the highest triggering light highest frequency.
2) reference electrical signal is divided into two-way, and the frequency of triggering signal, as the input of frequency detecting unit 63, is detected in a road, can realize synchronous sinusoidal signal produce circuit 6 from motion tracking and lock function according to the triggering signal frequency values detecting; Another road produces the input of circuit 6 as synchronous sinusoidal signal, synchronous sinusoidal signal produces circuit 6 through certain parameter configuration, the sinusoidal small-signal of output and triggering light same frequency.
Frequency detecting unit 63 is completed by special frequency detecting chip, the ADN2806 of RuADI company, and this detection chip compares input signal and its clock signal, the frequency parameter of output measured signal; Synchronous sinusoidal signal produces circuit 6 and is comprised of PLL and DDS, the input signal frequency range of PLL and triggering signal frequency adapt, through clock multiplier, output meets the clock input signal of DDS, and DDS is the sinusoidal small-signal with triggering signal same frequency through clock division output again.
3) sinusoidal small-signal amplifies through further radio-frequency power, finally by RF-coupled network, this synchronous scanning voltage is coupled on the deflector of striped pipe.Radiofrequency power amplification unit adopts high performance radio-frequency power amplifier, and RF-coupled network outputs to the impedance matching of deflector in order to realize radio-frequency (RF) power amplification.
Synchronous scanning streak camera is usually used in the detection of ultrafast small-signal, specific works principle is referring to Fig. 1, trigger laser 1 and be divided into two-way by lens 2, one tunnel is used for exciting luminous object 3 to be measured, another road is for synchronous scanning circuit triggering signal, first this triggering signal passes through optical-electrical converter 5, is converted into electric impulse signal, then enters the triggering input of synchronous scanning circuit 9.Luminous object 3 to be measured sends faint optical signal under laser pulse 1 excites, and light signal enters synchronous scanning streak camera 4 and goes on record.The weak light detection ability of synchronous scanning streak camera is mainly by realizing periodicity light signal Multiple-Scan is cumulative, the cycle of light signal is identical with excitation light pulse, Multiple-Scan is to realize by the periodic deflection voltage on deflector, and the function of synchronous scanning circuit 9 is to produce with triggering light with deflecting voltage frequently.Synchronous scanning circuit 9 comprises synchronous sinusoidal signal generation 6, radiofrequency signal amplification 7 and impedance matching 8.
Synchronous sinusoidal signal produces principle referring to Fig. 2, the synchronous electric impulse signal that triggers is divided into two-way, one tunnel enters phase-locked loop 61 reference inputs, 61 pairs of input signal lockings of phase-locked loop, frequency multiplication, the frequency-doubled signal of output is as the clock signal of Direct Digital Frequency Synthesizers 62, regulate the frequency control word of Direct Digital Frequency Synthesizers 62, make the sinusoidal signal of its output and triggering signal same frequency; Electric impulse signal incoming frequency detecting unit 63 is triggered on another road, detects the frequency of triggering signal.Control unit 64 carries out parameter configuration according to detected triggering signal frequency to phase-locked loop 61 and Direct Digital Frequency Synthesizers 62, thereby realize the automatic configuration of phase-locked loop 61 and Direct Digital Frequency Synthesizers 62, realized the AutoLock feature of synchronous scanning circuit to triggering signal.
Synchronous sinusoidal signal produce to control and signal flow referring to Fig. 3, triggering signal f
1input to phase-locked loop 61 as its clock reference signal, set the frequency multiplier of phase-locked loop 61, input reference signal is by N frequency multiplication, the N frequency-doubled signal f of output
2as the clock reference signal of Direct Digital Frequency Synthesizers 62, the FREQUENCY CONTROL register of configuration Direct Digital Frequency Synthesizers 62,62 pairs of reference clock signal Fractional-N frequencies of Direct Digital Frequency Synthesizers.From whole signal flow, reference signal f
1sinusoidal signal f with Direct Digital Frequency Synthesizers 62 outputs
3frequency is identical, thereby has realized the same frequency sinusoidal signal transformation of start pulse signal.The phase adjusted of synchronous scanning circuit is to realize by the phase deviation control register of configuration Direct Digital Frequency Synthesizers 62, can realize 360 ° of adjustings of phase of output signal.Fig. 4 is phase-locked loop 61 input start pulse signal schematic diagrames, and Fig. 5 is phase-locked loop 61 output N frequency-doubled signal schematic diagrames, and Fig. 6 is Direct Digital Frequency Synthesizers 62 outputs and the same sinusoidal signal schematic diagram frequently of trigger impulse.
Synchronous sinusoidal signal generating portion in the utility model, phase-locked loop 61 and Direct Digital Frequency Synthesizers 62 must meet some requirements, on the one hand, the signal frequency of phase-locked loop 61 inputs and Direct Digital Frequency Synthesizers 62 outputs should cover the required frequency of synchronous scanning; The signal output frequency of phase-locked loop 61 should meet the signal incoming frequency requirement of Direct Digital Frequency Synthesizers 62 on the other hand.
Claims (5)
1. the synchronous scanning circuit system based on PLL and DDS, it is characterized in that: comprise and trigger laser (1), lens (2), trigger laser (1) and be divided into two-way by lens (2), wherein in the light path of a road triggering laser, synchronous scanning streak camera (4) is set; In the light path of another road triggering laser, optical-electrical converter (5) and synchronous scanning circuit (9) are set, triggering signal, through optical-electrical converter (5), is converted into electric impulse signal, enters the triggering input of synchronous scanning circuit (9).
2. the synchronous scanning circuit system based on PLL and DDS according to claim 1, is characterized in that: described synchronous scanning circuit (9) comprises that the synchronous sinusoidal signal connecting successively produces circuit (6), rf signal amplification circuit (7) and impedance matching circuit (8); Impedance matching circuit (8) is connected with synchronous scanning streak camera (4).
3. the synchronous scanning circuit system based on PLL and DDS according to claim 2, it is characterized in that: synchronous sinusoidal signal produces circuit (6) and comprises phase-locked loop (61) and Direct Digital Frequency Synthesizers (62), the synchronous electric impulse signal that triggers is divided into two-way, one tunnel enters phase-locked loop (61) reference input, phase-locked loop (61) is to input signal locking, frequency multiplication, the frequency-doubled signal of output is as the clock signal of Direct Digital Frequency Synthesizers (62), regulate the frequency control word of Direct Digital Frequency Synthesizers (62), make the sinusoidal signal of its output and triggering signal same frequency; Electric impulse signal incoming frequency detecting unit (63) is triggered on another road, detects the frequency of triggering signal, realizes synchronous sinusoidal signal produce circuit 6 from motion tracking and locking according to the triggering signal frequency values detecting.
4. the synchronous scanning circuit system based on PLL and DDS according to claim 2, it is characterized in that: synchronous sinusoidal signal produces circuit (6) and also comprises control unit (64), and control unit (64) carries out parameter configuration according to detected triggering signal frequency to phase-locked loop (64) and Direct Digital Frequency Synthesizers (62).
5. the synchronous scanning circuit system based on PLL and DDS according to claim 3, is characterized in that: described frequency detecting unit (63) is clock recovery chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320883713.8U CN203801002U (en) | 2013-12-30 | 2013-12-30 | Synchronization scanning circuit system based on PLL and DDS |
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| CN201320883713.8U CN203801002U (en) | 2013-12-30 | 2013-12-30 | Synchronization scanning circuit system based on PLL and DDS |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103780255A (en) * | 2013-12-30 | 2014-05-07 | 中国科学院西安光学精密机械研究所 | Synchronous scanning circuit system based on PLL and DDS |
| CN107769772A (en) * | 2017-11-02 | 2018-03-06 | 中国科学院西安光学精密机械研究所 | One kind is low to rock synchronous scanning circuit system |
-
2013
- 2013-12-30 CN CN201320883713.8U patent/CN203801002U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103780255A (en) * | 2013-12-30 | 2014-05-07 | 中国科学院西安光学精密机械研究所 | Synchronous scanning circuit system based on PLL and DDS |
| CN103780255B (en) * | 2013-12-30 | 2017-02-01 | 中国科学院西安光学精密机械研究所 | Synchronous scanning circuit system based on PLL and DDS |
| CN107769772A (en) * | 2017-11-02 | 2018-03-06 | 中国科学院西安光学精密机械研究所 | One kind is low to rock synchronous scanning circuit system |
| CN107769772B (en) * | 2017-11-02 | 2023-09-01 | 中国科学院西安光学精密机械研究所 | Low-shaking synchronous scanning circuit system |
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