CN203788253U - Microwave single-pole multi-throw switch - Google Patents
Microwave single-pole multi-throw switch Download PDFInfo
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- CN203788253U CN203788253U CN201320627462.7U CN201320627462U CN203788253U CN 203788253 U CN203788253 U CN 203788253U CN 201320627462 U CN201320627462 U CN 201320627462U CN 203788253 U CN203788253 U CN 203788253U
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- transmission line
- input
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- single pole
- microwave single
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Abstract
The utility model discloses a microwave single-pole multi-throw switch, and the switch comprises an input transmission line, wherein one end of the input transmission line is an input end, and the other end of the input transmission line is connected to a switch group and a compensation circuit at the same time. The switch group consists of at least two switching arms. The other end of each switching arm is an output end. The compensation circuit changes the input impedance of the switch group, thereby the switch group to be matched with the input transmission line in impedance. On the basis of a single-pole double-throw switch, the switch provided by the utility model is additionally provided with a plurality of switching arms, thereby forming the microwave single-pole multi-throw switch. Meanwhile, the compensation circuit is in parallel connection with the plurality of switching arms, and consists of a reactive element capacitor and/or inductor. In actual use, the values of the reactive element capacitor and/or inductor in the compensation circuit can be selected properly, thereby enabling the switching arms to be matched with an input source and the input transmission line in impedance.
Description
Technical field
The present invention relates to a kind of microwave single pole multiple throw, belong to microwave controller part field.
Background technology
Single-pole double-throw switch (SPDT) is a kind of microwave controller part that is mainly used in the systems such as microwave communication, radar, electronic countermeasures and satellite aerospace.Due to the compensation single-pole double-throw switch (SPDT) based on field effect transistor, have that operating frequency range is wide, volume is little, lightweight, switching speed fast, idle and high reliability, in many modern advanced electronic systems and equipment, be favourably welcome.Parameter and the key technical indexes of describing this properties of product have: 1) operational frequency bandwidth; 2) insertion loss; 3) isolation; 4) input and output standing wave; 5) switching speed; 6) chip size; 7) chip chamber electrical property consistency.
Like product is selected and technique realizes the defect of approach itself due to circuit topology design, layout design, material, has following shortcoming: 1) input and output standing wave index is poor; 2) insertion loss is large etc.
Summary of the invention
Goal of the invention: the present invention proposes a kind of microwave single pole multiple throw, makes switch inside realize impedance matching, has improved standing-wave ratio and the insertion loss of switch, has reduced the reflected wave of output.
Technical scheme: the technical solution used in the present invention is a kind of microwave single pole multiple throw, comprise that one end is the input transmission line of input, the other end of this input transmission line is connected to switches set and compensating circuit simultaneously, described switches set is comprised of at least two switch arms, the other end of each switch arm is output, described compensating circuit changes the input impedance of switches set, makes itself and input transmission line realize impedance matching.
As a modification of the present invention, described compensating circuit is comprised of building-out capacitor, and this building-out capacitor one end is connected with input transmission line, other end ground connection.
As another improvement of the present invention, described compensating circuit also comprises compensating inductance, described building-out capacitor one end ground connection, and the other end is connected to input transmission line by the compensating inductance of series connection with it.Also can be that described building-out capacitor is all connected with input transmission line with one end of compensating inductance, their the equal ground connection of the other end.Can also be described compensating inductance one end ground connection, the other end be connected to input transmission line by the building-out capacitor of series connection with it.
As of the present invention, further improve, described switch arm at least comprises that one is controlled transistor and two output transmission lines of mutually connecting; The transistorized raceway groove of described control is connected between the common port and ground of adjacent two output transmission lines, or is connected between adjacent two output transmission lines.Each is controlled and on transistorized grid, is also provided with isolation resistance.
As of the present invention, further improve, described switches set is comprised of two switch arms.Described control transistor is metal-oxide-semiconductor.Described transmission line is microstrip line.
Beneficial effect: the present invention, on the basis of single-pole double-throw switch (SPDT), then increases a plurality of switch arms, has formed single pole multiple throw.Simultaneously with a plurality of switch arms are in parallel compensating circuit is set, this compensating circuit is comprised of reactive components electric capacity and/or inductance.In actual use, the capacitor and inductor in compensating circuit can be selected suitable capacitor and inductor value, makes switch arm and input source, input transmission line realize impedance matching.
Accompanying drawing explanation
Fig. 1 is the structural representation of the embodiment of the present invention 1;
Fig. 2 is the circuit topological structure figure of the embodiment of the present invention 1;
Fig. 3 is the structural representation of the embodiment of the present invention 2 and 3;
Fig. 4 is the structural representation of switch arm in the embodiment of the present invention 2;
Fig. 5 is the structural representation of compensating circuit in the embodiment of the present invention 2;
Fig. 6 is standing-wave ratio and the frequency relation figure of the embodiment of the present invention 2;
Fig. 7 is insertion loss and the frequency relation figure of the embodiment of the present invention 2;
Fig. 8 is the structural representation of compensating circuit in the embodiment of the present invention 3;
Fig. 9 is the structural representation of switch arm in the embodiment of the present invention 3.
Embodiment
Below in conjunction with the drawings and specific embodiments, further illustrate the present invention, should understand these embodiment is only not used in and limits the scope of the invention for the present invention is described, after having read the present invention, those skilled in the art all fall within the application's claims limited range to the modification of various equivalents of the present invention.
Embodiment 1: as shown in Figure 1, one end of inputting microstrip line ML in the present embodiment is input Input, and the other end is common port.This common port is also connecting the first switch arm SWa, second switch arm SWb and compensating circuit CP.The first switch arm SWa and second switch arm SWb have formed switches set.The other end of the first switch arm SWa is the first output Output1, and the other end of second switch arm SWb is the second output Output2.
As shown in Figure 2, the first switch arm SWa is comprised of the first output microstrip line Ma1, the second output microstrip line Ma2 and the first control NMOS pipe Fa.Wherein one end of the first output microstrip line Ma1 is connected to described common port, and the other end is connected with the second output microstrip line Ma2.The other end of the second output microstrip line Ma2 is the first output Output1.The public point of the first output microstrip line Ma1 and the second output microstrip line Ma2 is being connected first and is controlling the drain electrode that NMOS manages Fa, and first controls the source ground of NMOS pipe Fa.On the grid of described the first control NMOS pipe Fa, be also connected with the first isolation resistance Ra, another termination first of the first isolation resistance Ra is controlled voltage Va.
Second switch arm SWb controls NMOS pipe Fb by the 3rd output microstrip line Mb1, the 4th output microstrip line Mb2 and second and forms.Wherein one end of the 3rd output microstrip line Mb1 is connected to described common port, and the other end is connected with the 4th output microstrip line Mb2.The other end of the 4th output microstrip line Mb2 is the second output Output2.The public point of the 3rd output microstrip line Mb1 and the 4th output microstrip line Mb2 is being connected second and is controlling the drain electrode that NMOS manages Fb, and second controls the source ground of NMOS pipe Fb.On the grid of described the second control NMOS pipe Fb, be also connected with the second isolation resistance Rb, another termination second of the second isolation resistance Rb is controlled voltage Vb.
Compensating circuit is a building-out capacitor C, and one end of this building-out capacitor C is connected to described common port, is connected other end ground connection with input microstrip line ML.When switch, the first control NMOS pipe Fa and second controls NMOS pipe Fb and is responsible for selecting output channel.When selection is exported from the first output Output1, the first control voltage Va is low level, make the first control NMOS pipe cut-off, and the second control voltage Vb is high level, makes the second control NMOS manage conducting.The input signal that enters like this second switch arm SWb is just grounded, and the input signal that enters the first switch arm SWa arrives the first output Output1 by the first output microstrip line Ma1 and the second output microstrip line Ma2.Conversely, if selected from the second output Output2 output, the first control voltage Va is high level, and the second control voltage Vb is low level.
When switch, no matter from which output output, at synchronization, only having a switch arm is conducting.From described common port to output, there are three branch roads to be connected to common port, one is the microstrip line that one end is grounded, and one is two microstrip lines of mutually connecting, and another is the building-out capacitor C of other end ground connection.Make the adding of building-out capacitor to realize impedance matching between the total impedance of these three branch roads and input power internal impedance, input microstrip line ML, allow output obtain maximum power.
Embodiment 2: on the basis of embodiment 1, switches set can also comprise more switch arm, realize the output of one end input multiterminal.As shown in Figure 3, one end of inputting microstrip line ML in the present embodiment is input Input, and the other end is common port.This common port is also connecting the first switch arm SWa, second switch arm SWb, the 3rd switch arm SWc, the 4th switch arm SWd and compensating circuit CP.The first switch arm SWa, second switch arm SWb, the 3rd switch arm SWc and the 4th switch arm SWd have formed switches set.The other end of the first switch arm SWa is the first output Output1, the other end of second switch arm SWb is the second output Output2, the other end of the 3rd switch arm SWc is the 3rd output Output3, and the other end of the 4th switch arm SWd is the 4th output Output4.
Wherein the first switch arm SWa to the four switch arm SWd all have identical structure as shown in Figure 4, are provided with the first output microstrip line Ma1 to the eight output microstrip line Ma8 of mutual series connection in Fig. 4 in switch arm.The public point of two adjacent output microstrip lines is also connected with the drain electrode of controlling NMOS pipe Fa, therefore has seven and controls NMOS pipe Fa.Each controls the source ground of NMOS pipe Fa, and grid is controlled voltage Va by isolation resistance Ra1 to Ra7 and first and is connected.The other end of the first output microstrip line Ma1 is connected to described common port, and the other end of the 8th output microstrip line Ma8 is the first output Output1.
As shown in Figure 5, compensating inductance L's compensating circuit CP mutually connects with building-out capacitor C, and the other end of compensating inductance L is connected with described common port, the other end ground connection of building-out capacitor C.The operation principle of compensating circuit CP is identical with embodiment 1, is also to realize impedance matching by changing the total impedance of switches set and compensating circuit CP.
As shown in Figure 6 and Figure 7, owing to having added the compensating circuit CP of the present embodiment, standing-wave ratio and insertion loss are obviously declined.Other parts of the present embodiment are identical with embodiment 1.
Embodiment 3: as shown in Figure 3, one end of inputting microstrip line ML in the present embodiment is input Input, and the other end is common port.This common port is also connecting the first switch arm SWa, second switch arm SWb, the 3rd switch arm SWc, the 4th switch arm SWd and compensating circuit CP.The first switch arm SWa, second switch arm SWb, the 3rd switch arm SWc and the 4th switch arm SWd have formed switches set.The other end of the first switch arm SWa is the first output Output1, the other end of second switch arm SWb is the second output Output2, the other end of the 3rd switch arm SWc is the 3rd output Output3, and the other end of the 4th switch arm SWd is the 4th output Output4.
In the present embodiment, as shown in Figure 8, compensating inductance L and building-out capacitor C are connected in parallel between described common port and ground compensating circuit CP.
And the first switch arm SWa to the four switch arm SWd all have identical structure as shown in Figure 9.In this structure, between the first output microstrip line Ma1 to the eight output microstrip line Ma8, go back serial or parallel connection and seven control NMOS pipe Fa.Each grid of controlling NMOS pipe Fa is connected by isolation resistance Ra1 to Ra7 and the first control voltage Va.Wherein the source ground of control NMOS pipe Fa in parallel, drains and is connected to the common ports of two output microstrip lines.And between two adjacent control NMOS pipe Fa in parallel, have two output microstrip lines, between these two output microstrip lines, be in series with one and control NMOS pipe Fa.
Claims (10)
1. a microwave single pole multiple throw, it is characterized in that, comprise that one end is the input transmission line of input, the other end of this input transmission line is connected to switches set and compensating circuit simultaneously, described switches set is comprised of at least two switch arms, the other end of each switch arm is output, and described compensating circuit changes the input impedance of switches set, makes itself and input transmission line realize impedance matching.
2. by microwave single pole multiple throw claimed in claim 1, it is characterized in that, described compensating circuit is comprised of building-out capacitor, and this building-out capacitor one end is connected with input transmission line, other end ground connection.
3. by microwave single pole multiple throw claimed in claim 2, it is characterized in that, also comprise compensating inductance, described building-out capacitor one end ground connection, the other end is connected to input transmission line by the compensating inductance of series connection with it.
4. by microwave single pole multiple throw claimed in claim 2, it is characterized in that, also comprise compensating inductance, described compensating inductance one end ground connection, the other end is connected to input transmission line by the building-out capacitor of series connection with it.
5. by microwave single pole multiple throw claimed in claim 2, it is characterized in that, also comprise compensating inductance, described building-out capacitor is all connected with input transmission line with one end of compensating inductance, the equal ground connection of the other end of building-out capacitor and compensating inductance.
6. by microwave single pole multiple throw claimed in claim 1, it is characterized in that, described switch arm at least comprises that one is controlled transistor and two output transmission lines of mutually connecting; The transistorized raceway groove of described control is connected between the common port and ground of adjacent two output transmission lines, or is connected between adjacent two output transmission lines.
7. by microwave single pole multiple throw claimed in claim 6, it is characterized in that, each is controlled and on transistorized grid, is also provided with isolation resistance.
8. by microwave single pole multiple throw claimed in claim 7, it is characterized in that, described switches set is comprised of two switch arms.
9. by the microwave single pole multiple throw described in any one in claim 6 to 8, it is characterized in that, described control transistor is metal-oxide-semiconductor.
10. by the microwave single pole multiple throw described in any one in claim 1 to 8, it is characterized in that, described transmission line is microstrip line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320627462.7U CN203788253U (en) | 2013-10-11 | 2013-10-11 | Microwave single-pole multi-throw switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320627462.7U CN203788253U (en) | 2013-10-11 | 2013-10-11 | Microwave single-pole multi-throw switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203788253U true CN203788253U (en) | 2014-08-20 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320627462.7U Withdrawn - After Issue CN203788253U (en) | 2013-10-11 | 2013-10-11 | Microwave single-pole multi-throw switch |
Country Status (1)
| Country | Link |
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| CN (1) | CN203788253U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103618528A (en) * | 2013-10-11 | 2014-03-05 | 中国电子科技集团公司第五十五研究所 | Microwave single-pole multi-throw switch |
| US9577631B2 (en) | 2015-02-13 | 2017-02-21 | Richwave Technology Corp. | Single pole multi-throw switch |
| US10340704B2 (en) | 2015-02-13 | 2019-07-02 | Richwave Technology Corp. | Switch device with a wide bandwidth |
-
2013
- 2013-10-11 CN CN201320627462.7U patent/CN203788253U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103618528A (en) * | 2013-10-11 | 2014-03-05 | 中国电子科技集团公司第五十五研究所 | Microwave single-pole multi-throw switch |
| CN103618528B (en) * | 2013-10-11 | 2017-12-12 | 中国电子科技集团公司第五十五研究所 | A kind of microwave single-pole multi-throw switch |
| US9577631B2 (en) | 2015-02-13 | 2017-02-21 | Richwave Technology Corp. | Single pole multi-throw switch |
| US10340704B2 (en) | 2015-02-13 | 2019-07-02 | Richwave Technology Corp. | Switch device with a wide bandwidth |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20140820 Effective date of abandoning: 20171212 |