CN203747804U - Analog output circuit - Google Patents
Analog output circuit Download PDFInfo
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- CN203747804U CN203747804U CN201420074154.0U CN201420074154U CN203747804U CN 203747804 U CN203747804 U CN 203747804U CN 201420074154 U CN201420074154 U CN 201420074154U CN 203747804 U CN203747804 U CN 203747804U
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Abstract
Disclosed in the utility model is an analog output circuit comprising a PWM signal generator, a level conversion circuit, a filter circuit and a differential amplifier circuit. A first port of the PWM signal generator outputs a PWM signal; the input terminal of the level conversion circuit is connected with the first port of the PWM signal generator, thereby realizing level conversion of the PWM signal; the input terminal of the filter circuit is connected with the output terminal of the level conversion circuit, thereby realizing filtering of the PWM signal after level conversion; and a reverse input terminal of the differential amplifier circuit is connected with the output terminal of the filter circuit, thereby realizing amplification processing of a direct current signal outputted by the filter circuit. With the analog output circuit, the analog signal with high precision can be outputted.
Description
Technical field
The utility model belongs to electrical control technical field of automation, relates in particular to a kind of analogue quantity output circuit.
Background technology
Analogue quantity output circuit is for by PWM(pulse width modulation) signal is converted to analog signal, to drive analogue device.
Present analogue quantity output circuit mainly comprises filter circuit and signal amplification circuit.Wherein, filter circuit carries out filtering processing to form direct current signal to the pwm signal of pwm signal generator output, the voltage of direct current signal of filter circuit output is relevant with the duty ratio of pwm signal, in the case of the voltage of the low and high level signal of pwm signal is constant, the direct voltage of filter circuit output increases along with the increase of the duty ratio of pwm signal.Signal amplification circuit is for the direct current signal of filter circuit output is amplified to processing, to export direct current signal.
But, the precision of existing analogue quantity output circuit is lower, this is because the pwm signal of pwm signal generator output exists pressure drop, cause the direct current signal of filter circuit output also to there will be pressure drop, pass through again the processing of amplifying circuit, the direct current signal of final output is by occurring larger pressure drop, far below target voltage values.Describe for example: in the time that the duty ratio of pwm signal is 50%, the desired voltage of the direct current signal of filter circuit output is 3.3V, carry out 3 times through signal amplification circuit more afterwards and amplify processing, thereby obtain the voltage signal of 9.9V, approach target voltage values 10V, but because pwm signal itself exists pressure drop, can cause the voltage of the direct current signal of filter circuit output to be less than 3.3V, pass through afterwards the processing of signal amplification circuit, the magnitude of voltage of the direct current signal of output is less than 9.9V, and the difference between target voltage values is larger, the precision of outputting analog signal is lower.
Therefore, how providing a kind of high-precision analogue quantity output circuit is those skilled in the art's problem demanding prompt solutions.
Utility model content
In view of this, the purpose of this utility model is to provide a kind of analogue quantity output circuit, to export high-precision analog signal.
For achieving the above object, the utility model provides following technical scheme:
The utility model discloses a kind of analogue quantity output circuit, comprise pwm signal generator, level shifting circuit, filter circuit and differential amplifier circuit;
The first port output pwm signal of described pwm signal generator;
The input of described level shifting circuit is connected with the first port of described pwm signal generator, and described pwm signal is carried out to level conversion;
The input of described filter circuit is connected with the output of described level shifting circuit, and the pwm signal through level conversion is carried out to filtering;
The reverse input end of described differential amplifier circuit is connected with the output of described filter circuit, and the direct current signal of described filter circuit output is amplified to processing.
Preferably, in above-mentioned analogue quantity output circuit, described level shifting circuit comprises the first inverter, the second inverter, the first resistance, the second resistance and the 3rd resistance;
The input of described the first inverter is connected to the first port of described pwm signal generator as the input of described level shifting circuit, the output of described the first inverter is connected to the output of described the second inverter by described the first resistance, the input of described the second inverter is by described the 3rd grounding through resistance, the input of described the first inverter is by described the second grounding through resistance, and the output of described the first inverter is connected to the input of described filter circuit.
Preferably, in above-mentioned analogue quantity output circuit, described filter circuit comprises the 4th resistance, the 5th resistance, the first electric capacity and the second electric capacity;
The first end of described the 4th resistance is connected to the output of described the first inverter, the second end of described the 4th resistance is by described the first capacity earth, the first end of described the 5th resistance is connected to the second end of described the 4th resistance, the second end of described the 5th resistance is connected with the first end of described the second electric capacity, and the second end of described the 5th resistance is as the output of described filter circuit.
Preferably, in above-mentioned analogue quantity output circuit, described differential amplifier circuit comprises operational amplifier, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance and the tenth resistance;
The first end of described the 6th resistance is connected to the output of described the second inverter, the second end of described the 6th resistance is connected to the first end of described the 7th resistance and the first end of described the 8th resistance simultaneously, the second end ground connection of described the 7th resistance, the second end of described the 8th resistance is connected to the positive input of described operational amplifier, the reverse input end of described operational amplifier is connected to the second end of described the 5th resistance, described operational amplifier output terminal is connected to the second end of described the second electric capacity and the first end of described the 9th resistance simultaneously, the second end of described the 9th resistance is as the output of described differential amplifier circuit, the first end of described the tenth resistance is connected to the second end of described the 9th resistance, the second end of described the tenth resistance is connected to the second end of described the 4th resistance.
Preferably, in above-mentioned analogue quantity output circuit, described pwm signal generator is single-chip microcomputer.
As can be seen here, the beneficial effects of the utility model are: the disclosed analogue quantity output circuit of the utility model, comprise pwm signal generator, level shifting circuit, filter circuit and differential amplifier circuit, wherein level shifting circuit carries out level conversion to the pwm signal of pwm signal generator output, by the level conversion ratio of level shifting circuit is set, to make the nearly ideal value of input voltage differential between positive input and the reverse input end of differential amplifier circuit, thereby improve the precision of the analog signal of output.
Brief description of the drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is embodiment more of the present utility model, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the structural representation of the disclosed a kind of analogue quantity output circuit of the utility model;
Fig. 2 is the circuit diagram of the disclosed another kind of analogue quantity output circuit of the utility model;
Fig. 3 is the equivalent circuit diagram of the first inverter, the second inverter and the first resistance in Fig. 2.
Embodiment
For making object, technical scheme and the advantage of the utility model embodiment clearer, below in conjunction with the accompanying drawing in the utility model embodiment, technical scheme in the utility model embodiment is clearly and completely described, obviously, described embodiment is the utility model part embodiment, instead of whole embodiment.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtaining under creative work prerequisite, all belong to the scope of the utility model protection.
The utility model discloses a kind of analogue quantity output circuit, can export high-precision analog signal.
Referring to Fig. 1, Fig. 1 is the structural representation of the disclosed a kind of analogue quantity output circuit of the utility model.This analogue quantity output circuit comprises pulse width modulation (PWM) signal generator 100, level shifting circuit 200, filter circuit 300 and differential amplifier circuit 400.
Wherein:
Pwm signal generator 100 is for output pwm signal.Concrete, the first port of pwm signal generator 100 is exported a road pwm signal, and this first port is the signal output port of pwm signal generator 100.
The input of level shifting circuit 200 is connected with the first port of pwm signal generator 100, and level shifting circuit 200 carries out level conversion to pwm signal.The pwm signal that level shifting circuit 200 can be exported pwm signal generator 100 carries out level conversion, thus the voltage difference between two inputs of adjustment differential amplifier circuit 400.By the level conversion ratio of level shifting circuit 200 is set, make the nearly ideal value of input voltage differential between positive input and the reverse input end of differential amplifier circuit 400, this ideal value is with the multiplication factor adaptation of differential amplifier circuit 400, thereby improves the precision of the analog signal of output.
The input of filter circuit 300 is connected with the output of level shifting circuit 200, and filter circuit 300 carries out filtering to the pwm signal through level conversion, to export direct current signal.
The reverse input end of differential amplifier circuit 400 is connected with the output of filter circuit 300, the direct current signal that differential amplifier circuit 400 is exported filter circuit 300 amplifies processing, thereby output direct current signal, this direct current signal is the analog signal for driving analogue device.The multiplication factor of differential amplifier circuit 400 is set to bigger numerical, and particularly, the actual multiplication factor of differential amplifier circuit 400 will suitably be greater than the theoretical multiplication factor calculating.
The disclosed analogue quantity output circuit of the utility model, comprise pwm signal generator 100, level shifting circuit 200, filter circuit 300 and differential amplifier circuit 400, the pwm signal that wherein level shifting circuit 200 is exported pwm signal generator 100 carries out level conversion, by the level conversion ratio of level shifting circuit 200 is set, to make the nearly ideal value of input voltage differential between positive input and the reverse input end of differential amplifier circuit 400, thereby improve the precision of the analog signal of output.
It should be noted that, the pwm signal generator 100 in the utility model can be microcontroller, as MCU(single-chip microcomputer), also can be formed by timer and transistor, by the transistorized turn-on and turn-off of Timer Controlling to realize the output of pwm signal.
In enforcement, level shifting circuit 200, filter circuit 300 and differential amplifier circuit 400 can adopt multiple existing structure to realize.The utility model discloses a kind of structure of level shifting circuit 200, filter circuit 300 and differential amplifier circuit 400.Describe below in conjunction with Fig. 2.
Referring to Fig. 2, Fig. 2 is the circuit diagram of the disclosed another kind of analogue quantity output circuit of the utility model.This analogue quantity output circuit comprises pwm signal generator 100, level shifting circuit 200, filter circuit and differential amplifier circuit.
Wherein:
The first port of pwm signal generator 100 is exported a road pwm signal.
Level shifting circuit 200 comprises the first inverter U1, the second inverter U2, the first resistance R 1, the second resistance R 2 and the 3rd resistance R 3.Wherein, the input of the first inverter U1 is connected to the first port of pwm signal generator 100 as the input of level shifting circuit 200, the output of the first inverter U1 is connected to the output of the second inverter U2 by the first resistance R 1, the input of the second inverter U2 is by the 3rd resistance R 3 ground connection, the input of the first inverter U1 is by the second resistance R 2 ground connection, and the output of the first inverter U1 is connected to the input of filter circuit.
In level shifting circuit 200, the second resistance R 2 and the 3rd resistance R 3, as pull down resistor, make the output of the first inverter U1 and the second inverter U2 in stable state.The equivalent electric circuit of the first inverter U1, the second inverter U2 and the first resistance R 1 as shown in Figure 3, wherein resistance R u is the I/O impedance of the first inverter U1, resistance R d is the I/O impedance of the second inverter U2, resistance R u, resistance R d and the first resistance R 1 form a resistor voltage divider circuit, regulated output voltage Vo.By adjusting the resistance of the first resistance R 1, can adjust the voltage Vo at the first resistance R 1 two ends, thereby the input voltage between positive input and the reverse input end of adjustment differential amplifier circuit is poor.By the multiplication factor and adjusting the first resistance R 1 of suitable amplification difference channel, can make the direct current signal of output approach ideal value.
Filter circuit is two-stage RC low-pass filter circuit, comprises the 4th resistance R 4, the 5th resistance R 5, the first capacitor C 1 and the second capacitor C 2.Wherein, the first end of the 4th resistance R 4 is connected to the output of the first inverter U1, the second end of the 4th resistance R 4 is by the first capacitor C 1 ground connection, the first end of the 5th resistance R 5 is connected to the second end of the 4th resistance R 4, the second end of the 5th resistance R 5 is connected with the first end of the second capacitor C 2, and the second end of the 5th resistance R 5 is as the output of filter circuit.
Wherein, the 4th resistance R 4 and the first capacitor C 1 form first order filter circuit, and the 5th resistance R 5 and the second capacitor C 2 form second level filter circuit.
Differential amplifier circuit comprises operational amplifier U3, the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9 and the tenth resistance R 10.Wherein, the first end of the 6th resistance R 6 is connected to the output of the second inverter U2, the second end of the 6th resistance R 6 is connected to the first end of the 7th resistance R 7 and the first end of the 8th resistance R 8 simultaneously, the second end ground connection of the 7th resistance R 7, the second end of the 8th resistance R 8 is connected to the positive input of operational amplifier U3, the reverse input end of operational amplifier U3 is connected to the second end of the 5th resistance R 5, the output of operational amplifier U3 is connected to the second end of the second capacitor C 2 and the first end of the 9th resistance R 9 simultaneously, the second end of the 9th resistance R 9 is as the output of differential amplifier circuit, the first end of the tenth resistance R 10 is connected to the second end of the 9th resistance R 9, the second end of the tenth resistance R 10 is connected to the second end of the 4th resistance R 4.
The multiplication factor of differential amplifier circuit is set to bigger numerical, make the direct current signal of output can be greater than desired value by the multiplication factor of suitable amplification differential amplifier circuit, then by regulating the first resistance R 1 can make the direct current signal of output approach ideal value, thereby improve the precision of analog signal of output.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is and the difference of other embodiment, between each embodiment identical similar part mutually referring to.
To the above-mentioned explanation of the disclosed embodiments, make professional and technical personnel in the field can realize or use the utility model.To be apparent for those skilled in the art to the multiple amendment of these embodiment, General Principle as defined herein can, in the situation that not departing from spirit or scope of the present utility model, realize in other embodiments.Therefore, the utility model will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (5)
1. an analogue quantity output circuit, is characterized in that, comprises pulse width modulation (PWM) signal generator, level shifting circuit, filter circuit and differential amplifier circuit;
The first port output pwm signal of described pwm signal generator;
The input of described level shifting circuit is connected with the first port of described pwm signal generator, and described pwm signal is carried out to level conversion;
The input of described filter circuit is connected with the output of described level shifting circuit, and the pwm signal through level conversion is carried out to filtering;
The reverse input end of described differential amplifier circuit is connected with the output of described filter circuit, and the direct current signal of described filter circuit output is amplified to processing.
2. analogue quantity output circuit according to claim 1, is characterized in that, described level shifting circuit comprises the first inverter, the second inverter, the first resistance, the second resistance and the 3rd resistance;
The input of described the first inverter is connected to the first port of described pwm signal generator as the input of described level shifting circuit, the output of described the first inverter is connected to the output of described the second inverter by described the first resistance, the input of described the second inverter is by described the 3rd grounding through resistance, the input of described the first inverter is by described the second grounding through resistance, and the output of described the first inverter is connected to the input of described filter circuit.
3. analogue quantity output circuit according to claim 2, is characterized in that, described filter circuit comprises the 4th resistance, the 5th resistance, the first electric capacity and the second electric capacity;
The first end of described the 4th resistance is connected to the output of described the first inverter, the second end of described the 4th resistance is by described the first capacity earth, the first end of described the 5th resistance is connected to the second end of described the 4th resistance, the second end of described the 5th resistance is connected with the first end of described the second electric capacity, and the second end of described the 5th resistance is as the output of described filter circuit.
4. analogue quantity output circuit according to claim 3, is characterized in that, described differential amplifier circuit comprises operational amplifier, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance and the tenth resistance;
The first end of described the 6th resistance is connected to the output of described the second inverter, the second end of described the 6th resistance is connected to the first end of described the 7th resistance and the first end of described the 8th resistance simultaneously, the second end ground connection of described the 7th resistance, the second end of described the 8th resistance is connected to the positive input of described operational amplifier, the reverse input end of described operational amplifier is connected to the second end of described the 5th resistance, described operational amplifier output terminal is connected to the second end of described the second electric capacity and the first end of described the 9th resistance simultaneously, the second end of described the 9th resistance is as the output of described differential amplifier circuit, the first end of described the tenth resistance is connected to the second end of described the 9th resistance, the second end of described the tenth resistance is connected to the second end of described the 4th resistance.
5. analogue quantity output circuit according to claim 1, is characterized in that, described pwm signal generator is single-chip microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420074154.0U CN203747804U (en) | 2014-02-20 | 2014-02-20 | Analog output circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420074154.0U CN203747804U (en) | 2014-02-20 | 2014-02-20 | Analog output circuit |
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| Publication Number | Publication Date |
|---|---|
| CN203747804U true CN203747804U (en) | 2014-07-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420074154.0U Expired - Fee Related CN203747804U (en) | 2014-02-20 | 2014-02-20 | Analog output circuit |
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| CN (1) | CN203747804U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105450563A (en) * | 2015-12-15 | 2016-03-30 | 天津航天中为数据系统科技有限公司 | Baseband signal processing circuit |
| CN105444921A (en) * | 2015-11-04 | 2016-03-30 | 中国北方发动机研究所(天津) | Signal imitation circuit and method for thermocouple sensor |
| CN113110242A (en) * | 2021-05-14 | 2021-07-13 | 中国核动力研究设计院 | High-efficiency analog quantity signal output device |
-
2014
- 2014-02-20 CN CN201420074154.0U patent/CN203747804U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105444921A (en) * | 2015-11-04 | 2016-03-30 | 中国北方发动机研究所(天津) | Signal imitation circuit and method for thermocouple sensor |
| CN105450563A (en) * | 2015-12-15 | 2016-03-30 | 天津航天中为数据系统科技有限公司 | Baseband signal processing circuit |
| CN113110242A (en) * | 2021-05-14 | 2021-07-13 | 中国核动力研究设计院 | High-efficiency analog quantity signal output device |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140730 Termination date: 20210220 |
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| CF01 | Termination of patent right due to non-payment of annual fee |