CN203722504U - N-output three-phase 3N+3 switch group MMC inverter - Google Patents

Abstract

The utility model provides an N-output three-phase 3N+3 switch group MMC inverter. The inverter comprises a direct current power supply, a first bridge arm, a second bridge arm, a third bridge arm, and N three-phase loads, the three bridge arms are all formed by series connection of N+1 switch groups and two inductors, each switch group of each bridge arm is formed by series connection of n power switch units, three terminals of the kth three-phase load are respectively connected with upper terminals of the k+1th switch groups of the three bridge arms, wherein the value of k ranges from 1 to N-1, and three terminals of the Nth three-phase load are respectively connected with lower terminals of the Nth switch groups of the three bridge arms. According to the inverter, carrier phase-shifting PWM is employed to control the inverter, three-phase alternating current output with an N line voltage of 2n+1 level is provided, the voltage stress born by each switch tube in the MMC power switch units is merely 1/n of the voltage of the direct current power supply, and the inverter is applicable to occasions of high voltage, high power, and three-phase alternating current double-load.

Description

N output three-phase 3N+3 switches set MMC inverter

Technical field

The module that relates to the utility model combines many level (MMC) converter field, is specifically related to a kind of N output three-phase 3N+3 switches set MMC inverter.

Background technology

, under this trend, there is the direction of two kinds of improvement converters: reduce passive device or improve converter topology structure to reduce active device as the new development that reduces active device direction at present power inverter forward miniaturization, high reliability and low-loss future development.Three-phase 3N+3 switch converters has reduced 3N-3 switch and corresponding drive circuit with respect to traditional 6N switch converters, in the application of considering cost and volume, occupies certain advantage.But the single-phase output in N road of 3N+3 switch converters is two level, output AC waveform is poor.In addition, the half that the voltage stress that in 3N+3 switch, each switch bears is DC bus-bar voltage, and there is the voltage-sharing of 3N+3 switching tube, this has limited the application of three-phase 3N+3 switch converters in high pressure and large-power occasions greatly.

In recent years, multilevel technology is constantly promoted, and successful Application is at the industrial circle such as such as high voltage direct current transmission, Electric Drive, active power filtering, static synchroballistic, common voltage-type multi-level converter topology is broadly divided into case bit-type and the large class of unit cascaded type two at present.Module combination multi-level converter (Modular Multilevel Converter, MMC) as a kind of novel many level topology, except having advantages of traditional multi-level converter, module combination multi-level converter adopts Modular Structure Design, is convenient to System Expansion and redundancy of effort; Have unbalanced operation ability, fault traversing and recovery capability, system reliability is high; Owing to having common DC bus, module combination multi-level converter is particularly useful for HVDC (High Voltage Direct Current) transmission system application.But, in the time of the three-phase AC line of N bar different frequency connected, needing 2N MMC converter, this has increased engineering cost greatly.

Utility model content

The purpose of this utility model is to overcome above-mentioned the deficiencies in the prior art, proposes a kind of N output three-phase 3N+3 switches set MMC inverter.

The purpose of this utility model is achieved through the following technical solutions.

N output three-phase 3N+3 switches set MMC inverter comprises DC power supply, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis, a N threephase load; Described the first brachium pontis is in series by N+1 switches set and 2 inductance, and described the second brachium pontis is in series by N+1 switches set and 2 inductance, and described the 3rd brachium pontis is in series by N+1 switches set and 2 inductance; I switches set of the first brachium pontis is in series by n power switch unit, i switches set of the second brachium pontis is in series by n power switch unit, i switches set of the 3rd brachium pontis is in series by n power switch unit, and wherein the value of i is 1～N+1; Three ends of k threephase load are connected with the upper end of k+1 switches set of the upper end of k+1 switches set of the upper end of k+1 switches set of the first brachium pontis, the second brachium pontis, the 3rd brachium pontis respectively, and wherein the value of k is 1～N-1; Three ends of N threephase load are connected with the lower end of N switches set of the lower end of N switches set of the lower end of N switches set of the first brachium pontis, the second brachium pontis, the 3rd brachium pontis respectively; Three ends of k load are as the output of k road three-phase, and wherein the value of k is 1～N, N>2, and n is positive integer.

In above-mentioned N output three-phase 3N+3 switches set MMC inverter, two inductance of the first brachium pontis intercouple, and form a pair of coupling inductance; Two inductance of the second brachium pontis intercouple, and form a pair of coupling inductance; Two inductance of the 3rd brachium pontis intercouple, and form a pair of coupling inductance.

In above-mentioned N output three-phase 3N+3 switches set MMC inverter, the upper end of the upper end of the upper end of the positive pole of DC power supply and the 1st switches set of the first brachium pontis, the 1st switches set of the second brachium pontis, the 1st switches set of the 3rd brachium pontis is connected; The lower end of the 1st switches set of the first brachium pontis is connected with one end of the 1st inductance of the first brachium pontis, and the other end of the 1st inductance of the first brachium pontis is connected with the upper end of the 2nd switches set of the first brachium pontis; The lower end of i switches set of the first brachium pontis is connected with the upper end of i+1 switches set of the first brachium pontis, and wherein the value of i is 2～N-1; The lower end of N switches set of the first brachium pontis is connected with one end of the 2nd inductance of the first brachium pontis, and the other end of the 2nd inductance of the first brachium pontis is connected with the upper end of N+1 switches set of the first brachium pontis; The circuit structure of the circuit structure of the second brachium pontis, the circuit structure of the 3rd brachium pontis and the first brachium pontis is in full accord; Three ends of k threephase load are connected with the upper end of k+1 switches set of the upper end of k+1 switches set of the upper end of k+1 switches set of the first brachium pontis, the second brachium pontis, the 3rd brachium pontis respectively, and wherein the value of k is 1～N-1; Three ends of N threephase load are connected with the lower end of N switches set of the lower end of N switches set of the lower end of N switches set of the first brachium pontis, the second brachium pontis, the 3rd brachium pontis respectively.

In above-mentioned N output three-phase 3N+3 switches set MMC inverter, power switch unit is made up of the first switching tube, second switch pipe, the first diode, the second diode and electric capacity.Wherein, the positive pole of electric capacity is connected with the collector electrode of the first switching tube, the negative electrode of the first diode, the emitter of the first switching tube is connected with the anode of the first diode, the collector electrode of second switch pipe, the negative electrode of the second diode, and the emitter of second switch pipe is connected with the anode of the second diode, the negative pole of electric capacity; The collector electrode of second switch pipe is as the first output, and the emitter of second switch pipe is as the second output.

In above-mentioned N output three-phase 3N+3 switches set MMC inverter, the second output of j power switch unit of i switches set of the first brachium pontis is connected with the first output of j+1 power switch unit of i switches set of the first brachium pontis, wherein j value is 1～n-1, and i value is 1～N+1; The second output of j power switch unit of i switches set of the second brachium pontis is connected with the first output of j+1 power switch unit of i switches set of the second brachium pontis; The second output of j power switch unit of i switches set of the 3rd brachium pontis is connected with the first output of j+1 power switch unit of i switches set of the 3rd brachium pontis.

In the control method of above-mentioned N output three-phase 3N+3 switches set MMC inverter, adopt phase-shifting carrier wave PWM to control the opening and turn-offing of each switching tube of each switches set, each switches set of the second brachium pontis and each switches set of the 3rd brachium pontis of the first brachium pontis, wherein i value is 1～N+1; J power switch unit of j power switch unit of j power switch unit of i switches set of the first brachium pontis, i switches set of the second brachium pontis and i switches set of the 3rd brachium pontis all adopts identical triangular wave as j carrier wave C _j, wherein the value of j is 1～n; N carrier wave 360 °/n of lagging phase angle successively; The end of the first brachium pontis of k load adopts k sinusoidal wave R of the first brachium pontis _lukk direct current biasing R superposes _dokobtain k modulating wave R of the first brachium pontis _luk+ R _dok, wherein the value of k is 1～N; The end of the second brachium pontis of k load adopts k sinusoidal wave R of the second brachium pontis _lvkk direct current biasing R superposes _dokobtain k modulating wave R of the second brachium pontis _lvk+ R _dok; The end of the 3rd brachium pontis of k load adopts k sinusoidal wave R of the 3rd brachium pontis _lwkk direct current biasing R superposes _dokobtain k modulating wave R of the 3rd brachium pontis _lwk+ R _dok; The k of a first brachium pontis sinusoidal wave R _luk, the second brachium pontis k sinusoidal wave R _lvkk the sinusoidal wave R with the 3rd brachium pontis _lwkphase place differs 120 successively ^°.

In above-mentioned control method, k modulating wave R of the first brachium pontis _luk+ R _dokwith j carrier wave C _jby k comparator, as k modulating wave R of the first brachium pontis _luk+ R _dokbe greater than j carrier wave C _jtime, k comparator output high level, as k modulating wave R of the first brachium pontis _luk+ R _dokbe less than j carrier wave C _jtime, k comparator output low level, wherein the value of k is 1～N; The output of the 1st comparator is as the control level of the second switch pipe gate pole of j power switch unit of the 1st switches set of the first brachium pontis; The output of k-1 comparator is by k-1 not gate, the output of k-1 not gate and the output of k comparator obtain the control level of the second switch pipe gate pole of j power switch unit of k switches set of the first brachium pontis by k-1 XOR gate, wherein the value of k is 2～N; The output of N comparator obtains the control level of the second switch pipe gate pole of j power switch unit of N+1 switches set of the first brachium pontis by N not gate; K modulating wave R of the second brachium pontis _lvk+ R _dokwith j carrier wave C _jby N+k comparator, as k modulating wave R of the second brachium pontis _lvk+ R _dokbe greater than j carrier wave C _jtime, N+k comparator output high level, as k modulating wave R of the second brachium pontis _lvk+ R _dokbe less than j carrier wave C _jtime, N+k comparator output low level, wherein the value of k is 1～N; The output of N+1 comparator is as the control level of the second switch pipe gate pole of j power switch unit of the 1st switches set of the second brachium pontis; The output of N+k-1 comparator is by N+k-1 not gate, the output of N+k-1 not gate and the output of N+k comparator obtain the control level of the second switch pipe gate pole of j power switch unit of k switches set of the second brachium pontis by N-1+k-1 XOR gate, wherein the value of k is 2～N; The output of 2*N comparator obtains the control level of the second switch pipe gate pole of j power switch unit of N+1 switches set of the second brachium pontis by 2*N not gate; K modulating wave R of the 3rd brachium pontis _lwk+ R _dokwith j carrier wave C _jby 2*N+k comparator, as k modulating wave R of the 3rd brachium pontis _lwk+ R _dokbe greater than j carrier wave C _jtime, 2*N+k comparator output high level, as k modulating wave R of the 3rd brachium pontis _lwk+ R _dokbe less than j carrier wave C _jtime, 2*N+k comparator output low level, wherein the value of k is 1～N; The output of 2*N+1 comparator is as the control level of the second switch pipe gate pole of j power switch unit of the 1st switches set of the 3rd brachium pontis; The output of 2*N+k-1 comparator is by 2*N+k-1 not gate, the output of 2*N+k-1 not gate and the output of 2*N+k comparator obtain the control level of the second switch pipe gate pole of j power switch unit of k switches set of the 3rd brachium pontis by 2* (N-1)+k-1 XOR gate, wherein the value of k is 2～N; The output of 3*N comparator obtains the control level of the second switch pipe gate pole of j power switch unit of N+1 switches set of the 3rd brachium pontis by 3*N not gate.

Mode of operation comprises that, with frequency mode of operation (CF pattern) and alien frequencies mode of operation (DF pattern), in CF pattern, the frequency of N road three-phase output is identical, and amplitude is not identical; In DF pattern, the frequency of N road three-phase output and amplitude are all different.

Compared with prior art, the advantage the utlity model has is: having N route voltage is the interchange output of 2n+1 level, output current wave is of high quality, the voltage stress that in power switch unit, each switching tube bears is only the 1/n of DC bus-bar voltage, can ensure that the voltage that in the converter course of work, all switching tubes bear equates, has well solved the voltage-sharing of switching tube simultaneously.Compare with existing three-phase 3N+3 switch converters, the N road output of N output three-phase 3N+3 switches set MMC inverter provided by the utility model is the interchange output of 2n+1 level line voltage, and the quality of output AC waveform is greatly improved.In addition, the voltage stress bearing of each switching tube is only the 1/n of DC bus-bar voltage, and control method provided by the utility model equates the voltage that in the converter course of work, all switching tubes bear, well solved the voltage-sharing of switching tube, this will be very beneficial for the application of N output three-phase 3N+3 switches set MMC inverter in high pressure and large-power occasions.Compare with existing MMC converter, N provided by the utility model output three-phase 3N+3 switches set MMC inverter has the three-phase alternating current output of N road, can be directly used in being connected of three-phase AC line of N bar different frequency, greatly reduces engineering cost.

Brief description of the drawings

Fig. 1 is the circuit structure diagram of N output three-phase 3N+3 switches set MMC inverter of the present utility model;

Fig. 2 is the circuit structure diagram of the switch power unit of the N output three-phase 3N+3 switches set MMC inverter shown in Fig. 1;

Fig. 3 a～Fig. 3 c is the phase-shifting carrier wave PWM control structure figure of the N output three-phase 3N+3 switches set MMC inverter shown in Fig. 1;

Fig. 4 a, 4b are that three output three-phase twelvemo passes are organized nine level MMC inverters and worked in respectively the modulating wave under CF pattern and DF pattern;

Fig. 5 a1, Fig. 5 a2, Fig. 5 a3, Fig. 5 b1, Fig. 5 b2, Fig. 5 b3 are the simulation waveform figure that nine level MMC inverters are organized and work in CF pattern and DF pattern in three output three-phase twelvemo passes.

Embodiment

For further setting forth content of the present utility model and feature, below in conjunction with accompanying drawing, specific embodiments of the present utility model is specifically described.But enforcement of the present utility model is not limited to this.

With reference to figure 1, N output three-phase 3N+3 switches set MMC inverter of the present utility model, comprises DC power supply U _dc, the first brachium pontis, the second brachium pontis, the 3rd brachium pontis, a N threephase load; Described the first brachium pontis is by N+1 switches set (B _u1, B _u2..., B _{u (N+1)}) and 2 inductance (L _u1, L _u2) be in series, described the second brachium pontis is by N+1 switches set (B _v1, B _v2..., B _{v (N+1})) and 2 inductance (Lv1, Lv2) be in series, described the 3rd brachium pontis is by N+1 switches set (B _w1, B _w2..., B _{w (N+1)}) and 2 inductance (L _w1, L _w2) be in series; I switches set B of the first brachium pontis _uiby n power switch unit (SM _bui1, SM _bui2..., SM _buin) be in series, i switches set B of the second brachium pontis _viby n power switch unit (SM _bvi1, SM _bvi2..., SM _bvin) be in series, i switches set B of the 3rd brachium pontis _wiby n power switch unit (SM _bwi1, SM _bwi2..., SM _bwin) be in series, wherein the value of i is 1～N+1; Three ends of k threephase load respectively with k+1 switches set B of the first brachium pontis _{u (k+1)}upper end o, k+1 switches set B of the second brachium pontis _{v (k+1)}upper end o, k+1 switches set B of the 3rd brachium pontis _{w (k+1)}upper end o connect, wherein the value of k is 1～N-1; Three ends of N threephase load respectively with N switches set B of the first brachium pontis _uNlower end p, N switches set B of the second brachium pontis _vNlower end p, N switches set B of the 3rd brachium pontis _wNlower end p connect; Three ends of k load are as the output of k road three-phase, and wherein the value of k is 1～N.

DC power supply U _dcpositive pole and the 1st switches set B of the first brachium pontis _u1upper end o, the 1st switches set B of the second brachium pontis _v1upper end o, the 1st switches set B of the 3rd brachium pontis _w1upper end o connect; The 1st switches set B of the first brachium pontis _u1lower end p and the 1st inductance L of the first brachium pontis _u1one end connect, the 1st inductance L of the first brachium pontis _u1the other end and the 2nd switches set B of the first brachium pontis _u2upper end o connect; I switches set B of the first brachium pontis _uilower end p and i+1 switches set B of the first brachium pontis _{u (i+1)}upper end o connect, wherein the value of i is 2～N-1; N switches set B of the first brachium pontis _uNlower end p and the 2nd inductance L of the first brachium pontis _u2one end connect, the 2nd inductance L of the first brachium pontis _u2the other end and N+1 switches set B of the first brachium pontis _{u (N+1)}upper end o connect; The circuit structure of the circuit structure of the second brachium pontis, the circuit structure of the 3rd brachium pontis and the first brachium pontis is in full accord; Three ends of k threephase load respectively with k+1 switches set B of the first brachium pontis _{u (k+1)}upper end o, k+1 the switches set B of the 3rd brachium pontis of k+1 switches set Bv (k+1) of upper end o, the second brachium pontis _{w (k+1)}upper end o connect, wherein the value of k is 1～N-1; Three ends of N threephase load respectively with N switches set B of the first brachium pontis _uNlower end p, N switches set B of the second brachium pontis _vNlower end p, N switches set B of the 3rd brachium pontis _wNlower end p connect.

Fig. 2 illustrates the circuit structure diagram of the switch power unit of the N output three-phase 3N+3 switches set MMC inverter shown in Fig. 1.Power switch unit is by the first switching tube S ₁, second switch pipe S ₂, the first diode D ₁, the second diode D ₂and capacitor C _sMform.Wherein, capacitor C _sMpositive pole and the first switching tube S ₁collector electrode, the first diode D ₁negative electrode connect, the first switching tube S ₁emitter and the first diode D ₁anode, second switch pipe S ₂collector electrode, the second diode D ₂negative electrode connect, second switch pipe S ₂emitter and the second diode D ₂anode, capacitor C _sMnegative pole connect; Second switch pipe S ₂collector electrode as the first output, second switch pipe S ₂emitter as the second output.

As shown in Figure 1, i switches set B of the first brachium pontis _uij power switch unit SM _buijthe second output and i switches set B of the first brachium pontis _uij+1 power switch unit S _{mBui (j+1)}first output connect, wherein j value is 1～n-1, i value is 1～N+1; J the power switch unit SM of i switches set Bvi of the second brachium pontis _bvijthe second output and j+1 the power switch unit SM of i switches set Bvi of the second brachium pontis _{bvi (j+1)}first output connect; J the power switch unit SM of i switches set Bvi of the 3rd brachium pontis _bvijthe second output and j+1 the power switch unit SM of i switches set Bvi of the 3rd brachium pontis _{bvi (j+1)}first output connect.

As shown in Figure 1, interchange output line voltage in k road is:

$u_{\mathrm{uvk}}=\frac{\underset{i=N+1-K}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}}{2}-\frac{\underset{i=N+1-k}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}}{2},(k=\mathrm{1,2},\·\·\·,N)---\left(1\right)$

$u_{\mathrm{vwk}}=\frac{\underset{i=N+1-K}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}}{2}-\frac{\underset{i=N+1-k}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}}{2},(k=\mathrm{1,2},\·\·\·,N)---\left(2\right)$

$u_{\mathrm{wuk}}=\frac{\underset{i=N+1-K}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bui}}}{2}-\frac{\underset{i=N+1-k}{\overset{N+1}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}-\underset{i=1}{\overset{k}{\mathrm{\Σ}}}{u}_{\mathrm{Bvi}}}{2},(k=\mathrm{1,2},\·\·\·,N)---\left(3\right)$

In formula (1)～(3), u _buibe the output voltage of i switches set of the first brachium pontis, u _bvibe the output voltage of i switches set of the second brachium pontis, u _bwiit is the output voltage of i switches set of the 3rd brachium pontis.

N output three-phase 3N+3 switches set MMC inverter shown in Fig. 1 adopts phase-shifting carrier wave PWM to control, as shown in Fig. 3 a～Fig. 3 c.I switches set B of the first brachium pontis _uij power switch unit SM _bui _j, the second brachium pontis j the power switch unit SM of i switches set Bvi _bviji the switches set B with the 3rd brachium pontis _wij power switch unit SM _bwijall adopt identical triangular wave as j carrier wave C _j, wherein i value is 1～N+1, the value of j is 1～n; N carrier wave (C ₁, C ₂..., C _n) 360 °/n of lagging phase angle successively; The end a of the first brachium pontis of k load _ukadopt k sinusoidal wave R of the first brachium pontis _lukk direct current biasing R superposes _dokobtain k modulating wave R of the first brachium pontis _luk+ R _dok, wherein the value of k is 1～N; The end a of the second brachium pontis of k load _vkadopt k sinusoidal wave R of the second brachium pontis _lvkk direct current biasing R superposes _dokobtain k modulating wave R of the second brachium pontis _lvk+ R _dok; The end a of the 3rd brachium pontis of k load _wkadopt k sinusoidal wave R of the 3rd brachium pontis _lwkk direct current biasing R superposes _dokobtain k modulating wave R of the 3rd brachium pontis _lwk+ R _dok; The k of a first brachium pontis sinusoidal wave R _luk, the second brachium pontis k sinusoidal wave R _lvkk the sinusoidal wave R with the 3rd brachium pontis _lwkphase place differs 120 ° successively.

Each brachium pontis that described control method can ensure described converter each time be carved with the output voltage u of n power switch unit _sM=E, the output voltage u of N*n power switch unit _sM=0, meet with wherein E is capacitor C in each power switch unit _sMon voltage, and have E=U _dc/ n.

Organize nine level MMC inverters as example taking three output three-phase twelvemo passes, Fig. 4 a illustrates that it works in the 1st modulating wave R of the first brachium pontis under CF pattern _lu1+ R _do1, the first brachium pontis the 2nd modulating wave R _lu2+ R _do1, the first brachium pontis the 3rd modulating wave R _lu3+ R _do1with j carrier wave C _jrelation.Can find out the 1st sinusoidal wave R of the first brachium pontis from Fig. 4 a _lu1, the first brachium pontis the 2nd sinusoidal wave R _lu2the 3rd the sinusoidal wave R with the first brachium pontis _lu3frequency identical, amplitude is not identical.Fig. 4 b illustrates that it works in the 1st modulating wave R of the first brachium pontis under DF pattern _lu1+ R _do1, the first brachium pontis the 2nd modulating wave R _lu2+ R _do1, the first brachium pontis the 3rd modulating wave R _lu3+ R _do1with j carrier wave C _jrelation.Can find out the 1st sinusoidal wave R of the first brachium pontis from Fig. 4 b _lu1, the first brachium pontis the 2nd sinusoidal wave R _lu2the 3rd the sinusoidal wave R with the first brachium pontis _lu3frequency and amplitude all not identical.The 1st the 1st modulating wave R of the second brachium pontis _lv1+ R _do1, the second brachium pontis the 2nd modulating wave R _lv2+ R _do1, the second brachium pontis the 3rd modulating wave R _lv3+ R _do1with j carrier wave C _jrelation and the first brachium pontis the 1st modulating wave R _lu1+ R _do1, the first brachium pontis the 2nd modulating wave R _lu2+ R _do1, the first brachium pontis the 3rd modulating wave R _lu3+ R _do1with j carrier wave C _jrelation identical; The 1st the 1st modulating wave R of the 3rd brachium pontis _lw1+ R _do1, the 3rd brachium pontis the 2nd modulating wave R _lw2+ R _do1, the 3rd brachium pontis the 3rd modulating wave R _lw3+ R _do1with j carrier wave C _jrelation and the first brachium pontis the 1st modulating wave R _lu1+ R _do1, the first brachium pontis the 2nd modulating wave R _lu2+ R _do1, the first brachium pontis the 3rd modulating wave R _lu3+ R _do1with j carrier wave C _jrelation identical.

Fig. 5 a1, Fig. 5 a2, Fig. 5 a3 is the simulation waveform figure that nine level MMC inverters are organized and work in CF pattern in three output three-phase twelvemo passes, 3 line voltages of the 1st threephase load successively, 3 line currents of the 1st threephase load, 3 line voltages of the 2nd threephase load, 3 line currents of the 2nd threephase load, 3 line voltages of the 3rd threephase load and 3 line currents of the 3rd threephase load, from scheming visible the 1st threephase load, the 2nd threephase load is identical with the line current frequency of the 3rd threephase load, the 1st threephase load, the line current amplitude of the 2nd threephase load and the 3rd threephase load is not identical, Fig. 5 b1, Fig. 5 b2, Fig. 5 b3 are the simulation waveform figure that nine level MMC inverters are organized and work in DF pattern in three output three-phase twelvemo passes, 3 line voltages of 3 line currents of 3 line voltages of 3 line currents of 3 line voltages of the 1st threephase load, the 1st threephase load, the 2nd threephase load, the 2nd threephase load, the 3rd threephase load and 3 line currents of the 3rd threephase load successively, all not identical from scheming power frequency and the amplitude of visible the 1st threephase load, the 2nd threephase load and the 3rd threephase load.

Above-described embodiment is preferably execution mode of the utility model; but execution mode of the present utility model is not limited by the examples; other any do not deviate from change, the modification done under Spirit Essence of the present utility model and principle, substitutes, combination, simplify; all should be equivalent substitute mode, within being included in protection range of the present utility model.

Claims (5)

1.N output three-phase 3N+3 switches set MMC inverter, is characterized in that: comprise DC power supply (U _dc), the first brachium pontis, the second brachium pontis, the 3rd brachium pontis and N threephase load; Described the first brachium pontis is by N+1 switches set (B _u1, B _u2..., B _{u (N+1)}) and 2 inductance (L _u1, L _u2) be in series, described the second brachium pontis is by N+1 switches set (B _v1, B _v2..., B _{v (N+1)}) and 2 inductance (L _v1, L _v2) be in series, described the 3rd brachium pontis is by N+1 switches set (B _w1, B _w2..., B _{w (N+1)}) and 2 inductance (L _w1, L _w2) be in series; I switches set (B of the first brachium pontis _ui) by n power switch unit (SM _bui1, SM _bui2..., SM _buin) be in series, i switches set (B of the second brachium pontis _vi) by n power switch unit (SM _bvi1, SM _bvi2..., SM _bvin) be in series, i switches set (B of the 3rd brachium pontis _wi) by n power switch unit (SM _bwi1, SM _bwi2..., SM _bwin) be in series, wherein the value of i is 1 ~ N+1; Three ends of k threephase load respectively with k+1 switches set (B of the first brachium pontis _{u (k+1)}) upper end (o), k+1 switches set (B of the second brachium pontis _{v (k+1)}) upper end (o), k+1 switches set (B of the 3rd brachium pontis _{w (k+1)}) upper end (o) connect, wherein the value of k is 1 ~ N-1; Three ends of N threephase load respectively with N switches set (B of the first brachium pontis _uN) lower end (p), N switches set (B of the second brachium pontis _vN) lower end (p), N switches set (B of the 3rd brachium pontis _wN) lower end (p) connect; Three ends of k load are as the output of k road three-phase, and wherein the value of k is 1 ~ N, N>2, and n is positive integer.

2. N output three-phase 3N+3 switches set MMC inverter according to claim 1, is characterized in that: two inductance (L of the first brachium pontis _u1, L _u2) intercouple, form a pair of coupling inductance; Two inductance (L of the second brachium pontis _v1, L _v2) intercouple, form a pair of coupling inductance; Two inductance (L of the 3rd brachium pontis _w1, L _w2) intercouple, form a pair of coupling inductance.

3. N output three-phase 3N+3 switches set MMC inverter according to claim 1, is characterized in that: DC power supply (U _dc) positive pole and the 1st switches set (B of the first brachium pontis _u1) upper end (o), the 1st switches set (B of the second brachium pontis _v1) upper end (o), the 1st switches set (B of the 3rd brachium pontis _w1) upper end (o) connect; The 1st switches set (B of the first brachium pontis _u1) the 1st inductance (L of lower end (p) and the first brachium pontis _u1) one end connect, the 1st inductance (L of the first brachium pontis _u1) the other end and the 2nd switches set (B of the first brachium pontis _u2) upper end (o) connect; I switches set (B of the first brachium pontis _ui) i+1 switches set (B of lower end (p) and the first brachium pontis _{u (i+1)}) upper end (o) connect, wherein the value of i is 2 ~ N-1; N switches set (B of the first brachium pontis _uN) the 2nd inductance (L of lower end (p) and the first brachium pontis _u2) one end connect, the 2nd inductance (L of the first brachium pontis _u2) the other end and N+1 switches set (B of the first brachium pontis _{u (N+1)}) upper end (o) connect; The circuit structure of the circuit structure of the second brachium pontis, the circuit structure of the 3rd brachium pontis and the first brachium pontis is in full accord; Three ends of k threephase load respectively with k+1 switches set (B of the first brachium pontis _{u (k+1)}) upper end (o), k+1 switches set (B of the second brachium pontis _{v (k+1)}) upper end (o), k+1 switches set (B of the 3rd brachium pontis _{w (k+1)}) upper end (o) connect, wherein the value of k is 1 ~ N-1; Three ends of N threephase load respectively with N switches set (B of the first brachium pontis _uN) lower end (p), N switches set (B of the second brachium pontis _vN) lower end (p), N switches set (B of the 3rd brachium pontis _wN) lower end (p) connect.

4. N output three-phase 3N+3 switches set MMC inverter according to claim 1, is characterized in that: power switch unit is by the first switching tube (S ₁), second switch pipe (S ₂), the first diode (D ₁), the second diode (D ₂) and electric capacity (C _sM) form, wherein, electric capacity (C _sM) positive pole and the first switching tube (S ₁) collector electrode, the first diode (D ₁) negative electrode connect, the first switching tube (S ₁) emitter and the first diode (D ₁) anode, second switch pipe (S ₂) collector electrode, the second diode (D ₂) negative electrode connect, second switch pipe (S ₂) emitter and the second diode (D ₂) anode, electric capacity (C _sM) negative pole connect; Second switch pipe (S ₂) collector electrode as the first output, second switch pipe (S ₂) emitter as the second output.

5. N output three-phase 3N+3 switches set MMC inverter according to claim 1, is characterized in that: i switches set (B of the first brachium pontis _ui) j power switch unit (SM _buij) the second output and i switches set (B of the first brachium pontis _ui) j+1 power switch unit (SM _{bui (j+1)}) first output connect, wherein j value is 1 ~ n-1, i value is 1 ~ N+1; I switches set (B of the second brachium pontis _vi) j power switch unit (SM _bvij) the second output and i switches set (B of the second brachium pontis _vi) j+1 power switch unit (SM _{bvi (j+1)}) first output connect; I switches set (B of the 3rd brachium pontis _vi) j power switch unit (SM _bvij) the second output and i switches set (B of the 3rd brachium pontis _vi) j+1 power switch unit (SM _{bvi (j+1)}) first output connect.