CN203707816U - A power supply management chip used on a USP - Google Patents

A power supply management chip used on a USP Download PDF

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Publication number
CN203707816U
CN203707816U CN201320816541.2U CN201320816541U CN203707816U CN 203707816 U CN203707816 U CN 203707816U CN 201320816541 U CN201320816541 U CN 201320816541U CN 203707816 U CN203707816 U CN 203707816U
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CN
China
Prior art keywords
circuit
chip
analogue
management chip
simulation
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Expired - Fee Related
Application number
CN201320816541.2U
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Chinese (zh)
Inventor
林丰成
陈力生
孙化
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QED MICROELECTRONICS (SHENZHEN) Inc
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QED MICROELECTRONICS (SHENZHEN) Inc
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Priority to CN201320816541.2U priority Critical patent/CN203707816U/en
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Publication of CN203707816U publication Critical patent/CN203707816U/en
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Expired - Fee Related legal-status Critical Current

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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

The utility model discloses a power supply management chip used on a USP, belongs to the field of high performance intelligent UPS battery control chips and systems, and is widely applicable to portable consumer electronic devices such as laptops, cameras, IPADs, DVDs and intelligent handsets. The power supply management chip used on the USP comprises an analogue and digital circuit, an analogue high pressure linear voltage regulator LDO17, an analogue low pressure linear voltage regulator LDO3.3, an analogue micro-current sampling circuit CurrentSample, an analogue selector MUX, an analogue peripheral switch MOS tube drive circuit FETDriver, an SPI interface digital circuit SPIModule, an analogue clock oscillator OSC and a battery balancing circuit CellBalance. The chip supports cascade application of a single, two, three to sixteen lithium ion batteries. The chip can carry out automatic and high safety degree overvoltage, over-current and overheating protection on the lithium ion batteries in a charging and discharge process, and can also record changes of voltages, currents and residual electricity of the lithium ion batteries in real time in a usage process.

Description

A kind of for the power management chip on UPS
Technical field
The utility model relates to UPS(Uninterruptible Power Supply) chip application of power management.
Background technology
The invention belongs to high-performance intelligence UPS battery group control chip and system field; can be widely used in notebook computer, video camera; IPAD; DVD; in the portable consumer electronic device such as smart mobile phone; this chip is supported single-unit; 2 joints, 3 application of the manystage cascade connections that save to 16 joint lithium ion batteries; the charging and discharging process of lithium ion battery is carried out to overvoltage, overcurrent and the overtemperature protection of full-automatic and high security, and can the in use variation of voltage, electric current and dump energy of real time record lithium ion battery.Along with the development of informationized society, lithium ion battery also will obtain deeper development and application in every field such as communication, automotive electronics, instrument and meter, Aero-Space, ocean explorations.In aerospace industry, lithium ion battery can constitute jointly power supply with solar cell, this power supply is from miniaturization, lightweight angle by more more advantageous than the associating power supply of Ni-MH battery or zinc-silver oxide cell composition, and lot of domestic and international moonlet has brought into use lithium ion battery group as storage battery.Also has the power supply in some military equipments, comprise that power car starts battery, wireless communication station power supply, extraordinary weapons power supply, miniature robot surveillance plane electrical source of power, built-in type land mine power supply with fuze mechanism etc., all can adopt lithium ion battery as power supply.Therefore, the development of battery industry, the particularly application and development of lithium ion battery group managing chip have extraordinary prospect.
Although in succession there is the intelligent management chip of various lithium ion battery on domestic and international market, but be mainly all to concentrate in the management study of single-stage battery, also immature to the research of battery pack, and in practical application, under many circumstances, battery all needs to be concatenated use, and the intellectualized management system of single-stage battery just cannot meet the demands for battery pack like this.Simultaneously, lithium ion battery is very responsive with overdischarge to overcharging, these problems are used and become even more important for multiple lithium ion battery series connection, because in the time that series connection is used, even the performance of single battery better, quality is good again, if each cell characteristic is inconsistent when combo is used, capital causes the seriously inconsistent of the inner each cell charging and discharging situation of battery pack, with regard to inner cell, series connection is used to use more easily to overcharge and cross than single puts phenomenon, and is difficult for finding.Therefore, if battery pack is not realized to intelligent management, be easy to occur in the time of any battery behavior exacerbated, the chain reaction, the aggravation property that cause other battery generation domino effect in battery pack are damaged, it is poor poorer to make, good also variation rapidly.For addressing the above problem, more conventional method is: the consistency that ensures each battery outgoing and initial voltage in manufacturing process; By selected cell pairing, be combined into the battery pack of high-quality, reduce to greatest extent the difference between cell.Although these schemes can be optimized the performance of battery pack to a certain extent, reduce the rate of finished products of battery manufacture producer, increase cost, even if battery pack is selected pairing, characteristic is all identical, along with using its characteristic also can change, and change inconsistent.In order to address this problem, some intelligent battery developers have mixed special equalizing system to lithium battery pack management system, utilize balancer to make lithium battery group in use substantially keep the balance of electric weight between each cell, in charge and discharge process, can effectively prevent that certain battery from taking the lead in reaching the phenomenon discharging and recharging.But the common circuit of this special balancer is very huge, greatly increased the complexity of total system circuit, and most of balancer is not easy of integration.Thereby research and develop and be a kind ofly easy to integrated management system and lithium battery group is realized to intelligent management become a kind of necessary.
Summary of the invention
The utility model provides a high performance intelligent UPS battery control chip, comprises simulation and digital circuit, simulated high-pressure linear voltage regulator LDO17, simulation low pressure linear voltage regulator LDO3.3, simulates micro-current sampling circuit Current Sample, analogue selector MUX, analog peripherals switch MOS tube drive circuit FET Driver, SPI interface digital circuit SPI Module, simulated clock simulation clock oscillator OSC, cell balancing circuit Cell Balance; Wherein, SPI interface digital circuit SPI Module respectively with analog peripherals switch MOS tube drive circuit FET Driver, simulate micro-current sampling circuit Current Sample, analogue selector MUX and cell balancing circuit Cell Balance is connected; Analogue selector MUX is also connected with the micro-current sampling circuit Current Sample of simulation, and, analogue selector MUX, simulated high-pressure linear voltage regulator LDO17 are connected with 16 assistant warden connection battery Cell inputs of outside respectively with simulation low pressure linear voltage regulator LDO3.3, and cell balancing circuit Cell Balance is connected with 16 assistant warden connection battery Cell outputs of outside respectively; The embedded simulated clock simulation clock oscillator of SPI interface digital circuit SPI Module OSC.
The utility model will be widely used in smart mobile phone, IPAD, in the portable consumer electronic device such as notebook computer, video camera, can be used for office space UPS stand-by power supply controller simultaneously, prevention is in the time that external power source suddenly disappears, can play the function of stand-by power supply, thereby ensure that systems soft ware is unlikely to loss of information, system hardware is not damaged.This chip is supported single-unit; 2 joints, 3 joints are until the application of the manystage cascade connection of 16 joint lithium ion batteries; the charging and discharging process of lithium ion battery is carried out to overvoltage, overcurrent and the overtemperature protection of full-automatic and high security, and can the in use variation of voltage, electric current and dump energy of real time record lithium ion battery.In addition, this intelligent battery group managing chip can also carry out full-automatic regulation to the charging and discharging currents of every joint lithium ion battery in cascade battery pack, ensures the electric quantity balancing of every joint lithium ion battery.Therefore, this intelligent battery group managing chip effectively raises the safety in utilization of lithium ion battery group, also extended the useful life of lithium ion battery group simultaneously, meet the fundamental policies of country-driven environmental protection and energy saving, carrying out promoting the design level of China in integrated circuit industry of this project, dwindles with the gap of international most advanced level significant.
Brief description of the drawings
Fig. 1 is system principle application block diagram of the present utility model.
Fig. 2 is chip circuit theory diagram.
Fig. 3 analog circuit bias current design drawing.
Fig. 4 analog circuit band gap voltage schematic diagram.
Fig. 5 reference voltage design principle figure.
Fig. 6 simulates LDO low-voltage voltage design principle figure.
Fig. 7 simulates LDO high voltage voltage design principle figure.
Fig. 8 simulated clock simulation clock oscillator design schematic diagram.
Embodiment
In Fig. 1, one chip can be managed separately 16 batteries, and multiple chips can manage exceeding 16 batteries by cascade system, comprises monitoring to voltage and the measurement of electric current.Whole system peripheral component is little.
Fig. 2 is chip internal schematic diagram.It is by high-voltage linear pressurizer LDO17, low pressure linear voltage regulator, and sample rate current circuit Current Sample, clock oscillator OSC, battery charging and discharging balancing circuitry Cell Blance, digital circuit SPI, 16 select an analogue selector composition MUX[4:1] composition.Necessary intermediate level during LDO17 designs, generates 17V source of stable pressure by the 16 approximately 70V voltages of altering battery generation, offers analog circuit and uses, and produce thus 3V voltage supply digital circuit SPI use.Current sampling circuit can detect the electric current of 1uA.OSC is clock signal, produces the inner clock signal using.Analog selection circuit can be exported every batteries voltage difference.
Wherein, be directly on chip, to design and use simulated high-pressure and low pressure pressurizer, for producing 17V and 3V stabilized power supply from 16 joint high voltage sourcies for simulation and digital power system power supply in chip.
And be directly in chip, to design to have used the micro-current sampling circuit structure of simulation, can be to external uA level current sample.
It is characterized in that directly on chip, designing and having used analogue selector, can select separately the voltage at any batteries two ends, and export its value.
And be directly on chip, to design and used analog peripherals switch MOS tube drive circuit, this switch is directly used in the control of peripheral high-power MOS, makes system in safe work state.
And be directly on chip, to design and used SPI digital interface circuit, by software, can programme to chip internal register, and can change its state.
And be directly on chip, to design and used embedded simulated clock simulation clock oscillator, provide chip required clock signal.
And be directly on chip design used cell balancing circuit, ensured that 16 alter every batteries in battery and have identical charging and discharging state, extended greatly the useful life of battery.
Fig. 3 is simulation reference offset current circuit, and he provides all reference voltages to use to other analog circuits.The feature with low-power consumption, total current is less than 4uA.
Fig. 4 is band-gap reference circuit, produces stable 1.2V voltage by parasitic triode and negative-feedback circuit, and overall power is less than 500pA.
Fig. 5 is the design of reference voltage.By a linear amplifier, export required reference voltage.This circuit need to be exported 0.8V, 1.0V, 2.0V reference voltage.
Fig. 6, Fig. 7 is the stable output of linear voltage regulator 17V, and power consumption is less than 28uA and 3V voltage, and power consumption is less than 18uA.
Fig. 8 is pierce circuit.Cycle oscillator 1Mhz, the about 58uA of power consumption, clock accuracy is less than 1%.

Claims (2)

1. for the power management chip on UPS, it is characterized in that: comprise simulation and digital circuit, simulated high-pressure linear voltage regulator LDO17, simulation low pressure linear voltage regulator LDO3.3, simulate micro-current sampling circuit Current Sample, analogue selector MUX, analog peripherals switch MOS tube drive circuit FET Driver, SPI interface digital circuit SPI Module, simulated clock simulation clock oscillator OSC, cell balancing circuit Cell Balance;
Wherein, SPI interface digital circuit SPI Module respectively with analog peripherals switch MOS tube drive circuit FET Driver, simulate micro-current sampling circuit Current Sample, analogue selector MUX and cell balancing circuit Cell Balance is connected;
Analogue selector MUX is also connected with the micro-current sampling circuit Current Sample of simulation, and, analogue selector MUX, simulated high-pressure linear voltage regulator LDO17 are connected with 16 assistant warden connection battery Cell inputs of outside respectively with simulation low pressure linear voltage regulator LDO3.3, and cell balancing circuit Cell Balance is connected with 16 assistant warden connection battery Cell outputs of outside respectively;
The embedded simulated clock simulation clock oscillator of SPI interface digital circuit SPI Module OSC.
2. power management chip according to claim 1, is characterized in that directly design use simulated high-pressure and low pressure pressurizer on chip, for producing 17V and 3V stabilized power supply from 16 joint high voltage sourcies for simulation and digital power system power supply in chip.
3. power management chip according to claim 1, is characterized in that directly in chip, designing to have used simulating micro-current sampling circuit structure, can be to external uA level current sample.
4. power management chip according to claim 1, is characterized in that directly on chip, designing and having used analogue selector, can select separately the voltage at any batteries two ends, and export its value.
5. power management chip according to claim 1, is characterized in that directly on chip, designing and having used analog peripherals switch MOS tube drive circuit, and this switch is directly used in the control of peripheral high-power MOS, makes system in safe work state.
6. power management chip according to claim 1, is characterized in that directly on chip, designing and having used SPI digital interface circuit.
7. power management chip according to claim 1, is characterized in that directly on chip, designing and having used embedded simulated clock simulation clock oscillator, provides chip required clock signal.
8. power management chip according to claim 1, is characterized in that directly design has been used cell balancing circuit on chip, has ensured that 16 alter every batteries in battery and have identical charging and discharging state, has extended greatly the useful life of battery.
CN201320816541.2U 2013-12-13 2013-12-13 A power supply management chip used on a USP Expired - Fee Related CN203707816U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320816541.2U CN203707816U (en) 2013-12-13 2013-12-13 A power supply management chip used on a USP

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320816541.2U CN203707816U (en) 2013-12-13 2013-12-13 A power supply management chip used on a USP

Publications (1)

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CN203707816U true CN203707816U (en) 2014-07-09

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620896B1 (en) 2016-04-21 2017-04-11 Nikhil Dubbaka Vehicle and base station assembly
CN110667497A (en) * 2019-09-10 2020-01-10 金陵科技学院 Power supply mechanism of positioner
CN114245522A (en) * 2021-12-23 2022-03-25 芜湖雄狮汽车科技有限公司 Multifunctional microcontroller and vehicle

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620896B1 (en) 2016-04-21 2017-04-11 Nikhil Dubbaka Vehicle and base station assembly
US9742112B1 (en) 2016-04-21 2017-08-22 Nikhil Dubbaka Automatic gravity connector
US10090621B2 (en) 2016-04-21 2018-10-02 Nikhil Dubbaka Automatic gravity connector
CN110667497A (en) * 2019-09-10 2020-01-10 金陵科技学院 Power supply mechanism of positioner
CN114245522A (en) * 2021-12-23 2022-03-25 芜湖雄狮汽车科技有限公司 Multifunctional microcontroller and vehicle

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CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140709

Termination date: 20141213

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