CN203661018U - Computer time-delay starter - Google Patents
Computer time-delay starter Download PDFInfo
- Publication number
- CN203661018U CN203661018U CN201420000762.7U CN201420000762U CN203661018U CN 203661018 U CN203661018 U CN 203661018U CN 201420000762 U CN201420000762 U CN 201420000762U CN 203661018 U CN203661018 U CN 203661018U
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- capacitor
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Abstract
The utility model relates to a computer time-delay starter. The computer time-delay starter comprises a capacitor C1, a 555 chip IC1, an optoelectronic coupler IC2, a triode IC3, a triode IC4 and a capacitor C1, wherein the optoelectronic coupler IC2 is connected with a host power switch, the optoelectronic coupler IC2 is connected with a standby power line and a power grounding wire of a host, an output pin of the 555 chip IC1 is connected with the optoelectronic coupler IC2, a resistor R1 is connected with an adjustable resistor R2 in parallel and is connected with the capacitor C1 in series, the triode IC3 is connected with the capacitor C1 in parallel and is under the control of +5V output wire voltage of a computer mainboard, and a resistor R3 is connected with the triode IC4 in series, then is connected with the capacitor C1 in parallel and is under the control of the output pin of the 555 chip IC1. The computer time-delay starter does not need characteristic setting or manual operation and can avoid data loss and software and hardware loss when power failure occurs suddenly.
Description
Technical field
The utility model relates to a kind of computer delayed startup device.
Background technology
At network center or other in particular cases, the computer that we may need us can start after incoming call more automatically having a power failure, as the WEB server of unit, the computer of the special purposes such as monitoring server.Generally, it is mainly by [POWER MANAGEMENT SETUP]->[PWR Lost Resume State is set that the computer that we can solve computer by the CMOS of design computer is restarted problem] option solves.Although this way is feasible, there is a weak point.That is exactly, once grid transmission, computer can be restarted at once.Electrical network, often can Frequent trip in the time of fault, in one minute, may have the transmission process that has a power failure several times.Now computer can frequently be restarted, and is fatal in this case to the damage of computer.Another kind method is to use ups power.After grid cut-off, continue to computer power supply, until electrical network power transmission again.Power failure is at short notice soluble, but the power failure of exceedance minute, ups power also can be forced to close by computer because power supply exhausts.In the time that computer is sent a telegram here, still inevitably cause the damage of the frequent start of computer.
Utility model content
The utility model is in order to make up the defect of prior art, provides a kind of and guaranteeing after the stabilization of power grids, to restart computer, thereby avoid the computer delayed startup device of soft and hardware loss.
The utility model is achieved by the following technical solution:
A kind of computer delayed startup device, comprise capacitor C 1, 555 chip IC I, photoelectrical coupler IC2, triode IC3, triode IC4 and capacitor C 1, described photoelectrical coupler IC2 is connected with host power switch, photoelectrical coupler IC2 is connected with standby power line and power ground on main frame, the output pin of described 555 chip IC 1 is connected with photoelectrical coupler IC2, resistance R 1 and adjustable resistance R2 are in parallel and connect with capacitor C 1, described triode IC3 is in parallel with capacitor C 1, and be subject in computer main board+5V output line voltage control, resistance R 3 is in parallel with capacitor C 1 after connecting with triode IC4, and be subject to 555 chip IC 1 output pin controls.
The beneficial effects of the utility model are: a kind of computer delayed startup of the utility model device, without special setting, without manual operation, can avoid causing data to run off and soft and hardware loss in the time of power-off suddenly.
Brief description of the drawings
Below in conjunction with accompanying drawing, the utility model is further described.
Accompanying drawing 1 is circuit control principle drawing of the present utility model;
Embodiment
Accompanying drawing 1 is a kind of specific embodiment of the present utility model.A kind of computer delayed startup of this utility model device, comprise capacitor C 1, 555 chip IC 1, photoelectrical coupler IC2, triode IC3, triode IC4 and capacitor C 1, described photoelectrical coupler IC2 is connected with host power switch, photoelectrical coupler IC2 is connected with standby power line and power ground on main frame, the output pin of described 555 chip IC 1 is connected with photoelectrical coupler IC2, resistance R 1 and adjustable resistance R2 are in parallel and connect with capacitor C 1, described triode IC3 is in parallel with capacitor C 1, and be subject in computer main board+5V output line voltage control, resistance R 3 is in parallel with capacitor C 1 after connecting with triode IC4, and be subject to 555 chip IC 1 output pin controls.
A kind of computer delayed startup of this utility model device, when after electrical network incoming call, the standby power line of main frame has voltage 5V input at once, this magnitude of voltage starts to charge to capacitor C 1 by resistance R 1, because electric capacity is larger, resistance is also larger, so it is slow that the voltage in capacitor C 1 rises, because capacitor C 1 voltage is lower, 555 chip IC 1 detect that voltage is lower, can not start photoelectrical coupler IC2, the mains switch of main frame can not be closed, along with the prolongation of time, voltage in capacitor C 1 is also slowly raising, in the time that voltage reaches critical value, 555 chip IC 1 have detected after sufficiently high voltage, the voltage that b is ordered is raise, thereby start photoelectrical coupler IC2, thereby make the mains switch closure on computer, after mains switch closure, computer starts to start immediately, when after launch computer, computer+5V voltage output line just had the output of 5V voltage at once, this magnitude of voltage is connected to the c end of triode IC3 through P1 interface, the electronic switch of controlling, make 1 liang of terminal shortcircuit of capacitor C, capacitor C 1 two ends are that the lower voltage that a is ordered arrives low-down degree, 555 chip IC 1 can't detect enough voltage, thereby will close photoelectrical coupler IC2 unclamps the mains switch of computer, computer has completed whole start-up courses, adjust the size of resistance R 2 adjustable resistances, can change the charging interval of the voltage in capacitor C 1, thereby the delay time of control circuit, if computer is not activated after switch closure, + 5V voltage output line does not have Voltage-output, but the voltage that now b is ordered must be higher, now triode IC4 is closed, the voltage that a is ordered will discharge by resistance R 3, thereby the voltage drop that a is ordered, the voltage drop of ordering as a to a certain extent, 555 chip IC 1 detect after enough low voltage, the voltage that will make shutoff b that b is ordered order, thereby switch is unclamped, the switch of triode IC4 is also released simultaneously, capacitor C 1 two ends stop electric discharge, capacitor C 1 is just got back to charging process again, so repeatedly carry out, until computer finally starts.
The utility model is not limited to above-mentioned execution mode, anyone should learn under enlightenment of the present utility model, make with the utlity model has identical or close technical scheme, within all falling into protection range of the present utility model.
Technology, shape, structure part that the utility model is not described in detail are known technology.
Claims (1)
1. a computer delayed startup device, it is characterized in that: comprise capacitor C 1, 555 chip IC 1, photoelectrical coupler IC2, triode IC3, triode IC4 and capacitor C 1, described photoelectrical coupler IC2 is connected with host power switch, photoelectrical coupler IC2 is connected with standby power line and power ground on main frame, the output pin of described 555 chip IC 1 is connected with photoelectrical coupler IC2, resistance R 1 and adjustable resistance R2 are in parallel and connect with capacitor C 1, described triode IC3 is in parallel with capacitor C 1, and be subject in computer main board+5V output line voltage control, resistance R 3 is in parallel with capacitor C 1 after connecting with triode IC4, and be subject to 555 chip IC 1 output pin controls.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420000762.7U CN203661018U (en) | 2014-01-02 | 2014-01-02 | Computer time-delay starter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201420000762.7U CN203661018U (en) | 2014-01-02 | 2014-01-02 | Computer time-delay starter |
Publications (1)
Publication Number | Publication Date |
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CN203661018U true CN203661018U (en) | 2014-06-18 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201420000762.7U Expired - Fee Related CN203661018U (en) | 2014-01-02 | 2014-01-02 | Computer time-delay starter |
Country Status (1)
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CN (1) | CN203661018U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107425835A (en) * | 2016-05-23 | 2017-12-01 | 中兴通讯股份有限公司 | A kind of on/off circuit |
CN107749666A (en) * | 2017-10-27 | 2018-03-02 | 天津津航计算技术研究所 | Electric control system and control method in a kind of SUAV photoelectric nacelle delay |
-
2014
- 2014-01-02 CN CN201420000762.7U patent/CN203661018U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107425835A (en) * | 2016-05-23 | 2017-12-01 | 中兴通讯股份有限公司 | A kind of on/off circuit |
CN107425835B (en) * | 2016-05-23 | 2023-01-17 | 中兴通讯股份有限公司 | Startup and shutdown circuit |
CN107749666A (en) * | 2017-10-27 | 2018-03-02 | 天津津航计算技术研究所 | Electric control system and control method in a kind of SUAV photoelectric nacelle delay |
CN107749666B (en) * | 2017-10-27 | 2021-03-05 | 天津津航计算技术研究所 | Delayed power-on control system and control method for photoelectric pod of small unmanned aerial vehicle |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140618 Termination date: 20150102 |
|
EXPY | Termination of patent right or utility model |