CN203644020U - System-configurable multipurpose CPCI platform device - Google Patents
System-configurable multipurpose CPCI platform device Download PDFInfo
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- CN203644020U CN203644020U CN201320862779.9U CN201320862779U CN203644020U CN 203644020 U CN203644020 U CN 203644020U CN 201320862779 U CN201320862779 U CN 201320862779U CN 203644020 U CN203644020 U CN 203644020U
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- 102100029368 Cytochrome P450 2C18 Human genes 0.000 title claims abstract description 39
- 101000919360 Homo sapiens Cytochrome P450 2C18 Proteins 0.000 title claims abstract description 39
- 230000009977 dual effect Effects 0.000 abstract description 5
- 238000012360 testing method Methods 0.000 abstract description 5
- 230000003993 interaction Effects 0.000 abstract description 4
- 238000012423 maintenance Methods 0.000 abstract description 3
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 6
- 238000009826 distribution Methods 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 102100040862 Dual specificity protein kinase CLK1 Human genes 0.000 description 1
- 102100040844 Dual specificity protein kinase CLK2 Human genes 0.000 description 1
- 102100040856 Dual specificity protein kinase CLK3 Human genes 0.000 description 1
- 102100040858 Dual specificity protein kinase CLK4 Human genes 0.000 description 1
- 101000749294 Homo sapiens Dual specificity protein kinase CLK1 Proteins 0.000 description 1
- 101000749291 Homo sapiens Dual specificity protein kinase CLK2 Proteins 0.000 description 1
- 101000749304 Homo sapiens Dual specificity protein kinase CLK3 Proteins 0.000 description 1
- 101000749298 Homo sapiens Dual specificity protein kinase CLK4 Proteins 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000007405 data analysis Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000035699 permeability Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009183 running Effects 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Abstract
The utility model discloses a CPCI platform device capable of configuring a single system and a dual system conveniently and with a board card debugging function. By means of jumper control, a non-bus slot of a single system platform is configured to a second CPCI bus, therefore, two hardware systems can operate simultaneously, physically and independently, and data interaction can be achieved between the systems. The platform can perform single system and dual system switching flexibly without changing a hardware structure, and accordingly, an application range of the platform is enlarged. In addition, by leading a man-machine interaction interface and a function debugging interface, two power input interfaces are provided to facilitate access of power supplies. Furthermore, a support is arranged, so that the platform can serve as a simple board card debugging device to perform power-on self test and module basic function debugging. Therefore, a system structure is simplified, the fault rate is decreased, operation efficiency of the device is increased, operation and maintenance are convenient, and cost is reduced.
Description
Technical field
The utility model relates to field of computer technology, specifically CPCI stage apparatus a kind of configurable single, double system and that can be used as board debugging.
Background technology
CPCI(Compact PCI) be a kind of bus interface standard that International Industry Technological Problems In Computer Manufacturing federation puts forward.It is the industrial bus of high-performance take PCI electrical code as standard.Pci bus is that computing machine is for being sent to information the high-speed channel of another equipment from an equipment.Cpci bus high speed, stable, safety, and there is good shock resistance and air permeability, make to adopt the equipment of cpci bus standard, in the various aspects of country's industry and national defence, particularly, in fields such as machine-building, Electronic Design, Industry Control, be widely used.In physical construction, cpci bus structure has been used Europe card connector and standard 3U, 6U board size.
CPCI platform is a circuit board that has completed printed circuit and printed wiring processes, and its Main Function has: for each CPCI module provides Europe card connector slot; For control and the data message of intermodule provide passage alternately; Various required AC and DC power supplys are provided.
Traditional CPCI hardware platform only has a system slot, supports a system operation.Because single system equipment is limited by the restriction of hardware performance and arithmetic speed, make a lot of complex work require multiple equipment collaborations runnings.Such as GIS geography information mapping system, in processing remote sensor information, be to the data analysis and the storage that gather; , there is the interface message processor (IMP) that shows various radar returns in military analog simulation field for another example, also has the task engine of operation tactics software.The number affects of equipment numerous and diverse degree of system, and complex work is used single system CPCI platform, and number of devices is numerous, has both increased cost, makes again complex system; Equipment room needs a large amount of interconnecting cables, and signal transmits and has loss and interference on cable, and above factor all can increase the difficulty of system debug, the efficiency while affecting real work.In addition, in manufacturing field of equipment, if before final assembly, can test the basic function of board peace platform, can investigate in time the hidden danger of manufacture and welding technology aspect, effectively reduce the probability of later stage fault and the difficulty that complete machine is reprocessed.
Therefore expand and improve single system CPCI platform, enabling to possess when configuring single, double system works flexibly the function of debugging apparatus, can form by simplified system, reducing failure rate, improving equipment operating efficiency, handled easily and maintenance, cost-saving.
Summary of the invention
The utility model provides the 6U size cpci bus platform of a standard, dividing and scheming for outfit of equipment function shown in figure mono-: wherein main body socket portion is made up of standard C PCI slot; Wire jumper control section embeds in back board wiring figure, and the single, double system of opertaing device is switched flexibly; External interface part connects main body socket portion, man-machine interaction is provided and shows output; Power supply access part provides two kinds of power supply accesses, support equipment power supply.
The utility model is described the configurable multi-usage CPCI stage apparatus of a kind of system, comprising: main body slot, external interface, wire jumper control, power supply access; Main body slot, external interface, wire jumper control, respectively with external interface power supply access electrical connection.
Described main body slot, comprising: independently two cover cpci bus A, B, hangs with a system slot, three bus slots, a non-bus slot in every cover bus.
Described external interface, comprising: Man Machine Interface, function debugging interface.
Described wire jumper control, comprising: multiple cross-over connection 0 Europe resistance.
Described power supply access, comprising: ATX power supply slot, CPCI power supply slot.
CPU board is inserted on system groove position.
Non-bus slot articulates data loading plate.
Bus duct position can articulate such as display board, network board, serial ports plate, user's plate etc. as Function Extension.
Especially, all slots of bus B all can be configured to by wire jumper the non-bus slot of bus A easily.
Draw required Man Machine Interface to edges of boards from system slot, three bus slots are drawn the corresponding interface (drawing as shown draw-in groove that VGA or DVI, network board slot are drawn network interface, other special purpose interface is drawn in user's board slot position) according to practical application, can be used as modular debugging; Whether the interface of bus B draws also by respective patch cord control; Meanwhile, platform provides standard C PCI power supply and ATX power interface, facilitates the access of multiclass power supply; In addition, platform four angular bits have mechanical hole, can insert support, in order to support debugging apparatus.
The advantage of the configurable multi-usage CPCI stage apparatus of a kind of system of the utility model is: a CPCI stage apparatus that can conveniently configure single, double system and have board debug function concurrently.By wire jumper control, the non-bus slot of single system platform is configured to the second cpci bus, make it to move physically two cover hardware systems simultaneously, both can independent operating between system, again can interaction data.Use dual system platform simplification system to form, thin device, reduces external cable, improves reliability and the maintainability of system, reduces costs.Especially, platform can switch flexibly between single, double system, has expanded the range of application of platform.In addition owing to drawing Man Machine Interface (PS/2, VGA, DVI) and function debugging interface (USB, network interface, serial ports etc.), provide standard C PCI power supply and Standard PC ATX power input interface to facilitate multiple power sources access, and mounting bracket, making platform can be used as simple and easy board debugging apparatus uses, carry out power-on self-test and the debugging of module basic function, can find and rectify and improve problem early stage at production equipment, reduce failure rate, increase work efficiency.
Accompanying drawing explanation
Fig. 1 outfit of equipment function is divided figure;
The configurable CPCI platform of Fig. 2 system theory diagram;
Fig. 3 single system CPCI platform wiring diagram;
The configurable CPCI platform of Fig. 4 system wiring diagram.
Embodiment
Shown in root Ju Fig. 1～Fig. 4, the configurable multi-usage CPCI stage apparatus of a kind of system, comprising: main body slot 01, external interface 02, wire jumper control 03, power supply access 04; Main body slot 01, external interface 02, wire jumper control 03, respectively with external interface 02 power supply access 04 electrical connection.
Described main body slot 01, comprising: independently two cover cpci bus A, B, hangs with non-bus slot 10,19, system slot 18, bus slot 15,16,17, non-bus/system groove 11, non-/ bus slot 12,13,14 in bus.
Described external interface 02, comprising: Man Machine Interface 20,23 function debugging interfaces 21,22..
Described wire jumper control 03, comprising: cross-over connection 0 Europe resistance 30,31,32,33,34,35,36,37,0 Europe resistance 35 connect the system control signal of bus B, if cross-over connection, device can be supported dual system operation; If not cross-over connection, device is supported single system.
Platform can switch flexibly between single, double system, and does not change hardware composition, has expanded the range of application of platform.Owing to drawing Man Machine Interface and function debugging interface, provide two kinds of power input interfaces to facilitate power supply access in addition, and mounting bracket, make platform can be used as simple and easy board debugging apparatus and use, carry out power-on self-test and the debugging of module basic function.So can form by simplified system, reduce failure rate, improve equipment operating efficiency, handled easily and maintenance, cost-saving.
Described power supply access 04, comprising: ATX power supply slot 40, CPCI power supply slot 41.
The encapsulation of CPCI has defined 6U(233.35 mm × 160 mm) size.Cpci bus forms (33MHZ situation) by 8 CPCI slots.Comprise a system groove and maximum 7 peripherals grooves.System groove provides arbitration, clock distribution, configuration, interruption processing and reset function for all adapters on total segment.
The groove position of CPCI platform is made up of the connector of 5 protected type 2mm spacing 5 row, is defined as P1 ~ P5.It is upper that 32 bit address/data-reusing bus and connector coding keypad are arranged in a connector P1, and another connector P2 is defined as expanding 64 bit data transmission and clock distribution and physical addressing, and P3 ~ P5 is User Defined region.The wiring diagram of single system CPCI platform (P1, P2 groove) as shown in Figure 3.This programme is mainly redefined and is connected by the P1 to each groove position, P2 groove, by the non-bus duct on the platform left side, transform the 2nd CPCI system bus (1 system groove, 3 bus ducts, 1 non-bus duct) of 5 groove positions as.
If figure tri-: XA0 is non-bus duct, system groove is XA1, XA2, XA3, and XA4 is bus duct, and all the other are dead slot.5 road dead slots are done to following change: XA9 transform nonsystematic groove (XB0) as; XA8 transform system groove (XB1) as; XA7, XA6, XA5 transform three bus duct position XB2, XB3, XB4 as.The rule of transformation is: the wiring of all changes connects by 0 Ω wire jumper, determines that by wire jumper this slot is former non-bus duct or the second bus duct, and so, this platform both can be used as single system and used, and also can support dual system operation, had expanded the scope of application.According to CPCI standard, the relevant stitch on connector P1, the P2 of above groove position is redefined, the stitch relating to as shown in Table 1:
The relevant stitch definition of table one cpci bus connector P1, P2
Wherein, for reaching configuration purpose, use CPCI plate to select signal IDSEL to provide unique access to every slot.IDSEL pin (P1:B9) by one in link address line AD31～AD25 to every board, every board of configuration phase is an all corresponding unique address.Platform should connect by the IDSEL pin for each logical slot connector in minimum cycle length.Idsel signal on every slot must be connected to the shortest length the ADxx of same slot.
7 couples of REQx#/GNTx# that system groove interface is corresponding ask/permit signal; Pinout is REQ0# ~ REQ6# and GNT0# ~ GNT6#.The corresponding a pair of REQx#/GNTx# signal of every block system board interface, REQ# signal is positioned at (P1:A6) of CPCI groove position, and GNT# signal is positioned at (P1:E5).System groove need to provide 7 pairs of REQx#/GNTx# signals.
BIOS start-up routine does and interrupts when binding, need platform according to specific rule distribution system groove interrupt pin INTA#, INTB#, INTC#, INTD# to logical slot.CPCI platform interrupts for front 4 PCI connectors circulation provides a unique PCI by logical slot, needn't share same interruption with other pci interfaces in order to use a different interruption on system groove adapter, interrupt arriving the rear circulation of logic groove 4 and finish, start a new circulation from next logic groove.
System groove CPU provides clock signal need to all PCI peripherals in system.Clock signal on peripheral board is provided by CPCI platform.Clock distribution circuit on system groove should provide a discrete clock signal for each CPCI connector pinout, as the same in the pci clock (CLK0, CLK1, CLK2, CLK3, CLK4, CLK5, CLK6) of definition.These 7 signal wires must mutually mate in length.On plate, clock route must be designed to the propagation delay causing while making up CPCI platform clock distribution.For all clock lines of compensating time delay must adopt internal layer strip line configuration mechanism.
In addition, also data/the address wire of each groove position should be connected one to one, thereby complete the whole definition to new bus.
According to above rule, complete the amended secondary wiring diagram of schematic diagram as shown in Figure IV.
In addition, the Man Machine Interface of two system grooves of platform is guided to edges of boards, comprising: (USB) derived in key mouse access (PS/2), video output (VGA, DVI), data importing; For each bus slot,, according to practical application definition, required debugging interface is also guided to edges of boards, comprising: network interface (RJ45), serial ports (DB9) and other user's special purpose interface etc.To the wiring of these interfaces, be noted that PS/2 and usb signal line are wrapped and processed, in the middle of with ground wire, signal wire being included in, can prevent from disturbing; For guaranteeing video display quality, VGA, DVI signal are done and apply copper grounding; To network interface, serial ports equisignal line, walk differential lines to processing, differential pair length will be tried one's best equally long, and the spacing of two lines will remain unchanged always.The wire laying mode of differential pair should be close and parallel.The interface of the second bus is drawn and also done wire jumper processing.
Two power slot positions are set on platform both sides, the CPCI power slot of a standard, the ATX power slot of a standard, can meet the power supply needs under different condition.Finally mechanical hole is set and is equipped with respective holder in platform surrounding, the device that makes platform can be used as modular debugging and power-on self-test uses.
Claims (5)
1. the configurable multi-usage CPCI stage apparatus of system, comprising: main body slot (01), external interface (02), wire jumper control (03), power supply access (04); Main body slot (01), external interface (02), wire jumper control (03), respectively and external interface (02) power supply access (04) electrical connection.
2. the configurable multi-usage CPCI stage apparatus of a kind of system according to claim 1, it is characterized in that: described main body slot (01), comprise: independently two cover cpci bus A, B, hangs with a system slot, three bus slots, a non-bus slot in every cover bus.
3. the configurable multi-usage CPCI stage apparatus of a kind of system according to claim 1, is characterized in that: external interface (02), comprising: Man Machine Interface (20) (23), function debugging interface (21) (22).
4. the configurable multi-usage CPCI stage apparatus of a kind of system according to claim 1, is characterized in that: wire jumper control (03), comprising: cross-over connection 0 Europe resistance (30) (31) (32) (33) (34) (35) (36) (37).
5. the configurable multi-usage CPCI stage apparatus of a kind of system according to claim 1, is characterized in that: power supply access (04), comprising: ATX power supply slot (40), CPCI power supply slot (41).
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320862779.9U CN203644020U (en) | 2013-12-25 | 2013-12-25 | System-configurable multipurpose CPCI platform device |
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| CN201320862779.9U CN203644020U (en) | 2013-12-25 | 2013-12-25 | System-configurable multipurpose CPCI platform device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112379744A (en) * | 2020-12-06 | 2021-02-19 | 上海镭隆科技发展有限公司 | Integrated high-performance information processing system development and verification system and implementation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112379744A (en) * | 2020-12-06 | 2021-02-19 | 上海镭隆科技发展有限公司 | Integrated high-performance information processing system development and verification system and implementation method thereof |
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Granted publication date: 20140611 |