CN203632573U - A digital implementation system for PWM rectifier current hysteresis control - Google Patents

A digital implementation system for PWM rectifier current hysteresis control Download PDF

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Publication number
CN203632573U
CN203632573U CN201320824903.2U CN201320824903U CN203632573U CN 203632573 U CN203632573 U CN 203632573U CN 201320824903 U CN201320824903 U CN 201320824903U CN 203632573 U CN203632573 U CN 203632573U
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current
control
module
phase
cla
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秦承志
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SUZHOU NEW IMAGE ELECTRIC CO Ltd
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SUZHOU NEW IMAGE ELECTRIC CO Ltd
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Abstract

The utility model provides a digital implementation system for PWM rectifier current hysteresis control. A TMS320F28069 DSP of the Piccolo series of TI is employed for current hysteresis control. Through full utilization of the chip dual core processor, the logic control, communication and three-phase given current generation of a PWM rectifier device are finished in a main CPU, the current hysteresis control strategy is fulfilled in a control rate accelerator, PWM pulse is generated to drive a power switch tube of a main loop and thus the function of the PWM rectifier is achieved. The control rate accelerator introduces the parallel control loop execution function to a C28x-series component. Therefore, the delay from the sampling to the output of an ADC can be greatly reduced and faster system response and the control loop with higher frequency can be achieved. A CLA is used for serving the control loop strict in time, so that the main CPU can process the system tasks such as communication and diagnosis freely.

Description

The stagnant ring control figure of a kind of PWM rectifier current is realized system
Technical field
The utility model relates to power electronics control technology field, is specifically related to the stagnant ring control figure of a kind of PWM rectifier current and realizes system.
Background technology
Current PWM rectifier, with plurality of advantages such as the operation of its to and fro flow of power, grid side unity power factor, input current sine degree are good, obtains a wide range of applications in fields such as AC speed regulating, uninterrupted power supply, reactive power compensation, new forms of energy.The control strategy that PWM rectifier is conventional has Hysteresis Current control, sine pulse width modulation (PWM) control, space vector PWM control etc.Hysteresis Current control method has controls the advantages such as simple, response is fast, tracking accuracy is high, the stability of a system is good, so in the controlling unit of PWM rectifier current output, it is a kind of conventional control method.Traditional Hysteresis Current control generally adopts analog circuit to realize, but analog circuit has open defect than digital circuit, as interference, the false triggering etc. of the drift of circuit, noise.Adopting maximum methods is at present to utilize conventional fixed frequency sampling to carry out stagnant ring control, control cycle is approximately tens to hundreds of microsecond, but fixing owing to selecting switching time, same instruction only can be followed the tracks of once, cause actual current burr suddenly big or suddenly small, Current Control precision is not high, controls effect undesirable; Conventional digital sample, each s operation control module can not require to regulate according to response, and the stability of control system and Ability of Resisting Disturbance are not high; And conventional control, if the major cycle computing of DSP and interrupt coordinating between computing bad will have a strong impact on the real-time of Current Control and the synchronism that Hysteresis Current is followed the tracks of.
Summary of the invention
The purpose of this utility model provides the stagnant ring control figure of a kind of PWM rectifier current to realize system, adopt the TMS320F28069 DSP of the Piccolo series of TI to complete Hysteresis Current control, make full use of the function of this chip dual core processor, in host CPU, complete the given generation of logic control, communication and three-phase current of PWM rectifier equipment, in control rate accelerator, complete Hysteresis Current Control Strategy, produce the power switch pipe that pwm pulse removes to drive major loop, realize PWM rectifier function.Control law accelerator is an independence, complete programmable 32 floating-point mathematics processors, and it is carried out function by parallel control ring and is incorporated into C28x family device.The low interruption delay of CLA makes it can immediately read ADC sampling.Time delay that this has just greatly reduced ADC and sample output, has realized the control loop of system responses and higher frequency faster.By utilizing CLA to serve the strict control loop of time requirement, host CPU just can freely be processed other system task such as communication, diagnosis.
In order to overcome deficiency of the prior art, the solution that the utility model provides the stagnant ring control figure of a kind of PWM rectifier current to realize system, specific as follows:
The stagnant ring control figure of a kind of PWM rectifier current is realized system, comprise the PWM drive circuit 2 connecting successively, three-phase voltage-type inverter 1, voltage and current signals collecting part 3, outputting inductance 4 and three-phase alternating current electrical network 5, power network current and direct voltage are sampled through the A/D circuit 6 of voltage and current signal collecting part 3 to TIF28069DSP chips, CLA module 6 in sheet directly reads the result of A/D sampling by A/D value fetch program module 11, and calculate the mean value of 100 microseconds by mean computation routine module 12, store in CLA-to-CPU RAM memory 10, host CPU module 8 can every 100 microseconds read these sampled values by CLA-to-CPURAM memory 10, pass through the phase-locked module 15 of line voltage in conjunction with these sampled values, DC voltage control module 16, switching frequency control module 17 and given current generating module 18 calculate in the given and given CPU-to-CLA of storing into the RAM of the hysteresis band memory 9 of three-phase current, it is given given with hysteresis band that every 100 microseconds of CLA module 6 read three-phase current by CPU-to-CLA RAM memory 9, produce PWM output by Hysteresis Current control module 14, the conducting of three-phase inverter IGBT in PWM rectifier is controlled in PWM output by PWM drive circuit 2, switching frequency computing module 13 in CLA module 6 calculates the switching frequency of each phase by adding up the on-off times of each switching tube, and can pass to host CPU module 8 by CLA-to-CPU RAM memory 10, the switching frequency that host CPU module 8 reads every phase participates in that in switching frequency control module 17, to produce hysteresis band given.
The sampling element that the stagnant ring control figure of described PWM rectifier current is realized system is that the cycle by configuring CPU timer 0 is 5 microseconds, the trigger source of AD is chosen as CPU timer 0, adopt the time of reducing AD sampling window to ensure that the sampling of 16 passages completes in 5 microseconds, carry out the conducting of control switch pipe by Hysteresis Current control module, simultaneously 5 microseconds have also realized on a phase brachium pontis the Dead Time of pipe under pipe and a phase brachium pontis.
The utility model adopts the TMS320F28069DSP of the Pi ccolo series of TI to control, and makes full use of the function of this chip dual core processor.In the F28069 processor that contains CLA, CLA can free CPU, automatically controls the running of peripheral hardware, reaches higher control precision and better real-time.Overcome single cpu system of traditional control method, between DSP major cycle computing and interruption computing, transmission of information need to take the overhead time of CPU, the scheme the utility model proposes can be parallel in DSP work, between CLA and host CPU, be independent of each other, carry out the algorithm computing Peripheral Interface different with access simultaneously.In host CPU, complete every 5 microseconds and start a CLA, the configuration of AD sampling simultaneously also ensures that 5 microseconds complete once; The logic control of PWM rectifier systems, error protection, direct voltage closed-loop control, the generation of the given electric current of three-phase, the closed-loop control of switching frequency all complete in host CPU.The control cycle of host CPU is 100 microseconds, and every 100 microsecond host CPUs and CLA exchange a secondary data.In CLA, complete the reading of AD sampled data, mean value calculation, Hysteresis Current Control Strategy, PWM output and switching frequency calculating etc.Can complete like this tracking of maximum 20 times to each given value of current, making Hysteresis Current follow the tracks of control related operation separates with given electric current related operation, to make full use of the dual core processor function of DSP, ensure real-time, synchronism and the control precision of current tracking.
Brief description of the drawings
Fig. 1 is that the digital control strategy that the utility model adopts is realized schematic diagram;
Fig. 2 is control system sampling element schematic diagram;
Fig. 3 is the stagnant ring control of a phase current software flow pattern;
Fig. 4 is single leg inverter principle topological diagram;
Fig. 5 is Hysteresis Current control principle drawing;
Fig. 6 is switching frequency control principle block diagram;
Fig. 7 is that line voltage is phase-locked, DC voltage control, given current generating module theory diagram.
Current tracking waveform when Fig. 8 is traditional SVPWM control mode PWM rectifier output 8A reactive current stable state.
Fig. 9 is that the Hysteresis Current control method PWM rectifier output 8A reactive current of the utility model employing is steady
Current tracking waveform when state.
Figure 10 is that Hysteresis Current control method PWM rectifier output 8A reactive current starts tracking waveform.
Embodiment
Below in conjunction with accompanying drawing, utility model content is described further:
The stagnant ring control figure of PWM rectifier current is realized system, comprise the PWM drive circuit 2 connecting successively, three-phase voltage-type inverter 1, voltage and current signals collecting part 3, outputting inductance 4 and three-phase alternating current electrical network 5, power network current and direct voltage are sampled through the A/D circuit 6 of voltage and current signal collecting part 3 to TIF28069 dsp chips, CLA module 6 in sheet directly reads the result of A/D sampling by A/D value fetch program module 11, and calculate the mean value of 100 microseconds by mean computation routine module 12, store in CLA-to-CPU RAM memory 10, host CPU module 8 can every 100 microseconds read these sampled values by CLA-to-CPU RAM memory 10, pass through the phase-locked module 15 of line voltage in conjunction with these sampled values, DC voltage control module 16, switching frequency control module 17 and given current generating module 18 calculate in the given and given CPU-to-CLA of storing into the RAM of the hysteresis band memory 9 of three-phase current, it is given given with hysteresis band that every 100 microseconds of CLA module 6 read three-phase current by CPU-to-CLA RAM memory 9, produce PWM output by Hysteresis Current control module 14, the conducting of three-phase inverter IGBT in PWM rectifier is controlled in PWM output by PWM drive circuit 2, switching frequency computing module 13 in CLA module 6 calculates the switching frequency of each phase by adding up the on-off times of each switching tube, and can pass to host CPU module 8 by CLA-to-CPU RAM memory 10, the switching frequency that host CPU module 8 reads every phase participates in that in switching frequency control module 17, to produce hysteresis band given.
The sampling element that the stagnant ring control figure of described PWM rectifier current is realized system as shown in Figure 2, be by the cycle of configuration CPU timer 0 be 5 microseconds, the trigger source of AD is chosen as CPU timer 0, adopt the time of reducing AD sampling window to ensure that the sampling of 16 passages completes in 5 microseconds, carry out the conducting of control switch pipe by Hysteresis Current control module, in Fig. 2, VT1 represents on a phase brachium pontis and manages, VT2 represents under a phase brachium pontis and manages, simultaneously 5 microseconds have also realized on a phase brachium pontis the Dead Time of pipe under pipe and a phase brachium pontis, the control time of 5 microseconds approaches the control of analog circuit Hysteresis Current, the stagnant ring control of more conventional fixed frequency sampling, solve and detected the impact that delay brings, improved the precision of Current Control simultaneously.
The stagnant ring control flow chart of a phase current that the stagnant ring control figure of described PWM rectifier current is realized system as shown in Figure 3, is set forth the utility model Hysteresis Current control principle in conjunction with the mono-leg inverter topological sum of Fig. 4 Fig. 5 Hysteresis Current control principle: at inductive current i lpositive half cycle, works as i l-i *<=-h changes the state of power switch, the pulse signal triggering and conducting of generation, and inductive current starts to increase, until i l-i *when >=h, switch VT1 manages shutoff, when VT2 turn-offs or opens, and i lwill be by VD2 afterflow, under the effect of input voltage and line voltage, inductive current starts to reduce, in like manner known, at inductive current i lnegative half period, works as i l-i *when >=h, change the state of power switch pipe, the pulse signal of generation triggers VT2 conducting, and inductive current starts to reduce, until i l-i *when <=-h, switching tube VT2 turn-offs, when VT1 turn-offs or opens, and i lwill be by VD1 afterflow, under the effect of input voltage and line voltage, inductive current starts to increase, be sent to like this public exchange electrical network current i lhysteresis band with 2h is followed the tracks of sinusoidal reference electric current.The control procedure of b phase and c phase is with a phase.According to above-mentioned control principle, in the situation of IGBT high level conducting, list the control procedure of every phase:
Under Iaact>IaRef+Ihref, manage open-mindedly, upper pipe turn-offs, and PWM1 is low level, and PWM2 is high level;
The upper pipe of Iaact<IaRef-Ihref is open-minded, and turn-off in ShiShimonoseki, and PWM1 is high level, and PWM2 is low level;
Under Ibact>IbRef+Ihref, manage open-mindedly, upper pipe turn-offs, and PWM3 is low level, and PWM4 is high level;
The upper pipe of Ibact<IbRef-Ihref is open-minded, and turn-off in ShiShimonoseki, and PWM3 is high level, and PWM4 is low level;
Under Icact>IcRef+Ihref, manage open-mindedly, upper pipe turn-offs, and PWM5 is low level, and PWM6 is high level;
The upper pipe of Icact<IcRef-Ihref is open-minded, and turn-off in ShiShimonoseki, and PWM5 is high level, and PWM6 is low level.
Iaact, Ibact and Icact are the AD sampled value that every 5 microseconds of CLA read, and IaRef, IbRef, IcRef and Ihref are that the three-phase current that reads from host CPU of every 100 microsecond CLA is given and hysteresis band is given.
Due to the power switch pipe impact of intrinsic switching time, service time is often less than the turn-off time, therefore, in the time of the complementary control of upper and lower bridge arm, the short trouble with the conductings simultaneously of two power switch pipes of arm easily occurs.For preventing the straight-through of two power switch pipes of same brachium pontis, in pwm control signal, must set " break-before-make " PWM switch dead band.K in flow chart and j are in order to ensure to manage up and down while switching, the counter that adds dead band to control.Whole Hysteresis Current control completes in CLA, is totally independent of host CPU operation, and control cycle is 5 microseconds, can carry out much 20 secondary trackings to same instruction, has ensured real-time, synchronism and the control precision of current tracking.
See and in Fig. 1 host CPU, mainly comprise the phase-locked module 15 of line voltage, DC voltage control module 16, switching frequency control module 17, given current generating module 18.Switching frequency control module as shown in Figure 6, mainly comprises maximum switching frequency statistics 1, pi regulator 2 and adjuster output violent change 3.The maximum of the threephase switch frequency of calculating in CLA and given switch lock Fref are led comparison by it, produce the given Ihref of hysteresis band by pi regulator 2, given hysteresis band Ihref is passed to CLA, ensure that by the Hysteresis Current control module in CLA actual switching frequency does not transfinite.Other module in host CPU as shown in Figure 7, DC voltage control module 1 completes the closed-loop adjustment of PWM rectifier output dc voltage, given direct voltage UdcRef and actual DC voltage U dc are compared, their deviation is carried out PI and is regulated control, and the output of direct current pressure ring is the given IdRef of net side active current; The phase-locked module 2 of line voltage completes the detection of electric network voltage phase and frequency, the grid line voltage U ab, the Ubc that detect is calculated to electric network voltage phase angle and frequency by software phase-lock-loop algorithm, for current transformation provides phase angle accurately; Given current generating module 3 completes meritorious net side and the given IdRef of reactive current, IqRef is transformed to three-phase a, b, c-axis given value of current IaRef, IbRef and IcRef, and CLA receives that the given and hysteresis band of three-phase current is given completes Hysteresis Current control.
The control strategy the utility model proposes verifies on the PWM of 15kW rectifier unit, and Fig. 9 and Figure 10 are that direct voltage is 600V, and steady-state current when reactive current is given as 8A follows the tracks of waveform and starting current is followed the tracks of waveform.Current tracking waveform when Fig. 8 is traditional SVPWM control mode PWM rectifier output 8A reactive current stable state.From the comparison of wave shape of Fig. 8 and Fig. 9, can find that the current tracking precision of the PWM rectifier control strategy the utility model proposes is better than traditional control mode far away, effectively suppress the suddenly big or suddenly small phenomenon of current spikes.Following the tracks of waveform from the starting current of Figure 10 can find out, the PWM rectifier control strategy dynamic response characteristic the utility model proposes is very good, after startup, actual current just can be followed the tracks of upper given electric current in a grid cyclic wave (20ms), has overcome traditional control method due to the slow problem of electric current dynamic response detecting and computing relay brings.
The above, it is only preferred embodiment of the present utility model, not the utility model is done to any pro forma restriction, although the utility model discloses as above with preferred embodiment, but not in order to limit the utility model, any those skilled in the art, do not departing within the scope of technical solutions of the utility model, when can utilizing the technology contents of above-mentioned announcement to make a little change or being modified to the equivalent embodiment of equivalent variations, in every case be not depart from technical solutions of the utility model content, according to technical spirit of the present utility model, within spirit of the present utility model and principle, the any simple amendment that above embodiment is done, be equal to replacement and improvement etc., within all still belonging to the protection range of technical solutions of the utility model.

Claims (2)

1. the stagnant ring control figure of PWM rectifier current is realized system, it is characterized in that comprising the PWM drive circuit (2) connecting successively, three-phase voltage-type inverter (1), voltage and current signals collecting part (3), outputting inductance (4) and three-phase alternating current electrical network (5), power network current and direct voltage are sampled to the A/D circuit (6) of TI F28069 dsp chip through voltage and current signal collecting part (3), CLA module (6) in sheet directly reads the result of A/D sampling by A/D value fetch program module (11), and calculate the mean value of 100 microseconds by mean computation routine module (12), store in CLA-to-CPU RAM memory (10), host CPU module (8) can every 100 microseconds read these sampled values by CLA-to-CPU RAM memory (10), pass through the phase-locked module of line voltage (15) in conjunction with these sampled values, DC voltage control module (16), switching frequency control module (17) and given current generating module (18) calculate in the given and given CPU-to-CLA of storing into the RAM of the hysteresis band memory (9) of three-phase current, it is given given with hysteresis band that every 100 microseconds of CLA module (6) read three-phase current by CPU-to-CLA RAM memory (9), produce PWM output by Hysteresis Current control module (14), the conducting of three-phase inverter IGBT in PWM rectifier is controlled in PWM output by PWM drive circuit (2), switching frequency computing module (13) in CLA module (6) calculates the switching frequency of each phase by adding up the on-off times of each switching tube, and can pass to host CPU module (8) by CLA-to-CPU RAM memory (10), the switching frequency that host CPU module (8) reads every phase participates in that in switching frequency control module (17), to produce hysteresis band given.
2. the stagnant ring control figure of PWM rectifier current according to claim 1 is realized system, the sampling element that the stagnant ring control figure of PWM rectifier current described in it is characterized in that is realized system is that the cycle by configuring CPU timer (0) is 5 microseconds, the trigger source of AD is chosen as CPU timer (0), adopt the time of reducing AD sampling window to ensure that the sampling of 16 passages completes in 5 microseconds, carry out the conducting of control switch pipe by Hysteresis Current control module, simultaneously 5 microseconds have also realized on a phase brachium pontis the Dead Time of pipe under pipe and a phase brachium pontis.
CN201320824903.2U 2013-12-03 2013-12-03 A digital implementation system for PWM rectifier current hysteresis control Expired - Fee Related CN203632573U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104660089A (en) * 2015-02-15 2015-05-27 南京埃斯顿自动控制技术有限公司 Feedback hysteresis control method for PWM (pulse-width modulation) rectifier for servo drive

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104660089A (en) * 2015-02-15 2015-05-27 南京埃斯顿自动控制技术有限公司 Feedback hysteresis control method for PWM (pulse-width modulation) rectifier for servo drive
CN104660089B (en) * 2015-02-15 2017-03-22 南京埃斯顿自动控制技术有限公司 Feedback hysteresis control method for PWM (pulse-width modulation) rectifier for servo drive

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