CN203618021U

CN203618021U - HDLC communication module for CompactRIO

Info

Publication number: CN203618021U
Application number: CN201320832614.7U
Authority: CN
Inventors: 田照耀; 焦京海; 马云双; 彭云龙; 车聪聪; 龚明
Original assignee: CSR Qingdao Sifang Locomotive and Rolling Stock Co Ltd
Current assignee: CRRC Qingdao Sifang Co Ltd
Priority date: 2013-12-17
Filing date: 2013-12-17
Publication date: 2014-05-28
Anticipated expiration: 2023-12-17

Abstract

The utility model relates to an HDLC communication module for a CompactRIO. The HDLC communication module includes an HDLC communication module and a CompactRIO real-time controller. A bridge chip developed by using an FPGA, an EERPOM with a memory storing function, a serial converter chip and R485 interface chips are included in the HDLC communication module. An RS485 protocol is used as a physical layer of communication, data exchange is achieved through a custom SPI bus, and an external two-way communication interface is used for achieving a two-way HDLC protocol communication function and supports an adjustable range of communication baud rate with the maximum of 10M. The module is a controller combined with an embedded control system, and is used for communication interconnection between an urban rail transit train monitoring system and a subsystem with an HDLC interface. The utility model can be widely applied in the control field of railway trains, urban rail transit vehicles and the like. The HDLC communication module for the CompactRIO has the characteristics of simple design, easy usage, targeted functionality and reliable performance.

Description

The HDLC communication module of a kind of CompactRIO

Technical field

The utility model relates to a kind of for the self-defined communication module of urban railway transit train, particularly the HDLC communication module of a kind of CompactRIO for the exploitation of CompactRIO controller.Can be widely used in the control field such as railroad train, urban rail transit vehicles.

Background technology

Last century, the seventies started, HDLC (control of High-Level Data Link Control high-level data chain agreement road) starts to be applied to the logical transport field of industrial technology data, in current application, train is urban railway transit train especially, due to long-term mobile operation, it is more and more higher to efficiency and the reliability requirement of signal transmission that running environment faces the factors such as various electromagnetic interference, tradition HDLC communication module technology needs to improve constantly transmittability under the fast-developing background of track traffic at home, meeting various control, when hommization functional requirement increases, more to guarantee efficiency and the reliability of signal transmission.

CompactRIO is a kind of small and exquisite and firm control of industrialization and acquisition system, adopt reconfigurable I/O (reconfigurable I/O, be abbreviated as RIO) and FPGA(Field-Programmable Gate Array, field programmable gate array) technology realizes very-high performance and custom feature.CompactRIO comprises a real-time controller and reconfigurable fpga chip.

In City Rail Transit System, have some import equipments as trailer system at present, the HDLC of providing interface is mostly provided the equipment such as auxiliary system.In order to complete and the exchanges data of these systems, just require to possess in train monitoring system the communication interface of HDLC, in the middle of the existing module of CompactRIO, do not support at present the module of HDLC agreement.Of the present utility model research and development successfully, indicates and in the middle of the module of CompactRIO, realizes the function of supporting HDLC agreement.Fill up the blank of domestic this this technical field.

Utility model content

The utility model main purpose is to address the above problem and is not enough, and the HDLC communication module of a kind of CompactRIO that can support HDLC protocol function is provided.

For achieving the above object, the technical solution of the utility model is:

A HDLC communication module of CompactRIO, comprises fpga chip, HDLC chip, RS485 interface chip;

Described fpga chip connects respectively described HDLC chip and CompactRIO, for the exchanges data of HDLC chip and CompactRIO;

Described RS485 interface chip connects respectively described HDLC chip and communication interface, for the system communication with HDLC interface;

On described fpga chip, be provided with HDLC chip control module, HDLC communication data pretreatment module, described CompactRIO sends to data in the data buffer storage of fpga chip, described fpga chip control HDLC chip enable, and data after treatment are sent to HDLC chip, described HDLC chip sends data by described RS485 interface chip.

Further, also comprise eeprom chip, described eeprom chip is connected with CompactRIO, identifies described HDLC communication module for CompactRIO.

Further, described fpga chip is connected by SPI communication bus with CompactRIO, is provided with SPI communication module on described fpga chip.

Further, described RS485 interface chip arranges two, connects respectively described HDLC chip.

Further, described RS485 interface chip connects described fpga chip, RS485 transmitting-receiving control module is set on described fpga chip, for controlling the transmitting-receiving of described RS485 interface chip.

In sum, the HDLC communication module of a kind of CompactRIO described in the utility model, support the function of self-defined exploitation for CompactRIO, by SPI communication module is set on fpga chip, HDLC chip control module, RS485 receives and dispatches control module, HDLC communication data pretreatment module, thus realize high efficiency exchanges data between HDLC chip and CompactRIO.By serving as bridging chip with fpga chip, design more flexibly, integrated transmission and deal with data are more reliable, there is simplicity of design, use simple and easy, function is with strong points, the feature of dependable performance.

Accompanying drawing explanation

Fig. 1 the utility model HDLC communication module schematic diagram;

The workflow diagram of Fig. 2 the utility model communication module.

Embodiment

Below in conjunction with accompanying drawing and embodiment, the utility model is described in further detail:

As shown in Figure 1, the HDLC communication module of a kind of CompactRIO, is mainly used in rail vehicle system, particularly has the exchanges data between rail vehicle system equipment and the wheel supervisory control system of HDLC interface.

A HDLC communication module of CompactRIO, comprises fpga chip, HDLC chip, RS485 interface chip and eeprom chip.

Fpga chip is connected by SPI communication bus with CompactRIO, is separately connected with HDLC chip, for the exchanges data of HDLC chip and NI CompactRIO.

RS485 interface chip connects respectively described HDLC chip and communication interface, for the system communication with HDLC interface.And RS485 interface chip is also connected with fpga chip, the transmitting-receiving of fpga chip control RS485 interface chip.By using RS485 chip, the Transistor-Transistor Logic level signal of HDLC is converted to the level signal of difference, to meet the requirement of railway vehicle device for signal transmission.And use the physical layer of RS485 agreement as communication, improved efficiency of transmission.

Eeprom chip is connected with CompactRIO, identifies described HDLC communication module for CompactRIO.When design, in eeprom chip, store the information such as vendor ID, product ID, and serial number, in this information conforms CompactRIO series of products about the code requirement of the information such as vendor ID, product ID and serial number, can be completely compatible with existing system, when each CompactRIO powers on, CompactRIO reads these state informations by spi bus, in order to identification module identity, display module state.

On described fpga chip, be provided with SPI communication module, HDLC chip control module, HDLC communication data pretreatment module, RS485 and receive and dispatch control module.In the present embodiment, use VHDL language to develop in fpga chip and realized SPI communication function, HDLC protocol chip control function, RS485 receives and dispatches control, HDLC communication data preprocessing function.

By SPI communication module, fpga chip has been realized the communication with CompactRIO; By HDLC chip control module, fpga chip has been realized the control to HDLC chip; By HDLC communication data pretreatment module, realize the function that information that CompactRIO is sent is processed; Receive and dispatch control module by RS485, fpga chip sends and enables to control RS485 interface chip, thereby controls the transmitting-receiving of RS485 interface chip.

In the present embodiment, RS485 interface chip arranges two, connects respectively described HDLC chip.The communication interface that RS485 interface chip connects is DB9 communication interface.

Exchanges data between communication module described in the utility model and CompactRIO realizes by self-defining spi bus, and the main contents of exchanges data are:

CompactRIO reads the information being stored in EEPROM by spi bus, the content of information comprises vendor ID, product ID, and serial number.This information is for CompactRIO identification module identity.

CompactRIO carries out initialized setting by spi bus to this HDLC communication module, mainly contains the communication baud rate of HDLC, the form of HDLC frame head and postamble, the parameter of HDLC verification etc.

CompactRIO by spi bus send, receiving data frames.

Between this HDLC communication module and CompactRIO, link by SPI communication bus, externally have 2 tunnel communication interfaces, i.e. HDLC agreement communication interface.Need the data of communication to send to fpga chip by SPI communication bus, fpga chip has separated transmission control function the transmitting-receiving of data with processing capacity.

As shown in Figure 2, workflow of the present utility model is:

1, when CompactRIO powers on, bsp driver on CompactRIO is automatically read and is arranged in eeprom chip and stores the information such as vendor ID, product ID and serial number by SPI communication bus, as the foundation of this module identification.If identification is correct, can on CompactRIO, show the model of this correct module.

2, the initialize routine on CompactRIO will be carried out initial configuration to this HDLC communication module, the content of configuration comprises the cycle of HDLC communication, the baud rate of HDLC communication, the arranging etc. of frame head and postamble in the parameter setting of CRC check and HDLC communication in HDLC communication.

3, after initialization completes, CompactRIO sends HDLC communication enabled signal, and in the data buffer storage of the fpga chip that the data of needs communication are sent by SPI communication bus, fpga chip starts HDLC chip, after data are rearranged, send to HDLC chip, HDLC chip completes the transmission of data by RS485 interface chip and DB9 communication interface.When fpga chip reads HDLC chip and has data to receive, immediately by data retransmission to CompactRIO, so just completed data transmit-receive one time.CompactRIO constantly updates needs the data that send, and fpga chip is according to the communication cycle transceiving data that constantly circulates is set in step 2.

4,, in the time that CompactRIO finds this module data mistake, CompactRIO can send instructions and reinitialize this functions of modules to fpga chip, and it is restarted, and from fault, recovers.

Known by said structure and workflow, this HDLC communication module, has self-defined configuration feature, before module is started working, first want configuration module parameter, comprise communication baud rate setting, CRC check initial value arranges, and the number of beginning synchronizing frame head arranges etc.This HDLC communication module can realize the communication baud rate of maximum 10M, and inside has DPLL clock regeneration function, even if can guarantee to greatest extent that certain error appears in communication baud rate, still can receive correct data, guarantees reliability.This HDLC communication module has completely independently HDLC passage of two-way, and two paths can arrange respectively the parameter such as communication baud rate, CRC check.And two paths can use together, realize and single subsystem communication two-way redundancy feature.This HDLC communication module also has overvoltage protection and excess current protective function, and the fault of its external circuit can not cause module damage.And communication module is to be applied in embedded system, be convenient to shielding, improve interference free performance.

As mentioned above, given scheme content, can derive similar technical scheme by reference to the accompanying drawings.In every case be the content that does not depart from technical solutions of the utility model, any simple modification, equivalent variations and the modification above embodiment done according to technical spirit of the present utility model, all still belong in the scope of technical solutions of the utility model.

Claims

1. a HDLC communication module of CompactRIO, is characterized in that: comprise fpga chip, HDLC chip, RS485 interface chip;

2. the HDLC communication module of a kind of CompactRIO according to claim 1, is characterized in that: also comprise eeprom chip, described eeprom chip is connected with CompactRIO, identifies described HDLC communication module for CompactRIO.

3. the HDLC communication module of a kind of CompactRIO according to claim 1, is characterized in that: described fpga chip is connected by SPI communication bus with CompactRIO, is provided with SPI communication module on described fpga chip.

4. the HDLC communication module of a kind of CompactRIO according to claim 1, is characterized in that: described RS485 interface chip arranges two, connects respectively described HDLC chip.

5. the HDLC communication module of a kind of CompactRIO according to claim 1, it is characterized in that: described RS485 interface chip connects described fpga chip, RS485 transmitting-receiving control module is set on described fpga chip, for controlling the transmitting-receiving of described RS485 interface chip.