CN203606434U

CN203606434U - Impedance measurement circuit

Info

Publication number: CN203606434U
Application number: CN201320641588.XU
Authority: CN
Inventors: 马胜前; 刘维兵; 张亚辉; 范满红; 张维昭; 吉言平; 杨阳; 梁梦依; 赵长荣
Original assignee: Northwest Normal University
Current assignee: Northwest Normal University
Priority date: 2013-10-17
Filing date: 2013-10-17
Publication date: 2014-05-21
Anticipated expiration: 2023-10-17

Abstract

The utility model provides an impedance measurement circuit, and the circuit comprises a DDS signal source, an impedance/voltage change circuit, and a phase-sensitive detection circuit. The DDS signal source is connected with the phase-sensitive detection circuit. The DDS signal source and the phase-sensitive detection circuit are respectively connected with a master control circuit. The circuit achieves the programmable precise measurement of an impedance network at different frequencies. The circuit inhibits the interference well, and converts the amplitude and phase of impedance into a direct-current voltage signal. A low-speed A/D converter can achieve the measurement of impedance. Meanwhile, the circuit solves a problem of taking consideration of the signal source and the precision and speed of measurement at the same time, thereby enabling the structure of the circuit to be simpler, enabling the cost to be lower, enabling the power consumption to be lower, and enabling the precision to be higher.

Description

Impedance measuring circuit

Technical field

The utility model belongs to impedance measurement technique field, relates to a kind of impedance measuring circuit.

Background technology

Inductance, resistance and capacitor element in circuit are called impedance to the inhibition that alternating current rose.It is a complex values, and conventional Z represents, unit is ohm.Impedance comprises modulus of impedance and angle of impedance.Modulus of impedance equals the ratio of measuring element port voltage and the effective value of port current, and angle of impedance equals the phase differential of voltage and electric current.If represent at complex plane, reactance is imaginary part, and resistance is real part, and inductance and electric capacity are called reactance to the total inhibition of alternating current in circuit.

Conventionally adopt the impedance in alternating current bridge method and the resonance method metering circuit that accuracy of measurement is higher.When measurement, according to the phasor relation of the voltage of measured device two-port, electric current, calculate amplitude and the phase place of measured device impedance.While measurement under low frequency, can also be relatively easy to realize automatic measurement.While measurement under upper frequency, not only needing has the A/D compared with high conversion rate, and is not easy to measure angle of impedance, is difficult to realize automatically measure.Bridge method is difficult to meet the demands at environment complexity, that noise is larger and measure impedance in relative broad range time.Impedance parameter testing scheme has a variety of, and impedance parameter void wherein, real part divide separating and measuring method to be convenient to adopt integrated circuit composition, are widely used.But the surveying instrument using in above-mentioned impedance measurement method all exists and regulates that trouble, speed are slow, instrument internal needs accurate adjustable element, amount limit is narrow and be suitable for the problem that frequency is few.

Summary of the invention

The purpose of this utility model is to provide a kind of multi-functional, wide-range, multifrequency impedance measuring circuit, can measure circuit-under-test quickly and easily.

For achieving the above object, the technical scheme that the utility model adopts is: a kind of impedance measuring circuit, comprise the DDS signal source, impedance/voltage conversion circuit and the phase sensitive detection circuit that are connected successively, DDS signal source is connected with phase sensitive detection circuit, and DDS signal source is also connected with governor circuit respectively with phase sensitive detection circuit.

The utility model impedance measuring circuit produces two orthogonal signal by signal source, input impedance/voltage conversion circuit and the phase sensitive detection circuit simultaneously of 0 ° of signal wherein, for impedance/voltage conversion circuit provides driving, for the multiplier of phase sensitive detection circuit provides multiplying signal.90 ° of signal input phase sensitive detection circuits wherein, the signal that circuit-under-test produces enters governor circuit again and carries out conversion process after filtering, amplification, processing, obtains the resistance value of circuit-under-test.Realize the accurate measurement of the impedance network under program-controlled different frequency.Suppress well interference, and be d. c. voltage signal the amplitude of impedance and phase transition, just can realize impedance measurement with the A/D converter of low speed.Meanwhile, solve derived reference signal and taken into account measuring accuracy and the problem of measuring speed, made that circuit structure is more simple, cost is lower, power consumption is less, degree of accuracy is higher.

Accompanying drawing explanation

Fig. 1 is the structural representation of the utility model metering circuit.

Fig. 2 is the schematic diagram of the utility model metering circuit middle impedance/voltage conversion circuit.

Fig. 3 is the schematic diagram of phase sensitive detection circuit in the utility model metering circuit.

Fig. 4 is the use constitutional diagram of the utility model metering circuit.

Fig. 5 is the main program flow chart of the utility model metering circuit.

In Fig. 1: 1. governor circuit, 2.DDS signal source, 3. impedance/voltage conversion circuit, 4. phase sensitive detection circuit.

Embodiment

Below in conjunction with the drawings and specific embodiments, the utility model is elaborated.

As shown in Figure 1, the utility model impedance measuring circuit, comprise the DDS signal source 2, impedance/voltage conversion circuit 3 and the phase sensitive detection circuit 4 that are connected successively, DDS signal source 2 is connected with phase sensitive detection circuit 4, and DDS signal source 2 is also connected with governor circuit 1 respectively with phase sensitive detection circuit 4.

Governor circuit 1, the frequency that produces two-way orthogonal signal (DDS1 and DDS2) and upgrade these two-way orthogonal signal for controlling DDS signal source 2, provides clock for the wave filter MAX295 that gives phase sensitive detection circuit 4; Be used for by inner A/D change-over circuit collection and process the signal that device transports after filtering; For passing through the impedance measurements of inner liquid crystal Circuit display circuit-under-test, and each impedance measurements is stored.

As shown in Figure 2, the impedance/voltage conversion circuit 3 in the utility model impedance measuring circuit, comprises the first chip U1 and the second chip U2, and the first chip U1 adopts operation amplifier chip AD843, and the second chip U2 adopts operation amplifier chip AD620; The 2nd pin that the 3rd pin of the first chip U1 meets DDS signal source 2, the first chip U1 is connected with one end of the first resistance R 1, and the 2nd pin of the first chip U1 and the contact VK of the first resistance R 1 are an incoming end of circuit-under-test Z; The other end ground connection of the first resistance R 1, contact VK is also connected with the 2nd pin of the second chip U2; The 4th pin the connect respectively-15V power supply of the first chip U1 and one end of the first capacitor C 1, the other end ground connection of the first capacitor C 1; The 7th pin of the first chip U1 is connected with one end of the second capacitor C 2 with+15V power supply respectively, the other end ground connection of the second capacitor C 2; The 6th pin of the first chip U1 is connected with the 3rd pin of the second chip U2, and the contact between the first chip U1 the 6th pin and the second chip U2 the 3rd pin is another incoming end of circuit-under-test Z; The 4th connect-15V of the pin power supply of the second chip U2, the 5th pin ground connection of the second chip U2, the 7th connect+15V of the pin power supply of the second chip U2, the 6th pin of the second chip U2 is connected with phase sensitive detection circuit 4.

The first chip U1 is operational amplifier A D843, and it is a high speed, the high operational amplifier of input impedance, can guarantee that the voltage of in-phase end and end of oppisite phase equates in a larger frequency range.The second chip U2 is low-power consumption, low noise, high-precision instrument amplifier AD620, its input impedance reaches 10G, input end capacitor is 2pF, its enlargement factor can arrange by outer meeting resistance, can effectively suppress harmonic wave and reduce Radiative EMI, it is 1 that its enlargement factor is set in the utility model metering circuit.

As shown in Figure 3, the phase sensitive detection circuit 4 in the utility model impedance measuring circuit, comprises the 3rd chip U3, four-core sheet U4 and the 5th chip U5; The 3rd pin of the 3rd chip U3 is connected with impedance/power converting circuit 3 respectively with the 7th pin, and the 3rd pin of the 3rd chip U3 is connected with the 6th pin of the second chip U2 respectively with the 7th pin; The 4th pin of the 3rd chip U3 is connected with DDS signal source 2 respectively with the 6th pin; The 5th connect+5V of the pin power supply of the 3rd chip U3, the 14th connect-5V of the pin power supply of the 3rd chip U3; The 2nd pin of the 3rd chip U3 and the equal ground connection of the 8th pin; The 9th pin of the 3rd chip U3 connects the 8th pin of the 5th chip U5, and the 1st pin of the 3rd chip U3 connects the 8th pin of four-core sheet U4; The 5th pin of four-core sheet U4 is connected with governor circuit 1 respectively with the 5th pin of the 5th chip U5; The 1st pin of four-core sheet U4 is connected with the P3.0 mouth of governor circuit 1 single-chip microcomputer respectively with the 1st pin of the 5th chip U5, the equal ground connection of the 6th pin of the 6th pin of four-core sheet U4 and the 5th chip U5, the 7th connect respectively+5V of the pin power supply of the 7th pin of four-core sheet U4 and the 5th chip U5, the 2nd connect respectively-5V of the pin power supply of the 2nd pin of four-core sheet U4 and the 5th chip U5, the 3rd pin of four-core sheet U4 is connected with the 4th pin of four-core sheet U4, and the 3rd pin of the 5th chip U5 is connected with the 4th pin of the 5th chip U5.

The 3rd chip U3 is multiplier MLT04, it is a four-way four-quadrant Voltage-output analog multiplier, port arranges simply, processing ease, power dissipation ratio is lower, has good temperature stability, because it has four-way, so this metering circuit only needs a slice MLT04, and only use two paths wherein; Four-core sheet U4 and the 5th chip U5 are low-pass filter MAX295, it is programmable, and clock is 50: 1 with the ratio of cutoff frequency, and the cutoff frequency of MAX295 is fixed as 100Hz, because the needed clock frequency of MAX295 is lower, can directly be provided by single-chip microcomputer.What the 1st pin of four-core sheet U4 was connected with the 1st pin of the 5th chip U5 is the P3.0 pin of single-chip microcomputer, and single-chip microcomputer provides clock by this pin to low-pass filter.

While measuring the impedance of circuit-under-test with the utility model impedance measuring circuit, circuit-under-test Z is connected with the incoming end of two circuit-under-tests, as shown in Figure 4.The 3rd pin of the first chip U1 is the positive input terminal of the first chip U1, and the 2nd pin of the first chip U1 is the negative input end of the first chip U1, and the 6th pin of the first chip U1 is the output terminal of the first chip U1.The 3rd pin of the second chip U2 is the positive input terminal of the second chip U2, and the 2nd pin of the second chip U2 is the negative input end of the second chip U2, and the 6th pin of the second chip U2 is the output terminal of the second chip U2.

DDS signal source 2 produces signal DDS1 and signal DDS2, and signal DDS1 is 0 ° of signal that DDS signal source 2 provides, and signal DDS2 is 90 ° of reference signals that DDS signal source 2 provides.Signal DDS1 is input impedance/power converting circuit 3 and phase sensitive detection circuit 4 simultaneously, and the DDS1 signal of input impedance/voltage conversion circuit 3 provides driving for impedance/voltage conversion circuit 3; The DDS1 signal of input phase sensitive detection circuit 4 provides multiplying signal for the multiplier in phase sensitive detection circuit 4.Signal DDS1 by a high speed, the first high chip U1 of input impedance, guarantee that the voltage of the first chip U1 in-phase end and end of oppisite phase equates in a larger frequency range, and equal input voltage vin 1.The electric current of measured circuit of flowing through determines by the first resistance R 1, and the first resistance R 1 is reference resistance.Show that through emulation VK equates with Vin1.Can ignore owing to flowing into the electric current of the first chip U1 end of oppisite phase, so flow through first electric current of resistance R 1 and the electric current of circuit-under-test equate.Therefore have:

In formula: VR1 represents the magnitude of voltage of the first resistance, unit is V; R1 represents the resistance value of the first resistance, use be the slide rheostat of 100K Ω; Vin1 represents the DDS1 signal that signal source produces, and this is voltage signal, so unit is V; Iz represents the electric current by circuit-under-test, the A of unit; Vz is the magnitude of voltage of circuit-under-test, and unit is V.Formula (1) (2) (3) has provided the calculated relationship in circuit, for the impedance of calculating circuit-under-test is below prepared.

By the second chip U2, amplify through the second chip U2 again, obtain signal D1 at the output terminal of the second chip U2.The output terminal of the 3rd chip U3 respectively output signal DDS1 is multiplied by the result of signal D1 and signal DDS2 and is multiplied by the result of signal D1.Two results of the 3rd chip U3 output are sent into respectively four-core sheet U4 and the 5th chip U5 filtering secondary and harmonic wave more than secondary, obtain DC component Vout1 and Vout2.Again Vout1 and Vout2 are sent into governor circuit 1 and carry out A/D conversion, signal processing, calculating, obtain and show the resistance value of circuit-under-test.

For example: establish signal DDS1 and signal DDS2 is respectively:

Establish again the signal Vz=of the second chip U2 output

Multiply each other with Vin1 and Vin respectively with Vz, obtain two result of product, these two result of product after low-pass filter filtering second harmonic, remaining and DC component.Suppose the DC component that collects for:

Through calculating the amplitude A that just can obtain circuit-under-test impedance ₂and phase ₁:

First the utility model impedance measuring circuit adopts the AD9854 of direct digital frequency synthesis technology by DDS signal source 2() produce needed two-way with frequency strict orthogonal signal, and signal frequency is program control adjustable in claimed range.Then adopt impedance/voltage conversion circuit 3 to realize tested impedance to the conversion of voltage, 0 ° of reference signal that wherein DDS signal source 2 is exported provides driving through Hyblid Buffer Amplifier for impedance/voltage conversion circuit 3.0 ° of producing with source of synchronising signal respectively through the multiplier in phase sensitive detection circuit 4 of voltage signal after conversion and 90 ° of reference signals multiply each other, signal after multiplying each other is afterwards through the low-pass filter filtering in phase sensitive detection circuit 4, and then gather by the A/D of governor circuit 1, and process computing in governor circuit 1, finally obtain and show the resistance value of measurand.

Fig. 5 is the main program flow chart of the utility model metering circuit, adopts C Programming with Pascal Language.First by single-chip microcomputer according to definite survey frequency point, produce low-pass filter needed clock, send to low-pass filter MAX295 by P3.0 mouth; Secondly between single-chip microcomputer and DDS signal source, adopt parallel communications, given frequency and phase place are write to DDS signal source, and synchronous control signal DDS1 and signal DDS2 renewal, orthogonal signal produced; Time delay waits until that low-pass filter completes after filtering, carries out impedance measurement to circuit-under-test; Start A/D(the A/D here and be included in governor circuit, and need two-way A/D to gather), read transformation result, then calculate amplitude and the phase place of also display frequency, impedance.After the measurement of a Frequency point completes, change signal frequency, measure next Frequency point, circulation above-mentioned steps, until reach upper frequency limit (test frequency scope is 50 kHz～500 kHz), just can realize the measurement of circuit-under-test impedance.

Claims

1. an impedance measuring circuit, it is characterized in that, comprise the DDS signal source (2), impedance/voltage conversion circuit (3) and the phase sensitive detection circuit (4) that are connected successively, DDS signal source (2) is connected with phase sensitive detection circuit (4), and DDS signal source (2) is also connected with governor circuit (1) respectively with phase sensitive detection circuit (4).

2. impedance measuring circuit according to claim 1, it is characterized in that, described governor circuit (1), the frequency that produces two-way orthogonal signal and upgrade two-way orthogonal signal for controlling DDS signal source (2), provides clock for the wave filter of giving phase sensitive detection circuit (4); Be used for by inner A/D change-over circuit collection and process the signal that device transports after filtering; For passing through the impedance measurements of inner liquid crystal Circuit display circuit-under-test, and each impedance measurements is stored.

3. impedance measuring circuit according to claim 1, is characterized in that, described impedance/voltage conversion circuit (3) comprises the first chip (U1) and the second chip (U2), and the first chip (U1) adopts operation amplifier chip AD843; The second chip (U2) adopts operation amplifier chip AD620; The 3rd pin of the first chip (U1) connects DDS signal source (2), the 2nd pin of the first chip (U1) is connected with one end of the first resistance (R1) respectively, the incoming end that the 2nd pin of the first chip (U1), the contact of the first resistance (R1) are circuit-under-test; The other end ground connection of the first resistance (R1), the 2nd pin of the first chip (U1) is also connected with the 2nd pin of the second chip (U2); The 4th pin connect respectively-15V power supply of the first chip (U1) and one end of the first electric capacity (C1), the other end ground connection of the first electric capacity (C1); The 7th pin of the first chip (U1) is connected with one end of the second electric capacity (C2) with+15V power supply respectively, the other end ground connection of the second electric capacity (C2); The 6th pin of the first chip (U1) connects the 3rd pin of the second chip (U2), another incoming end that the contact between the first chip (U1) the 6th pin and the second chip (U2) the 3rd pin is circuit-under-test; The 4th connect-15V of pin power supply of the second chip (U2), the 5th pin ground connection of the second chip (U2), the 7th connect+15V of pin power supply of the second chip (U2), the 6th pin of the second chip (U2) is connected with phase sensitive detection circuit (4).

4. according to impedance measuring circuit described in claim 1,2 or 3, it is characterized in that, described phase sensitive detection circuit (4) comprises the 3rd chip (U3), four-core sheet (U4) and the 5th chip (U5), and the 3rd chip (U3) adopts multiplier MLT04, described four-core sheet (U4) and the 5th chip (U5) all adopt low-pass filter MAX295, the 3rd pin of the 3rd chip (U3) is connected with impedance/power converting circuit (3) respectively with the 7th pin, the 4th pin of the 3rd chip (U3) is connected with DDS signal source (2) respectively with the 6th pin, the 5th connect+5V of pin power supply of the 3rd chip (U3), the 14th connect-5V of pin power supply of the 3rd chip (U3), the 2nd pin of the 3rd chip (U3) and the equal ground connection of the 8th pin, the 9th pin of the 3rd chip (U3) connects the 8th pin of the 5th chip (U5), and the 1st pin of the 3rd chip (U3) connects the 8th pin of four-core sheet (U4), the 5th pin of the 5th pin of four-core sheet (U4) and the 5th chip (U5) is connected with governor circuit (1) respectively, the 1st pin of the 1st pin of four-core sheet (U4) and the 5th chip (U5) is connected with governor circuit (1) respectively, the equal ground connection of the 6th pin of the 6th pin of four-core sheet (U4) and the 5th chip (U5), the 7th connect respectively+5V of pin power supply of the 7th pin of four-core sheet (U4) and the 5th chip (U5), the 2nd connect respectively-5V of pin power supply of the 2nd pin of four-core sheet (U4) and the 5th chip (U5), the 3rd pin of four-core sheet (U4) is connected with the 4th pin of four-core sheet (U4), the 3rd pin of the 5th chip (U5) is connected with the 4th pin of the 5th chip (U5).