CN203595880U - Pixel structure, array substrate and display device - Google Patents
Pixel structure, array substrate and display device Download PDFInfo
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- CN203595880U CN203595880U CN201320844020.8U CN201320844020U CN203595880U CN 203595880 U CN203595880 U CN 203595880U CN 201320844020 U CN201320844020 U CN 201320844020U CN 203595880 U CN203595880 U CN 203595880U
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- 239000000758 substrate Substances 0.000 title claims abstract description 6
- 239000010409 thin film Substances 0.000 claims description 22
- 239000012528 membrane Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 5
- 238000010408 sweeping Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
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Abstract
The utility model discloses a pixel structure, an array substrate and a display device. The pixel structure comprises pixel units, each pixel unit comprises a plurality of lines of sub-pixel units, sub-pixel units in each line correspond to two scanning lines, wherein the two scanning lines correspond to every two adjacent rows of sub-pixels in the line of sub-pixel units respectively, and every two adjacent rows of sub pixels in the line of sub-pixel units correspond to a signal line. Compared with a traditional pixel structure, the number of the signal lines is reduced by increasing the number of the scanning lines, and therefore the number of signal line drive integrated circuits is reduced. A line of pixels in the pixel structure correspond to the six scanning lines and one signal line, the signal lines are opened line by line to charge the corresponding sub-pixels, and therefore the display effect is achieved; due to the fact that the cost of the signal line drive integrated circuits is higher than the cost of scanning line drive integrated circuits, the number of the signal lines is reduced, and cost can be saved.
Description
Technical field
The utility model relates to display technique field, particularly a kind of dot structure, array base palte and display device.
Background technology
TFT-LCD(Thin Film Transistor-Liquid Crystal Display, Thin Film Transistor-LCD, hereinafter to be referred as display) in array base palte (being TFT substrate) generally include sweep trace, signal wire, thin film transistor (TFT), pixel region and peripheral circuit.Viewing area is made up of the pixel of lining up array, each pixel forms (being generally three sub-pixels of RGB) by multiple sub-pixels again, wherein the number of pixel is determined by resolution, the display that is a × b for resolution, and viewing area is capable by a, b row pixel forms; When work, sweep trace is opened successively line by line, and all signal wires charge to this row pixel of opening simultaneously, thereby reach display effect.
Traditional array base palte display structure, one-row pixels corresponding one, two or three sweep traces, as shown in Figure 1-Figure 3, wherein Fig. 1 is the schematic diagram of the corresponding surface sweeping line of one-row pixels, Fig. 2 is the schematic diagram of the corresponding two surface sweeping lines of one-row pixels, and Fig. 3 is the schematic diagram of the corresponding three surface sweeping lines of one-row pixels.Take the situation of the corresponding sweep trace of one-row pixels in Fig. 1 as example, the total a bar sweep trace of the display that is a × b for resolution one, due to the corresponding signal line of a sub-pixel, each pixel comprises 3 sub-pixels, so be multiplied by 3, i.e. b × 3 signal line.In the display course of work, the work of sweep trace and signal wire is all by IC(Integrated Circuit, be integrated circuit) drive, but the number of the line that IC can drive is conditional, so need multiple IC to drive, sweep trace and signal wire quantity are more, the IC quantity needing is also just more, that is to say the number that reduces signal wire, just can reduce the quantity of signal wire drive IC, increase the number of signal wire, will increase the quantity of signal wire drive IC.In like manner, be also to be determined by the number of surface sweeping line for the quantity of scanning line driving IC, the total quantity of signal wire and sweep trace cannot reduce, and reduces signal wire, will increase sweep trace.
Therefore adopt traditional array base palte display structure, the number of signal wire is more, in order to guarantee the normal work of array base palte, every signal line and sweep trace all need a corresponding drive IC to drive, because the cost of signal wire drive IC will be higher than scanning line driving IC, the cost compare that above-mentioned array structure expends is high.
Utility model content
(1) technical matters that will solve
The technical problems to be solved in the utility model is how to design a kind of array structure, reduces the number of signal wire drive IC, to reach cost-saving object.
(2) technical scheme
For solving the problems of the technologies described above, the utility model provides a kind of dot structure, comprise pixel cell, each pixel cell comprises multirow sub-pixel unit, corresponding two sweep traces of every row sub-pixel unit, article two, the sweep trace sub-pixels to adjacent two row in should row sub-pixel unit respectively, the corresponding signal line of the sub-pixel of adjacent two row in every row sub-pixel unit.
Further, described sub-pixel comprises thin film transistor (TFT).
Further, the Show Color of the first row sub-pixel unit in described multirow sub-pixel unit is red, comprises the first sub-pixel and the second sub-pixel, lays respectively at the both sides of described signal wire;
The Show Color of the second row sub-pixel unit is green, comprises the 3rd sub-pixel and the 4th sub-pixel, lays respectively at the both sides of described signal wire;
The Show Color of the third line sub-pixel unit is blue, comprises the 5th sub-pixel and the 6th sub-pixel, lays respectively at the both sides of described signal wire.
Further, the top of described the first row sub-pixel unit is the first sweep trace, between described the first row sub-pixel unit and described the second row, be provided with the second sweep trace and three scan line, between described the second row sub-pixel unit and described the third line, be provided with the 4th sweep trace and the 5th sweep trace, the below of described the third line sub-pixel unit is provided with the 6th sweep trace.
Further, when described the first sweep trace is opened, described signal wire is to described the second sub-pixel charging;
When described the second sweep trace is opened, described signal wire is to described the first sub-pixel charging;
When described three scan line is opened, described signal wire is to described the 4th sub-pixel charging;
When described the 4th sweep trace is opened, described signal wire is to described the 3rd sub-pixel charging;
When described the 5th sweep trace is opened, described signal wire is to described the 6th sub-pixel charging;
When described the 6th sweep trace is opened, described signal wire is to described the 5th sub-pixel charging.
Further, described signal wire and described sweep trace are driven by integrated circuit respectively.
Further, the grid of described thin film transistor (TFT) connects corresponding sweep trace, and source electrode connects described signal wire, and described drain electrode connects the pixel electrode of corresponding sub-pixel.
Further, described signal wire is every column distribution.
For solving the problems of the technologies described above, the utility model also provides a kind of array base palte, and described array base palte comprises above-described dot structure.
For solving the problems of the technologies described above, the utility model also provides a kind of display device, comprises array base palte and color membrane substrates, and described array base palte is above-described array base palte.
(3) beneficial effect
The utility model embodiment provides a kind of dot structure, comprise pixel cell, each pixel cell comprises multirow sub-pixel unit, corresponding two sweep traces of every row sub-pixel unit, article two, the sweep trace sub-pixels to adjacent two row in should row sub-pixel unit respectively, the corresponding signal line of the sub-pixel of adjacent two row in every row sub-pixel unit.With respect to traditional dot structure, the utility model, by increasing the number of sweep trace, reduces the number of signal wire, thereby reduces the number of signal wire drive integrated circult.Corresponding six sweep traces of one-row pixels and a signal line in this dot structure, signal wire is opened line by line, corresponding sub-pixel is charged, reach display effect, because the cost of signal wire drive integrated circult is higher than the cost of scanning line driving integrated circuit, so reduce the number of signal wire, just can reach cost-saving object.
Meanwhile, the utility model also provides a kind of array base palte and a kind of display device that comprises this array base palte that comprises above-mentioned dot structure based on above-mentioned dot structure.
Accompanying drawing explanation
Fig. 1 is the dot structure schematic diagram of the corresponding sweep trace of traditional one-row pixels;
Fig. 2 is the dot structure schematic diagram of corresponding two sweep traces of traditional one-row pixels;
Fig. 3 is the dot structure schematic diagram of corresponding three sweep traces of traditional one-row pixels;
Fig. 4 is the dot structure schematic diagram of corresponding six sweep traces of the one-row pixels that provides of the utility model embodiment;
Fig. 5 is each electrode annexation schematic diagram of the thin film transistor (TFT) in the utility model embodiment.
Embodiment
Below in conjunction with drawings and Examples, embodiment of the present utility model is described in further detail.Following examples are used for illustrating the utility model, but are not used for limiting scope of the present utility model.
The utility model embodiment provides a kind of dot structure, by changing the array structure of existing pixel distribution, the dot structure schematic diagram that Fig. 1 provides for the utility model embodiment, dot structure comprises pixel cell, each pixel cell comprises multirow sub-pixel unit, corresponding two sweep traces of every row sub-pixel unit, two sweep traces are the sub-pixels to adjacent two row in should row sub-pixel unit respectively, the corresponding signal line of the sub-pixel of adjacent two row in every row sub-pixel unit.
The present embodiment, by the mode that adopts pixel horizontally-arranged to distribute, increases number of scanning lines, and to reduce line number signal, thereby the number of minimizing signal wire drive integrated circult is realized cost-effective object.
Preferably, the multirow sub-pixel unit in the present embodiment is three row sub-pixels, and the Show Color of the first row sub-pixel unit is red, comprises the first sub-pixel and the second sub-pixel, lays respectively at the both sides of signal wire; The Show Color of the second row sub-pixel unit is green, comprises the 3rd sub-pixel and the 4th sub-pixel, lays respectively at the both sides of signal wire; The Show Color of the third line sub-pixel unit is blue, comprises the 5th sub-pixel and the 6th sub-pixel, lays respectively at the both sides of signal wire.
In Fig. 1 take a pixel cell as example, comprise three row sub-pixel unit, the Show Color of the first row sub-pixel unit is red (being R), corresponding two sweep traces 111 and 112, sub-pixels to adjacent two row in should row sub-pixel unit respectively, i.e. the second sub-pixel 142 and the first sub-pixel 141; The Show Color of the second row sub-pixel unit is green (being G), corresponding two sweep traces 113 and 114, the sub-pixels to adjacent two row in should row sub-pixel unit respectively, i.e. the 4th sub-pixel 144 and the 3rd sub-pixel 143; The Show Color of the third line sub-pixel unit is blue (being B), corresponding two sweep traces 115 and 116, the sub-pixels to adjacent two row in should row sub-pixel unit respectively, i.e. the 6th sub-pixel 146 and the 5th sub-pixel 145.The corresponding signal line 121 of the sub-pixel of adjacent two row in every row sub-pixel unit, in Fig. 1, signal wire 121 can charge to the sub-pixel 141,142,143,144,145 and 146 that is distributed in signal wire 121 both sides, realizes corresponding 6 sweep traces of one-row pixels and 1 signal line in Fig. 1.
Concrete, the top of the first row sub-pixel unit in the present embodiment is the first sweep trace 111, between the first row sub-pixel unit and the second row, be provided with two sweep traces, respectively the second sweep trace 112 and three scan line 113, between the second row sub-pixel unit and the third line, be provided with two sweep traces, be respectively the 4th sweep trace 114 and the 5th sweep trace 115, the below of the third line sub-pixel unit is provided with the 6th sweep trace 116, as shown in Figure 1.
Preferably, sub-pixel in the present embodiment comprises thin film transistor (TFT), as shown in fig. 1, the first sub-pixel 141 comprises thin film transistor (TFT) 132, the second sub-pixel 142 comprises that thin film transistor (TFT) 131, the three sub-pixels 143 comprise that thin film transistor (TFT) 134, the four sub-pixels 144 comprise thin film transistor (TFT) 133, the 5th sub-pixel 145 comprises that thin film transistor (TFT) 136, the six sub-pixels 146 comprise thin film transistor (TFT) 135.Wherein be positioned at adjacent two row of same a line thin film transistor (TFT) opposite direction is set, and near signal wire 121 1 sides between two row sub-pixels.
Concrete, for the thin film transistor (TFT) in each sub-pixel, the connection of its each electrode is respectively: the grid of thin film transistor (TFT) connects corresponding sweep trace, and source electrode connects signal wire, and drain electrode connects the pixel electrode of corresponding sub-pixel.In the present embodiment with the annexation schematic diagram of thin film transistor (TFT) 135 each electrodes in the 6th sub-pixel 146 as shown in Figure 5, concrete, the grid G of thin film transistor (TFT) 135 connects the 5th sweep trace 115, the source S of thin film transistor (TFT) 135 connects signal wire 121, and the drain D of thin film transistor (TFT) 135 connects the pixel electrode of the 6th sub-pixel 146.
It should be noted that, the signal wire in the present embodiment is every column distribution.Shown in Fig. 1 is only a pixel cell, if by the expansion of its along continuous straight runs and with sequence number sequence, row that are only odd number or even number in sequence number are just distributed with signal wire.In Fig. 1, for the first sub-pixel, there is signal wire on right side, there is no signal wire in left side, for the second sub-pixel, has signal wire in left side, there is no signal wire on right side.
Driven by integrated circuit (IC) respectively for above-mentioned signal wire 121 and six sweep traces 111～116.
For above-mentioned dot structure, principle when its work is as follows:
When the first sweep trace 111 is opened, signal wire 121 charges to the second sub-pixel 142;
When the second sweep trace 112 is opened, signal wire 121 charges to the first sub-pixel 141;
When three scan line 113 is opened, signal wire 121 charges to the 4th sub-pixel 144;
When the 4th sweep trace 114 is opened, signal wire 121 charges to the 3rd sub-pixel 143;
When the 5th sweep trace 115 is opened, signal wire 121 charges to the 6th sub-pixel 146;
When the 6th sweep trace 116 is opened, signal wire 121 charges to the 5th sub-pixel 145.
Therefore, carry out layout by the mode that dot structure is taked laterally to arrange, increase the number of sweep trace, reduce the number of signal.
It should be noted that, in above-described embodiment, be with TN(Twisted Nematic, twisted-nematic) type TFT-LCD is that example describes, in fact for IPS(In-Plane Switching, transverse electric field effect show), FFS(Fringe Field Switching, fringe field switching), VA(Vertical Alignment, vertical orientation) structure TFT-LCD be too suitable for, repeat no more herein.
To sum up, the dot structure that the present embodiment provides, with respect to traditional dot structure, by increasing the number of sweep trace, reduces the number of signal wire, thereby reduces the number of signal wire drive integrated circult.Corresponding six sweep traces of one-row pixels and a signal line in this dot structure, signal wire is opened line by line, corresponding sub-pixel is charged, reach display effect, because the cost of signal wire drive integrated circult is higher than the cost of scanning line driving integrated circuit, so reduce the number of signal wire, just can reach cost-saving object.
Based on above-mentioned dot structure, a kind of array base palte is also provided in the utility model embodiment, this array base palte comprises above-described dot structure.
Based on above-mentioned array base palte, a kind of display device is also provided in the utility model embodiment, comprise array base palte and color membrane substrates, array base palte is wherein above-described array base palte.
Above embodiment is only for illustrating the utility model; and be not limitation of the utility model; the those of ordinary skill in relevant technologies field; in the situation that not departing from spirit and scope of the present utility model; can also make a variety of changes and modification; therefore all technical schemes that are equal to also belong to category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.
Claims (10)
1. a dot structure, comprise pixel cell, it is characterized in that, each pixel cell comprises multirow sub-pixel unit, corresponding two sweep traces of every row sub-pixel unit, article two, the sweep trace sub-pixels to adjacent two row in should row sub-pixel unit respectively, the corresponding signal line of the sub-pixel of adjacent two row in every row sub-pixel unit.
2. dot structure as claimed in claim 1, is characterized in that, described sub-pixel comprises thin film transistor (TFT).
3. dot structure as claimed in claim 1, is characterized in that, the Show Color of the first row sub-pixel unit in described multirow sub-pixel unit is red, comprises the first sub-pixel and the second sub-pixel, lays respectively at the both sides of described signal wire;
The Show Color of the second row sub-pixel unit is green, comprises the 3rd sub-pixel and the 4th sub-pixel, lays respectively at the both sides of described signal wire;
The Show Color of the third line sub-pixel unit is blue, comprises the 5th sub-pixel and the 6th sub-pixel, lays respectively at the both sides of described signal wire.
4. dot structure as claimed in claim 3, it is characterized in that, the top of described the first row sub-pixel unit is the first sweep trace, between described the first row sub-pixel unit and described the second row, be provided with the second sweep trace and three scan line, between described the second row sub-pixel unit and described the third line, be provided with the 4th sweep trace and the 5th sweep trace, the below of described the third line sub-pixel unit is provided with the 6th sweep trace.
5. dot structure as claimed in claim 4, is characterized in that, when described the first sweep trace is opened, described signal wire is to described the second sub-pixel charging;
When described the second sweep trace is opened, described signal wire is to described the first sub-pixel charging;
When described three scan line is opened, described signal wire is to described the 4th sub-pixel charging;
When described the 4th sweep trace is opened, described signal wire is to described the 3rd sub-pixel charging;
When described the 5th sweep trace is opened, described signal wire is to described the 6th sub-pixel charging;
When described the 6th sweep trace is opened, described signal wire is to described the 5th sub-pixel charging.
6. dot structure as claimed in claim 1, is characterized in that, described signal wire and described sweep trace are driven by integrated circuit respectively.
7. dot structure as claimed in claim 2, is characterized in that, the grid of described thin film transistor (TFT) connects corresponding sweep trace, and source electrode connects described signal wire, and described drain electrode connects the pixel electrode of corresponding sub-pixel.
8. dot structure as claimed in claim 1, is characterized in that, described signal wire is every column distribution.
9. an array base palte, is characterized in that, described array base palte comprises the dot structure described in any one in claim 1-8.
10. a display device, comprises array base palte and color membrane substrates, it is characterized in that, described array base palte is array base palte claimed in claim 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201320844020.8U CN203595880U (en) | 2013-12-19 | 2013-12-19 | Pixel structure, array substrate and display device |
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| CN201320844020.8U CN203595880U (en) | 2013-12-19 | 2013-12-19 | Pixel structure, array substrate and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108538249A (en) * | 2018-06-22 | 2018-09-14 | 京东方科技集团股份有限公司 | Pixel-driving circuit and method, display device |
| WO2019084981A1 (en) * | 2017-11-03 | 2019-05-09 | 惠科股份有限公司 | Display panel and display device |
-
2013
- 2013-12-19 CN CN201320844020.8U patent/CN203595880U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019084981A1 (en) * | 2017-11-03 | 2019-05-09 | 惠科股份有限公司 | Display panel and display device |
| US11221530B2 (en) | 2017-11-03 | 2022-01-11 | HKC Corporation Limited | Display panel and display device |
| CN108538249A (en) * | 2018-06-22 | 2018-09-14 | 京东方科技集团股份有限公司 | Pixel-driving circuit and method, display device |
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Granted publication date: 20140514 |