CN203562975U - Neutral point clamped three-level controllable switch current transformer with fewest components - Google Patents
Neutral point clamped three-level controllable switch current transformer with fewest components Download PDFInfo
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Abstract
The utility model discloses a neutral point clamped three-level controllable switch current transformer with fewest components. Bridge arm circuits of circuit topological structure comprise DC capacitors, power switching elements, clamping diodes, and reversed fly-wheel diodes, wherein every two power switching elements are just configured with a reversed fly-wheel diode. Compared with the prior art, electronic components of the current transformer circuit are fewest, thereby improving integration level of the circuit, and meanwhile reduction of the electronic components can also reduce failure rate of the circuit. Adding a buffer circuit has effect of reducing peak voltage when the power switching elements are turned off, thereby further improving stability of the circuit.
Description
Technical field
The utility model relates to power inverter field, more particularly, relates to a kind of circuit of diode meta clamping type three-level inverter.
Background technology
For energy savings, enhance productivity, the object reducing production costs, adopt high-voltage high-power frequency transformator to become people's first-selection, in order to solve the contradiction of low pressure (middle pressure) main switching device in high-voltage applications situation, external many scholars have proposed multi-level inverse conversion technology, in recent years, along with the development of power electronic technology, multi-level inverse conversion technology is progressively applied to a plurality of social fields.
For the switch power device with speed-sensitive switch characteristic, not allow directly series connection, otherwise the dispersiveness due to devices switch characteristic, the high voltage of intermediate loop is directly added on the late device of opening, make lately to open that switch power may bear high pressure and breakdown, and then cause switch power device failure on whole brachium pontis.Adopt in this case switch power device directly to connect the voltage-sharing of the Static and dynamic of the switch power device making troubles.The development of large capacity switching device also can reach capacity gradually with its physical property, and capacity is larger, and device cost is higher, and practicality, reliability will reduce greatly.
The circuit topological structure kind of high voltage converter is more at present, and corresponding switch power device capacity is also increasing, and it mainly contains 3 kinds of basic topological structures: 1.H bridge concatenation-type; 2. capacitor-clamped formula; 3. diode clamp type.Wherein most widely used is the third.These direct voltage frequency converter topological structures because of output voltage more than general two level converter output level numbers, so be called as multi-level frequency conversion device.So-called many electricity are inversion transformation technique frequently, just refers to that inverter output has a plurality of level with respect to intermediate dc loop mid point.When level number is 3, become three-level inverter, and can be by that analogy.
A kind of as three-level inverter, diode meta clamping type three-level inverter, it has advantages of that DC side is withstand voltage high.Due to this advantage, diode meta clamping type three-level inverter is widely used in machine field.In machine field, direct voltage is higher, means that electric current on inductance can change faster, that is to say, the tracking performance of electric current can be better.AC phase voltage has three level, and for three-phase tri-level current transformer, line voltage can have 5 level.More level quantity, means that Resonance Wave Composition is lower.
In the prior art at present, in diode meta clamping type three-level inverter circuit, as shown in Figure 1, have the fly-wheel diode of a reverse parallel connection on each device for power switching, the every phase on each brachium pontis has 4 reverse fly-wheel diodes.Electronic component is many, will cause overall volume large, and the integrated level of semiconductor components and devices declines, and on the other hand, on single brachium pontis, element is more, and the reliability of this circuit is just lower, and any one element breaks down and all can cause integrated circuit fault.So, under the prerequisite of performance that guarantees integrated circuit, reduce as far as possible the number of elements in circuit, just become the key addressing the above problem.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of and is guaranteeing under the prerequisite of integrated circuit, the neutral-point-clamped formula three level gate-controlled switch current transformers of the minimum minimum element of element in circuit.
Above-mentioned technical problem can be solved by following technological means: a kind of neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element, circuit topological structure is by upper, lower two bridge arm circuit form, described upper bridge arm circuit comprises first DC capacitor, the first device for power switching, the second device for power switching, first clamp diode and upper half reverse's fly-wheel diode, second bridge arm circuit comprises second DC capacitor, the 3rd device for power switching, the 4th device for power switching, second clamp diode, lower half reverse's fly-wheel diode, wherein the first device for power switching of first brachium pontis and first DC capacitor, first clamp diode series connection, after upper half reverse's fly-wheel diode and the second power switching device series, be connected in parallel on the first device for power switching, the 4th device for power switching of second brachium pontis is connected with second DC capacitor, second clamp diode, after lower half reverse's fly-wheel diode and the 3rd power switching device series, is connected in parallel on the 4th device for power switching, the second device for power switching is connected with the 3rd device for power switching and is connected with the output of place bridge arm circuit simultaneously, and first DC capacitor is connected with second DC capacitor and is connected with another DC terminal of place bridge arm circuit simultaneously.
From above-mentioned specific embodiment, for each device for power switching of prior art will configure a reverse fly-wheel diode, every two device for power switching only need to configure a reverse fly-wheel diode in the present invention, single-phasely so just can save two reverse fly-wheel diodes, two-phase just can be saved four, three-phase just can save six reverse fly-wheel diodes.Save electronic component, thereby improved circuit level.
The circuit topological structure of the neutral-point-clamped formula three level gate-controlled switch current transformers of described minimum element also includes buffer circuit, in the brachium pontis of every phase, described buffer circuit is divided into first buffer circuit and second buffer circuit, wherein first buffer circuit is connected in parallel on the first switch power part of described first brachium pontis, and second buffer circuit is connected in parallel on the 4th switch power part of described second brachium pontis.
The configuration of buffer circuit is the impact of peak voltage on circuit when reducing as much as possible switch-off power switching device, stability and the useful life of improving integrated circuit.
Described first buffer circuit consists of first buffer capacitor, first buffer capacitor discharge diode and first buffer capacitor discharge resistance, wherein first buffering discharge diode is connected with first buffer capacitor, first buffer capacitor discharge resistance is connected in parallel on first buffering discharge diode two ends, and first buffer circuit is incorporated to upper bridge arm circuit by first buffer capacitor and first buffering discharge diode.
Described second buffer circuit consists of second buffer capacitor, second buffer capacitor discharge diode and second buffer capacitor discharge resistance, wherein second buffering discharge diode is connected with second buffer capacitor, second buffer capacitor discharge resistance is connected in parallel on second buffering discharge diode two ends, and second buffer circuit is incorporated to lower bridge arm circuit by second buffer capacitor and second buffering discharge diode.
Described first DC capacitor is parallel with first overvoltage buffer capacitor, and second DC capacitor is parallel with second overvoltage buffer capacitor.
The desirable withstand voltage of described upper and lower half DC capacitor is half of direct current total voltage.
Described the first device for power switching, the second device for power switching, the 3rd device for power switching and the 4th device for power switching are gate-controlled switch device for power switching.
The circuit structure of described current transformer can be single-phase, two-phase or three-phase circuit.
The three-phase circuit structure of described current transformer is phase three-wire three or three-phase and four-line circuit.
Described gate-controlled switch device for power switching is MOSFET, IGBT, the combination of one or more in IGCT.But be not limited to this several types and combination.
Usefulness of the present utility model is: be compared to the present situation that each power switch component in prior art needs a reverse fly-wheel diode in parallel, the quantity of the reverse fly-wheel diode in when design of the present utility model each brachium pontis subtracts and is a half, the number of phases of circuit is more, the number of the electronic component that can save is more, thereby improved the integrated level of circuit, the minimizing of electronic component simultaneously also can reduce the failure rate of circuit, buffer circuit can also play the effect of the peak voltage while reducing device for power switching shutoff, further improve the stability of circuit.
Accompanying drawing explanation
Fig. 1 is the topological structure schematic diagram (three-phase circuit) of prior art;
Fig. 2 is the topological structure schematic diagram (single phase circuit) of specific embodiment one;
Fig. 3 is the topological structure schematic diagram (two phase circuit) of specific embodiment two;
Fig. 4 is the topological structure schematic diagram (phase three-wire three circuit) of specific embodiment three;
Fig. 5 is the topological structure schematic diagram (three-phase and four-line circuit) of specific embodiment three;
Fig. 6 is that the topological structure schematic diagram of specific embodiment four comprises buffer circuit (single phase circuit).
Embodiment
Specific embodiment one as shown in Figure 2, the circuit of the neutral-point-clamped formula three level gate-controlled switch current transformers of the minimum element shown in this specific embodiment is single phase circuit, its circuit topological structure is by upper, lower two bridge arm circuit form, described upper bridge arm circuit comprises first DC capacitor Cd1, the first device for power switching S1, the second device for power switching S2, first clamp diode Dc1 and upper half reverse's sustained diode 1, second bridge arm circuit comprises second DC capacitor Cd2, the 3rd device for power switching S3, the 4th device for power switching S4, second clamp diode Dc2, lower half reverse's sustained diode 2, wherein the first device for power switching S1 of first brachium pontis and first DC capacitor Cd1, first clamp diode Dc1 series connection, upper half reverse's sustained diode 1 is connected in parallel on the first device for power switching S1 after connecting with the second device for power switching S2, the 4th device for power switching S4 of second brachium pontis connects with second DC capacitor Cd2, second clamp diode Dc2, and lower half reverse's sustained diode 2 is connected in parallel on the 4th device for power switching S2 after connecting with the 3rd device for power switching S3, the second device for power switching is connected with the 3rd device for power switching and is connected with the output terminals A C1 of place bridge arm circuit simultaneously, and first DC capacitor Cd1 is connected with second DC capacitor Cd2 and is connected with another DC terminal AC2 of place bridge arm circuit simultaneously.
Specific embodiment two as shown in Figure 3, the difference of itself and specific embodiment one is, and this specific embodiment is a two phase circuit, and its circuit topological structure is also by upper, lower two brachium pontis form, and its upper bridge arm circuit comprises first DC capacitor Cd1, the first device for power switching (Sa1 of a phase, the Sb1 of b phase), the second device for power switching (Sa2 of a phase, the Sb2 of b phase), first clamp diode (Dca1 of a phase, the Dcb1 of b phase) and upper half reverse's fly-wheel diode (Da1 of a phase, the Db1 of b phase), second bridge arm circuit comprises second DC capacitor Cd2, the 3rd device for power switching (Sa3 of a phase, the Sb3 of b phase), the 4th device for power switching (Sa4 of a phase, the Sb4 of b phase), second clamp diode (Dca2 of a phase, the Dcb2 of b phase) and lower half reverse's fly-wheel diode (Da2 of a phase, the Db2 of b phase). wherein first DC capacitor Cd1 and second DC capacitor Cd2 connect and are a, b shares mutually, all the other every electronic component connected modes that go up are mutually with specific embodiment 1, the second device for power switching is connected with the 3rd device for power switching and is connected with the output terminals A C1 of place bridge arm circuit simultaneously, and first DC capacitor Cd1 is connected with second DC capacitor Cd2 and is connected with another DC terminal AC2 of place bridge arm circuit simultaneously.
Specific embodiment three as shown in Figures 4 and 5, the difference of itself and above-mentioned two specific embodiments is, and this specific embodiment is a three-phase circuit, and its circuit topological structure is equally by upper, lower two brachium pontis form, and its upper bridge arm circuit comprises first DC capacitor Cd1, the first device for power switching (Sa1 of a phase, the Sb1 of b phase, the Sc1 of c phase), the second device for power switching (Sa2 of a phase, the Sb2 of b phase, the Sc2 of c phase), first clamp diode (Dca1 of a phase, the Dcb1 of b phase, the gcc1 of c phase) and upper half reverse's fly-wheel diode (Da1 of a phase, the Db1 of b phase, the Dc1 of c phase), second bridge arm circuit comprises second DC capacitor Cd2, the 3rd device for power switching (Sa3 of a phase, the Sb3 of b phase, the Sc3 of c phase), the 4th device for power switching (Sa4 of a phase, the Sb4 of b phase, the Sc4 of c phase), second clamp diode (Dca2 of a phase, the gcb2 of b phase, the gcc2 of c phase) and lower half reverse's fly-wheel diode (Da2 of a phase, the Db2 of b phase, the Dc2 of c phase). wherein first DC capacitor Cd1 and second DC capacitor Cd2 connect and are a, b, c three-phase shares mutually, all the other every electronic component connected modes that go up are mutually with specific embodiment one, the second device for power switching is connected with the 3rd device for power switching and is connected with the output of place bridge arm circuit simultaneously, and first DC capacitor Cd1 is connected with second DC capacitor Cd2 and is connected with another DC terminal of place bridge arm circuit simultaneously.
Specific embodiment four as shown in Figure 6, the difference of itself and above-mentioned three embodiment is, this specific embodiment be one with the single phase circuit of buffer circuit, the topological structure of its main circuit is identical with specific embodiment one, buffer circuit is divided into first buffer circuit and second buffer circuit, wherein first buffer circuit is by first buffer capacitor Cs1, first buffer capacitor discharge diode Dcs1 and first buffer capacitor discharge resistance Rcs1 form, wherein first buffering discharge diode Dcs1 connects with first buffer capacitor Cs1, first buffer capacitor discharge resistance Rcs1 is connected in parallel on first buffering discharge diode Dcs1 two ends, first buffer circuit free end by first buffer capacitor Cs1 and first buffering discharge diode Dcs1 is incorporated on the first switch power part S1 that upper bridge arm circuit is connected in parallel on first brachium pontis, second buffer circuit consists of second buffer capacitor Cs2, second buffer capacitor discharge diode Dcs2 and second buffer capacitor discharge resistance Rcs2, wherein second buffering discharge diode Dcs2 connects with second buffer capacitor Cs2, second buffer capacitor discharge resistance Rcs2 is connected in parallel on second buffering discharge diode Dcs2 two ends, and second buffer circuit free end by second buffer capacitor Cs2 and second buffering discharge diode Dcs2 is incorporated on the 4th switch power part S1 that lower bridge arm circuit is connected in parallel on second brachium pontis.In addition, at the two ends of first DC capacitor Cd1, be also parallel with first overvoltage buffer capacitor Cov1, at the two ends of second DC capacitor Cd1, be also parallel with second overvoltage buffer capacitor Cov2.
In all above-described embodiments, first, second, third and fourth device for power switching is gate-controlled switch device for power switching, and the desirable withstand voltage of upper and lower half DC capacitor is half of direct current total voltage.
Above embodiment is for understanding the utility model; not to restriction of the present utility model; the those of ordinary skill in relevant field; on the basis of technical scheme described in claim; can also make multiple variation or modification; such as gate-controlled switch device for power switching is MOSFET; IGBT; the combination of one or more in IGCT; but be not limited to this several types and combination; the device for power switching that can reach specification requirement can adopt, and these variations or modification should be understood to still belong to protection range of the present utility model.
Claims (10)
1. the neutral-point-clamped formula three level gate-controlled switch current transformers of a minimum element, circuit topological structure is by upper, lower two bridge arm circuit form, it is characterized in that: described upper bridge arm circuit comprises first DC capacitor, the first device for power switching, the second device for power switching, first clamp diode and upper half reverse's fly-wheel diode, second bridge arm circuit comprises second DC capacitor, the 3rd device for power switching, the 4th device for power switching, second clamp diode, lower half reverse's fly-wheel diode, wherein the first device for power switching of first brachium pontis and first DC capacitor, first clamp diode series connection, after upper half reverse's fly-wheel diode and the second power switching device series, be connected in parallel on the first device for power switching, the 4th device for power switching of second brachium pontis is connected with second DC capacitor, second clamp diode, after lower half reverse's fly-wheel diode and the 3rd power switching device series, is connected in parallel on the 4th device for power switching, the second device for power switching is connected with the 3rd device for power switching and is connected with the output of place bridge arm circuit simultaneously, and first DC capacitor is connected with second DC capacitor and is connected with another DC terminal of place bridge arm circuit simultaneously.
2. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 1, it is characterized in that: the circuit topological structure of the neutral-point-clamped formula three level gate-controlled switch current transformers of described minimum element also includes buffer circuit, in the brachium pontis of every phase, described buffer circuit is divided into first buffer circuit and second buffer circuit, wherein first buffer circuit is connected in parallel on the first switch power part of described first brachium pontis, and second buffer circuit is connected in parallel on the 4th switch power part of described second brachium pontis.
3. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 2, it is characterized in that: described first buffer circuit consists of first buffer capacitor, first buffer capacitor discharge diode and first buffer capacitor discharge resistance, wherein first buffering discharge diode is connected with first buffer capacitor, first buffer capacitor discharge resistance is connected in parallel on first buffering discharge diode two ends, and first buffer circuit is incorporated to upper bridge arm circuit by first buffer capacitor and first buffering discharge diode.
4. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 2, it is characterized in that: described second buffer circuit consists of second buffer capacitor, second buffer capacitor discharge diode and second buffer capacitor discharge resistance, wherein second buffering discharge diode is connected with second buffer capacitor, second buffer capacitor discharge resistance is connected in parallel on second buffering discharge diode two ends, and second buffer circuit is incorporated to lower bridge arm circuit by second buffer capacitor and second buffering discharge diode.
5. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 2, it is characterized in that: described first DC capacitor is parallel with first overvoltage buffer capacitor, second DC capacitor is parallel with second overvoltage buffer capacitor.
6. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 1, is characterized in that: the desirable withstand voltage of described upper and lower half DC capacitor is half of direct current total voltage.
7. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 1, is characterized in that: described the first device for power switching, the second device for power switching, the 3rd device for power switching and the 4th device for power switching are gate-controlled switch device for power switching.
8. according to the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element described in claim 1 to 7 any one, it is characterized in that: the circuit structure of described current transformer is any one of single-phase, two-phase or three-phase circuit.
9. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 8, is characterized in that: the three-phase circuit structure of described current transformer is phase three-wire three or three-phase and four-line circuit.
10. the neutral-point-clamped formula three level gate-controlled switch current transformers of minimum element according to claim 7, is characterized in that: described gate-controlled switch device for power switching is MOSFET IGBT, the combination of one or more in IGCT.
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| CN201320592588.5U CN203562975U (en) | 2013-09-25 | 2013-09-25 | Neutral point clamped three-level controllable switch current transformer with fewest components |
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| CN201320592588.5U CN203562975U (en) | 2013-09-25 | 2013-09-25 | Neutral point clamped three-level controllable switch current transformer with fewest components |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103973147A (en) * | 2014-05-31 | 2014-08-06 | 吉林大学 | Multi-level high-voltage grounded source electromagnetic transmitting circuit |
| CN104883072A (en) * | 2015-05-27 | 2015-09-02 | 中国矿业大学 | Transformerless ac-dc-ac cascade multilevel converter |
| CN106877715A (en) * | 2015-12-14 | 2017-06-20 | 日月元科技(深圳)有限公司 | Tri-level circuit |
| CN108448920A (en) * | 2018-03-29 | 2018-08-24 | 许继电气股份有限公司 | A kind of five-electrical level inverter |
-
2013
- 2013-09-25 CN CN201320592588.5U patent/CN203562975U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103973147A (en) * | 2014-05-31 | 2014-08-06 | 吉林大学 | Multi-level high-voltage grounded source electromagnetic transmitting circuit |
| CN104883072A (en) * | 2015-05-27 | 2015-09-02 | 中国矿业大学 | Transformerless ac-dc-ac cascade multilevel converter |
| CN106877715A (en) * | 2015-12-14 | 2017-06-20 | 日月元科技(深圳)有限公司 | Tri-level circuit |
| CN108448920A (en) * | 2018-03-29 | 2018-08-24 | 许继电气股份有限公司 | A kind of five-electrical level inverter |
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Free format text: FORMER OWNER: ZHAO ZHENGYI Effective date: 20150625 Owner name: SHENZHEN SHENGTAIQI TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: WANG LI Effective date: 20150625 |
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Effective date of registration: 20150625 Address after: 518000 Shennan garden, Nanshan District science and Technology Park, Shenzhen, Guangdong, C-7E Patentee after: SHENZHEN SANKATEC CO., LTD. Address before: Shenzhen City, Guangdong province 518000 Keyuan Road, Nanshan District science and Technology Park 9 Building No. 24 B501 Patentee before: Wang Li Patentee before: Zhao Zhengyi |
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