CN203522720U - Communication receiving circuit capable of frequency modulation - Google Patents
Communication receiving circuit capable of frequency modulation Download PDFInfo
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- CN203522720U CN203522720U CN201320670673.9U CN201320670673U CN203522720U CN 203522720 U CN203522720 U CN 203522720U CN 201320670673 U CN201320670673 U CN 201320670673U CN 203522720 U CN203522720 U CN 203522720U
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Abstract
The utility model discloses a communication receiving circuit capable of frequency modulation. The communication receiving circuit comprises a DC power source, a switch, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a ninth capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a socket, a first mutual inductor, a second mutual inductor, a first triode, a second triode, an inductor and an amplifier. According to the utility model, a superregeneration frequency modulation reception principle is utilized, and a high-gain miniaturized integrated circuit is adopted, so that the communication receiving circuit provided by the utility model is simple and novel in circuit and good in signal receiving effects, at the same time overcoming the disadvantages of poor selectivity, loud noise and the like of a superregeneration receiving circuit, and also maintains the advantages of high sensitivity, small electricity consumption, low cost and the like.
Description
Technical field
The utility model relates to a kind of receiving circuit, relates in particular to a kind of communication receiving circuit of Frequency Adjustable.
Background technology
Along with the development of China's urban construction, skyscraper continues to bring out, the shadow effect based on radio transmission, and the signal blind zone that can form communication in behind or the intermediate layer of these skyscrapers, this has just brought huge test to signal receiver.The development experience of signal receiver from discrete component to integrated process.In the last few years, along with developing rapidly of radio communication technology, phase-locked loop and frequency synthesis technique were widely used in every field, adopted phase-locked loop can produce frequency degree and the very high oscillator signal of accuracy in frequency synthesis technique.The most complex structure of signal receiving circuit now, the effect that signal receives is general, and cost is higher.
Utility model content
The purpose of this utility model is just to provide in order to address the above problem a kind of communication receiving circuit of novel Frequency Adjustable.
The utility model is achieved through the following technical solutions above-mentioned purpose:
The utility model comprises DC power supply, switch, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance, socket, the first instrument transformer, the second instrument transformer, the first triode, the second triode, inductance and amplifier, the positive pole of described DC power supply is connected with the first end of described switch, simultaneously elementary with described the first instrument transformer first end of the second end of described switch, the first end of described the 3rd resistance, the first end of described the 5th resistance is connected with the first end of described the 7th resistance, the negative pole while of described DC power supply and the first end of described the first electric capacity, the first end of described the second resistance, the first end of described the second electric capacity, the negative electricity source of described amplifier, the first end of described the 8th resistance, the first end of described the 5th electric capacity, the first end of described the 9th resistance, the first end of described the 7th electric capacity, the first end of described the 8th electric capacity is connected with the first end of described the 12 resistance, the second end of described the first electric capacity is connected with the first end of described the first resistance, the second end of described the first resistance simultaneously first end secondary with described the first instrument transformer with the collector electrode of described the first triode is connected, the second end of described the second resistance is connected with the emitter of described the first triode, the base stage of described the first triode is connected with the first end of described the 3rd electric capacity with the second end of described the 3rd resistance simultaneously, the second secondary end of described the first instrument transformer is connected with the first end of described socket, the second elementary end of described the first instrument transformer is connected with the first end of described the 4th electric capacity with the second end of described socket simultaneously, the second end while of described the 3rd electric capacity and the first end of described the 4th resistance, the output of described amplifier, the second end of described the 5th resistance is connected with the first end of described the 6th resistance, and the second end of described the 4th resistance is connected with the second end of described the second electric capacity, the second end while of described the 7th resistance and the first end of described inductance, the first end of described the tenth electric capacity, the first end of described the 11 resistance is connected with the first end of described the 9th electric capacity, the second end while of described inductance and the second end of described the 4th electric capacity, the first end of described the 6th electric capacity, the collector electrode of described the second triode is connected with the second end of described the tenth electric capacity, the emitter of described the second triode simultaneously first end elementary with described the second instrument transformer with the second end of described the 6th electric capacity is connected, the input of the described amplifier first end secondary with described the second instrument transformer is connected, the tap of described the second instrument transformer is connected with the second end of described the 8th resistance, the second secondary end of described the second instrument transformer is connected with the second end of described the 6th resistance with the second end of described the 5th electric capacity simultaneously, the second elementary end of described the second instrument transformer is connected with the second end of described the 7th electric capacity with the second end of described the 9th resistance simultaneously, the base stage of described the second triode is connected with the first end of described the tenth resistance with the second end of described the 11 resistance simultaneously, the second end of described the tenth resistance is connected with the second end of described the 8th electric capacity, the second end of described the 9th electric capacity is connected with the second end of described the 12 resistance.
Further, described the tenth electric capacity is tunable capacitor.
Further, described the first triode and described the second triode are NPN type.
The beneficial effects of the utility model are:
The utility model utilizes superregenerative FM reception principle, and adopted high-gain micro integrated circuit, so circuit is simply novel, it is respond well that signal receives, overcome the shortcomings such as Armstrong circuit poor selectivity, noise be large simultaneously, kept again highly sensitive, little power consumption, low cost and other advantages.
Accompanying drawing explanation
Fig. 1 is the utility model circuit structure schematic diagram.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 1, the utility model comprises DC power supply E, switch S, the first capacitor C 1, the second capacitor C 2, the 3rd capacitor C 3, the 4th capacitor C 4, the 5th capacitor C 5, the 6th capacitor C 6, the 7th capacitor C 7, the 8th capacitor C 8, the 9th capacitor C 9, the first resistance R 1, the second resistance R 2, the 3rd resistance R 3, the 4th resistance R 4, the 5th resistance R 5, the 6th resistance R 6, the 7th resistance R 7, the 8th resistance R 8, the 9th resistance R 9, the tenth resistance R 10, the 11 resistance R 11, the 12 resistance R 12, socket CZ, the first instrument transformer T1, the second instrument transformer T2, the first triode VT1, the second triode VT2, inductance L and amplifier IC, the tenth capacitor C 10 is tunable capacitor, and the first triode VT1 and the second triode VT2 are NPN type, and the positive pole of DC power supply E is connected with the first end of switch S, simultaneously elementary with the first instrument transformer T1 first end of the second end of switch S, the first end of the 3rd resistance R 3, the first end of the 5th resistance R 5 is connected with the first end of the 7th resistance R 7, the negative pole while of DC power supply E and the first end of the first capacitor C 1, the first end of the second resistance R 2, the first end of the second capacitor C 2, the negative electricity source of amplifier IC, the first end of the 8th resistance R 8, the first end of the 5th capacitor C 5, the first end of the 9th resistance R 9, the first end of the 7th capacitor C 7, the first end of the 8th capacitor C 8 is connected with the first end of the 12 resistance R 12, the second end of the first capacitor C 1 is connected with the first end of the first resistance R 1, the second end while of the first resistance R 1 is connected with the collector electrode of the first triode VT1 and the first end of T1 level of the first instrument transformer, the second end of the second resistance R 2 is connected with the emitter of the first triode VT1, the base stage of the first triode VT1 is connected with the first end of the 3rd capacitor C 3 with the second end of the 3rd resistance R 3 simultaneously, the second end of the first instrument transformer T1 time level is connected with the first end of socket CZ, the second elementary end of the first instrument transformer T1 is connected with the first end of the 4th capacitor C 4 with the second end of socket CZ simultaneously, the second end while of the 3rd capacitor C 3 and the first end of the 4th resistance R 4, the output of amplifier IC, the second end of the 5th resistance R 5 is connected with the first end of the 6th resistance R 6, and the second end of the 4th resistance R 4 is connected with the second end of the second capacitor C 2, the second end while of the 7th resistance R 7 and the first end of inductance L, the first end of the tenth capacitor C 10, the first end of the 11 resistance R 11 is connected with the first end of the 9th capacitor C 9, the second end while of inductance L and the second end of the 4th capacitor C 4, the first end of the 6th capacitor C 6, the collector electrode of the second triode VT2 is connected with the second end of the tenth capacitor C 10, the emitter of the second triode VT2 simultaneously first end elementary with the second instrument transformer T2 with the second end of the 6th capacitor C 6 is connected, the input of amplifier IC is connected with the first end of T2 level of the second instrument transformer, the tap of the second instrument transformer T2 is connected with the second end of the 8th resistance R 8, the second end of the second instrument transformer T2 time level is connected with the second end of the 6th resistance R 6 with the second end of the 5th capacitor C 5 simultaneously, the second elementary end of the second instrument transformer T2 is connected with the second end of the 7th capacitor C 7 with the second end of the 9th resistance R 9 simultaneously, the base stage of the second triode VT2 is connected with the first end of the tenth resistance R 10 with the second end of the 11 resistance R 11 simultaneously, the second end of the tenth resistance R 10 is connected with the second end of the 8th capacitor C 8, the second end of the 9th capacitor C 9 is connected with the second end of the 12 resistance R 12.
The utility model is comprised of superregenerative FM reception circuit, FM-AM conversion fraction, AM Dector and low discharging circuit.The superregenrative reception of frequency-modulated wave, converts frequency-modulated wave to amplitude-modulated wave in fact exactly, amplitude-modulated wave is carried out to envelope detection to obtain low frequency signal simultaneously.Triode VT2 in Fig. 1 and peripheral cell form typical superregenerative FM reception circuit, and frequency-modulated wave signal is converted to amplitude-modulated signal and carries out envelope detection output audio signal.If the audio signal of directly taking out envelope detection from R7 end is amplified, the audio-frequency noise obtaining is larger, also makes the selectivity variation of receiving circuit.Therefore, adopt the amplitude-modulated signal sensing by the high frequency choke coil series loop from the emitter of the second triode VT2 to carry out again the method for High frequency amplification, detection output audio signal here, to overcome above-mentioned deficiency.When VT2 works, on high frequency choke coil, can form an amplitude-modulated signal.This signal is coupled to the demodulation of carrying out amplitude-modulated wave on the special-purpose miniature amplifier IC of reception of amplitude modulation by instrument transformer T2.The overall process that the utility model has comprised the input of one-level high resistant, three grades of High frequency amplifications and detection output, and gain is greater than 70dB.The audio signal of detection output is coupled to the first triode VT1 by capacitor C 3 and carries out low frequency amplification, and by earphone socket, CZ outputs to load.The effect of the first instrument transformer T1 is to prevent that high-frequency signal and DC power supply and other parts from forming loop and being attenuated, but to the without hindrance effect of signal.Capacitor C 10 is small-sized porcelain Jie trimmer, requires moving plate to connect the first end of inductance in the drawings during welding, and object is the impact of human body sensing on resonant tank while reducing frequency modulation.
Claims (3)
1. a communication receiving circuit for Frequency Adjustable, is characterized in that: comprise DC power supply, switch, the first electric capacity, the second electric capacity, the 3rd electric capacity, the 4th electric capacity, the 5th electric capacity, the 6th electric capacity, the 7th electric capacity, the 8th electric capacity, the 9th electric capacity, the first resistance, the second resistance, the 3rd resistance, the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance, socket, the first instrument transformer, the second instrument transformer, the first triode, the second triode, inductance and amplifier, the positive pole of described DC power supply is connected with the first end of described switch, simultaneously elementary with described the first instrument transformer first end of the second end of described switch, the first end of described the 3rd resistance, the first end of described the 5th resistance is connected with the first end of described the 7th resistance, the negative pole while of described DC power supply and the first end of described the first electric capacity, the first end of described the second resistance, the first end of described the second electric capacity, the negative electricity source of described amplifier, the first end of described the 8th resistance, the first end of described the 5th electric capacity, the first end of described the 9th resistance, the first end of described the 7th electric capacity, the first end of described the 8th electric capacity is connected with the first end of described the 12 resistance, the second end of described the first electric capacity is connected with the first end of described the first resistance, the second end of described the first resistance simultaneously first end secondary with described the first instrument transformer with the collector electrode of described the first triode is connected, the second end of described the second resistance is connected with the emitter of described the first triode, the base stage of described the first triode is connected with the first end of described the 3rd electric capacity with the second end of described the 3rd resistance simultaneously, the second secondary end of described the first instrument transformer is connected with the first end of described socket, the second elementary end of described the first instrument transformer is connected with the first end of described the 4th electric capacity with the second end of described socket simultaneously, the second end while of described the 3rd electric capacity and the first end of described the 4th resistance, the output of described amplifier, the second end of described the 5th resistance is connected with the first end of described the 6th resistance, and the second end of described the 4th resistance is connected with the second end of described the second electric capacity, the second end while of described the 7th resistance and the first end of described inductance, the first end of described the tenth electric capacity, the first end of described the 11 resistance is connected with the first end of described the 9th electric capacity, the second end while of described inductance and the second end of described the 4th electric capacity, the first end of described the 6th electric capacity, the collector electrode of described the second triode is connected with the second end of described the tenth electric capacity, the emitter of described the second triode simultaneously first end elementary with described the second instrument transformer with the second end of described the 6th electric capacity is connected, the input of the described amplifier first end secondary with described the second instrument transformer is connected, the tap of described the second instrument transformer is connected with the second end of described the 8th resistance, the second secondary end of described the second instrument transformer is connected with the second end of described the 6th resistance with the second end of described the 5th electric capacity simultaneously, the second elementary end of described the second instrument transformer is connected with the second end of described the 7th electric capacity with the second end of described the 9th resistance simultaneously, the base stage of described the second triode is connected with the first end of described the tenth resistance with the second end of described the 11 resistance simultaneously, the second end of described the tenth resistance is connected with the second end of described the 8th electric capacity, the second end of described the 9th electric capacity is connected with the second end of described the 12 resistance.
2. the communication receiving circuit of Frequency Adjustable according to claim 1, is characterized in that: described the tenth electric capacity is tunable capacitor.
3. the communication receiving circuit of Frequency Adjustable according to claim 1, is characterized in that: described the first triode and described the second triode are NPN type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320670673.9U CN203522720U (en) | 2013-10-29 | 2013-10-29 | Communication receiving circuit capable of frequency modulation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320670673.9U CN203522720U (en) | 2013-10-29 | 2013-10-29 | Communication receiving circuit capable of frequency modulation |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203522720U true CN203522720U (en) | 2014-04-02 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320670673.9U Expired - Fee Related CN203522720U (en) | 2013-10-29 | 2013-10-29 | Communication receiving circuit capable of frequency modulation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203522720U (en) |
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2013
- 2013-10-29 CN CN201320670673.9U patent/CN203522720U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: XI'AN DIHE ELECTRONIC TECHNOLOGY CO., LTD. Free format text: FORMER OWNER: CHENGDU KEHONG ELECTRONIC CO., LTD. Effective date: 20140828 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 610000 CHENGDU, SICHUAN PROVINCE TO: 710000 XI'AN, SHAANXI PROVINCE |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140828 Address after: 10806, room 3, building 69, Residence Du Commerce, 710000 Jin Road, Gaoxin District, Shaanxi, Xi'an Patentee after: Xi'an emperor and Electronic Technology Co., Ltd. Address before: West high tech Zone Fucheng Road in Chengdu city of Sichuan province 610000 No. 399 No. 1 No. 602 Patentee before: CHENGDU KEHONG ELECTRONIC CO., LTD. |
|
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140402 Termination date: 20151029 |
|
| EXPY | Termination of patent right or utility model |