CN203491924U - Low-loss three-level photovoltaic inverter - Google Patents
Low-loss three-level photovoltaic inverter Download PDFInfo
- Publication number
- CN203491924U CN203491924U CN201320651779.4U CN201320651779U CN203491924U CN 203491924 U CN203491924 U CN 203491924U CN 201320651779 U CN201320651779 U CN 201320651779U CN 203491924 U CN203491924 U CN 203491924U
- Authority
- CN
- China
- Prior art keywords
- mosfet pipe
- diode
- triode
- capacitor
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/56—Power conversion systems, e.g. maximum power point trackers
Abstract
The utility model discloses a low-loss three-level photovoltaic inverter. The inverter comprises an input voltage, a capacitor C1, a capacitor C2, a first Mosfet tube, a second Mosfet tube, a third Mosfet tube, a fourth Mosfet tube, a first triode and a second triode. The first Mosfet tube, the second Mosfet tube, the third Mosfet tube, the fourth Mosfet tube, the first triode and the second triode are respectively connected with a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode. The inverter can output Vdc/2 and Vdc/2, and only a power device is in electric conduction. When a zero level is output, a parallel connection channel formed by four CoolMosfet parts is used for reducing conduction loss. Two CoolMosfet parts in each parallel connection channel are in series-opposing connection, so that a conduction voltage drop of the zero level is reduced.
Description
Technical field
The utility model relates to inverter, relates in particular to low-loss formula three level photovoltaic inverters.
Background technology
Tradition tri-level circuit, it can export three level, compares and has lower loss with two level circuits, can reduce the harmonic wave of output current simultaneously, reduce output filter size, as shown in Figure 1, still when circuit output Vdc/2,0, during-Vdc/2, tube current is not positive and negative, and electric current all needs, through two power devices, to have higher conduction loss.
Utility model content
The technical problems to be solved in the utility model is traditional positive and negative all needs through two power devices of tri-level circuit electric current, and conduction loss is higher, and a kind of lossy three level photovoltaic inverters are provided for this reason.
The technical solution of the utility model is: low-loss formula three level photovoltaic inverters, it comprises input voltage, capacitor C 1 and capacitor C 2, it also comprises a Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe, the source electrode of a described Mosfet pipe is connected with the source electrode of the 2nd Mosfet pipe, the drain electrode of described the 3rd Mosfet pipe is connected with the drain electrode of the 4th Mosfet pipe, the drain electrode of the source electrode of a described Mosfet pipe and the 3rd Mosfet pipe is connected in parallel between capacitor C 1 and capacitor C 2, the drain electrode of described the 2nd Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the source electrode of described the 4th Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the collector electrode of described the first triode is connected with the positive pole of input voltage, the emitter of described the second triode is connected with the negative pole of input voltage, the collector electrode of the emitter of described the first triode and the second triode is connected with capacitor C 3 by inductance L, a described Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe, the 4th Mosfet pipe, on the first triode and the second triode, be parallel with respectively the first diode, the second diode, the 3rd diode, the 4th diode, the 5th diode and the 6th diode, the anodic bonding of described the first diode is between capacitor C 1 and capacitor C 2 and ground connection, its negative electrode is connected with the negative electrode of the second diode, the negative electrode of the anode of the second diode and the 4th diode be connected configuration node and this node respectively with the first triode, the second triode is connected with inductance L, the anode of described the 3rd diode is connected with the anode of the 4th diode.
A Mosfet pipe described in such scheme, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe are N channel-types.
A Mosfet pipe described in such scheme, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe are CoolMosfet pipes.
The beneficial effects of the utility model are that it is exporting Vdc/2, and-Vdc/2, only has a power device On current.The more important thing is, when output zero level, by the parallel port being formed by four CoolMosfet, reduce conduction loss.Meanwhile, two CoolMosfet in each parallel port are differential concatenation, have avoided using the body diode of CoolMosfet, thereby have greatly reduced the conduction voltage drop of zero level.
Accompanying drawing explanation
Fig. 1 is traditional three level topological diagrams;
Fig. 2 is the utility model topological diagram.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described further.
As shown in Figure 2, the utility model comprises input voltage, capacitor C 1 and capacitor C 2, it also comprises a Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe, the source electrode of a described Mosfet pipe is connected with the source electrode of the 2nd Mosfet pipe, the drain electrode of described the 3rd Mosfet pipe is connected with the drain electrode of the 4th Mosfet pipe, the drain electrode of the source electrode of a described Mosfet pipe and the 3rd Mosfet pipe is connected in parallel between capacitor C 1 and capacitor C 2, the drain electrode of described the 2nd Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the source electrode of described the 4th Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the collector electrode of described the first triode is connected with the positive pole of input voltage, the emitter of described the second triode is connected with the negative pole of input voltage, the collector electrode of the emitter of described the first triode and the second triode is connected with capacitor C 3 by inductance L, a described Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe, the 4th Mosfet pipe, on the first triode and the second triode, be parallel with respectively the first diode, the second diode, the 3rd diode, the 4th diode, the 5th diode and the 6th diode, the anodic bonding of described the first diode is between capacitor C 1 and capacitor C 2 and ground connection, its negative electrode is connected with the negative electrode of the second diode, the negative electrode of the anode of the second diode and the 4th diode be connected configuration node and this node respectively with the first triode, the second triode is connected with inductance L, the anode of described the 3rd diode is connected with the anode of the 4th diode.
The utility model operation principle is as follows: suppose that power factor is 1, when positive half cycle, circuit can export 0 and Vdc/2, four Mosfet pipes in the middle of opening, and while closing other switch, circuit output 0.Now, electric current process S1c-1 ,-2, S2c-1 ,-2 flow to load.Wherein, S1c-1 ,-2 is reverse-conduction current, and S2c-1 ,-2 is forward conduction electric current.When closing S2c-1 ,-2 two switches, maintain S1c-1, and-2 two switches are open-minded, and while opening S1, the positive pole that electric current is input voltage through S1 from positive bus-bar flows to load simultaneously, and load is in parallel with capacitor C 3.
Four Mosfet pipes in the utility model can be N channel-type field effect transistor, are preferably CoolMosfet pipe, the area of wafer, thickness is all little than common process, and conducting resistance only has 1/10 of traditional handicraft, and RDS is less, switching speed is faster, and distributed constant is less, and VTH is little.
By reference to the accompanying drawings the utility model is exemplarily described above; obviously the utility model specific implementation is not subject to the restrictions described above; as long as adopted the improvement of the various unsubstantialities that method of the present utility model design and technical scheme carry out; or without improving, design of the present utility model and technical scheme are directly applied to other occasion, all within protection range of the present utility model.
Claims (3)
1. low-loss formula three level photovoltaic inverters, it comprises input voltage, capacitor C 1 and capacitor C 2, it is characterized in that it also comprises a Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe, the source electrode of a described Mosfet pipe is connected with the source electrode of the 2nd Mosfet pipe, the drain electrode of described the 3rd Mosfet pipe is connected with the drain electrode of the 4th Mosfet pipe, the drain electrode of the source electrode of a described Mosfet pipe and the 3rd Mosfet pipe is connected in parallel between capacitor C 1 and capacitor C 2, the drain electrode of described the 2nd Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the source electrode of described the 4th Mosfet pipe is connected with the collector electrode of the second triode with the emitter of the first triode respectively, the collector electrode of described the first triode is connected with the positive pole of input voltage, the emitter of described the second triode is connected with the negative pole of input voltage, the collector electrode of the emitter of described the first triode and the second triode is connected with capacitor C 3 by inductance L, a described Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe, the 4th Mosfet pipe, on the first triode and the second triode, be parallel with respectively the first diode, the second diode, the 3rd diode, the 4th diode, the 5th diode and the 6th diode, the anodic bonding of described the first diode is between capacitor C 1 and capacitor C 2 and ground connection, its negative electrode is connected with the negative electrode of the second diode, the negative electrode of the anode of the second diode and the 4th diode be connected configuration node and this node respectively with the first triode, the second triode is connected with inductance L, the anode of described the 3rd diode is connected with the anode of the 4th diode.
2. low-loss formula three level photovoltaic inverters as claimed in claim 1, is characterized in that a described Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe are N channel-types.
3. low-loss formula three level photovoltaic inverters as claimed in claim 1 or 2, is characterized in that a described Mosfet pipe, the 2nd Mosfet pipe, the 3rd Mosfet pipe and the 4th Mosfet pipe are CoolMosfet pipes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320651779.4U CN203491924U (en) | 2013-10-22 | 2013-10-22 | Low-loss three-level photovoltaic inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320651779.4U CN203491924U (en) | 2013-10-22 | 2013-10-22 | Low-loss three-level photovoltaic inverter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203491924U true CN203491924U (en) | 2014-03-19 |
Family
ID=50262724
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320651779.4U Expired - Fee Related CN203491924U (en) | 2013-10-22 | 2013-10-22 | Low-loss three-level photovoltaic inverter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203491924U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490657A (en) * | 2013-10-22 | 2014-01-01 | 安徽金峰新能源股份有限公司 | Low-loss-type tri-electrical-level photovoltaic inverter |
-
2013
- 2013-10-22 CN CN201320651779.4U patent/CN203491924U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103490657A (en) * | 2013-10-22 | 2014-01-01 | 安徽金峰新能源股份有限公司 | Low-loss-type tri-electrical-level photovoltaic inverter |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102255538B (en) | T-shaped three-level inverter circuit | |
| CN103051233B (en) | Non-isolated single-phase photovoltaic grid-connected inverter and on-off control timing sequence thereof | |
| CN103219907B (en) | Five-level inverter | |
| CN102694479B (en) | Power electronic circuit | |
| CN103701356A (en) | Double-auxiliary resonance pole type three-phase soft switching inverter | |
| CN104038090A (en) | T-shaped multi-level inverter circuit based on reverse blocking IGBT antiparallel connection | |
| CN103236796B (en) | A kind of method of inverter and control inverter | |
| CN103929076A (en) | Novel topology for photovoltaic inverter | |
| CN207910685U (en) | Tri-level half-bridge Sofe Switch convertor circuit, welding machine, electrolysis water power supply and charger | |
| CN203590033U (en) | High gain DC/DC converter applied in photovoltaic inverter MPPT link | |
| CN203491924U (en) | Low-loss three-level photovoltaic inverter | |
| CN102843054B (en) | Single-phase five-level inverter | |
| CN103490657A (en) | Low-loss-type tri-electrical-level photovoltaic inverter | |
| CN106911261A (en) | The Z source networks level photovoltaic grid-connected inversion system of active neutral-point-clamped five | |
| CN103701346A (en) | Nine-level inverter | |
| CN203301393U (en) | Non transformer single-phase grid connected inverter | |
| CN205355946U (en) | Uninterrupted power supply | |
| CN105186904A (en) | CoolMosfet neutral point-clamped I-type tri-level topology circuit and inverter | |
| CN104467435A (en) | Balance modulation type multiplex output stabilized voltage supply based on logic protection amplifying circuit | |
| CN106026727A (en) | Single-phase photovoltaic power generation converter topology | |
| CN104917380B (en) | A kind of control method for realizing low-voltage switches stress | |
| CN204615658U (en) | Full-bridge recommends variable inverter | |
| CN103684030A (en) | Novel high-performance grid-connected photovoltaic inverter | |
| CN103618448A (en) | Coupling inductance double tube direct current converter with charge pump | |
| CN203708131U (en) | Five-level inverter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140319 Termination date: 20141022 |
|
| EXPY | Termination of patent right or utility model |