CN203491914U - Isolated switch converter - Google Patents
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- CN203491914U CN203491914U CN201320625188.XU CN201320625188U CN203491914U CN 203491914 U CN203491914 U CN 203491914U CN 201320625188 U CN201320625188 U CN 201320625188U CN 203491914 U CN203491914 U CN 203491914U
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- 238000004804 winding Methods 0.000 claims abstract description 42
- 238000005070 sampling Methods 0.000 claims description 27
- 239000003990 capacitor Substances 0.000 claims description 16
- 238000001514 detection method Methods 0.000 claims description 12
- 238000012423 maintenance Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 16
- 230000003247 decreasing effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 101100282455 Arabidopsis thaliana AMP1 gene Proteins 0.000 description 3
- 101100285389 Arabidopsis thaliana HLS1 gene Proteins 0.000 description 3
- 102000015347 COP1 Human genes 0.000 description 3
- 108060001826 COP1 Proteins 0.000 description 3
- 101150030345 COP3 gene Proteins 0.000 description 3
- 101100348617 Candida albicans (strain SC5314 / ATCC MYA-2876) NIK1 gene Proteins 0.000 description 3
- 101100275320 Coprinopsis cinerea (strain Okayama-7 / 130 / ATCC MYA-4618 / FGSC 9003) COP4 gene Proteins 0.000 description 3
- 101100234408 Danio rerio kif7 gene Proteins 0.000 description 3
- 101100221620 Drosophila melanogaster cos gene Proteins 0.000 description 3
- 101100218464 Haloarcula sp. (strain arg-2 / Andes heights) cop2 gene Proteins 0.000 description 3
- 101100007329 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) COS1 gene Proteins 0.000 description 3
- 101100007330 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) COS2 gene Proteins 0.000 description 3
- 101100007331 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) COS3 gene Proteins 0.000 description 3
- 101100007332 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) COS4 gene Proteins 0.000 description 3
- 101100398237 Xenopus tropicalis kif11 gene Proteins 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000001052 transient effect Effects 0.000 description 2
- YPJMOVVQKBFRNH-UHFFFAOYSA-N 1-(9-ethylcarbazol-3-yl)-n-(pyridin-2-ylmethyl)methanamine Chemical compound C=1C=C2N(CC)C3=CC=CC=C3C2=CC=1CNCC1=CC=CC=N1 YPJMOVVQKBFRNH-UHFFFAOYSA-N 0.000 description 1
- 101100464782 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CMP2 gene Proteins 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000011217 control strategy Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000007634 remodeling Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Abstract
The utility model discloses an isolated switch converter. Under the normal working state, the primary controller controls the primary switch tube based on the feedback signal, the secondary controller switches on the secondary switch tube after the primary switch tube is switched off, and the secondary switch tube is switched off before the primary switch tube is switched on. Under the light load state, the secondary controller controls the secondary switch tube based on the output voltage, the secondary switch tube is conducted after the primary switch tube is switched off, and the secondary current flowing through the secondary winding is reversed to be negative. The secondary controller turns off the secondary switch tube when the negative secondary current reaches a secondary current threshold value, so that the negative secondary current couples a negative primary current at the primary winding. The primary controller turns on the primary switch tube based on the negative primary current and turns off the primary switch tube when the primary current is larger than a primary current threshold value.
Description
Technical field
The utility model relates to electronic circuit, relates in particular to isolated switch converters.
Background technology
Isolated switch converters is widely used in various off-line power supplies and the occasion higher to security requirement.The control strategy that precisely, efficiently, electromagnetic interference is low, cost is low becomes the necessary of application.And the fine adjustment of energy is provided in order to reach subtend load, must adopt FEEDBACK CONTROL.
Fig. 1 shows the isolated switch converters 100 that the auxiliary winding of conventional employing is realized feedback.When rectifying tube D1 conducting, the voltage on the auxiliary winding of transformer T1 and the output voltage V out of switch converters are proportional.Therefore, can obtain feedback information by the voltage detecting on auxiliary winding.As shown in Figure 1, the voltage on auxiliary winding is detected to obtain feedback signal FB, and controller is based on feedback signal FB and represent that the current sampling signal CS of primary current Ipri produces control signal DRV1, to control main switch M1.
Feedback system shown in Fig. 1 is simple, yet this feedback system also exists some problems.First, feedback signal FB can reflect output voltage V out when rectifying tube D1 conducting.Therefore, even under Light Condition (output current Iout is about 0), main switch M1 still needs to be switched on, thereby by secondary commutation pipe D1 conducting, so that feedback information can be provided to controller.This has limited the no-load efficiency of switch converters 100 undoubtedly.
Secondly, under light condition (output current Iout is less than predetermined threshold value), switch converters 100 works in discontinuous current pattern conventionally, and the operating frequency of switch converters is very low.Fig. 2 is the working waveform figure of isolated switch converters 100 shown in Fig. 1 under light condition.As shown in Figure 2, the energy storing in transformer T1 is all sent to load, and after secondary current Isec is decreased to zero, feedback signal FB continues to equal 0 and cannot reflected load state information.For example, if now load increases suddenly (at the t1 shown in Fig. 2 constantly), switch converters cannot respond in time, thereby cause occurring undershoot on output voltage V out.
Utility model content
For problems of the prior art, the purpose of this utility model is to improve the no-load efficiency of isolated switch converters, and improves the transient response of isolated switch converters under light condition.
A kind of isolated switch converters according to the utility model embodiment, comprising: transformer, there is armature winding, secondary winding and auxiliary winding, and wherein armature winding couples to receive input voltage, and secondary winding couples to provide output voltage to load, primary switch pipe, is coupled to the armature winding of transformer, secondary switch pipe, is coupled to the secondary winding of transformer, feedback circuit, is coupled to the auxiliary winding of transformer, produces the feedback signal of indicator cock converter output voltage, primary control device, produces primary control signal to control primary switch pipe, comprising: elementary mode selection circuit, produces elementary mode select signal, the first primary control circuit, there is first input end, the second input and output, wherein first input end is coupled to elementary mode selection circuit to receive elementary mode select signal, the second input is coupled to feedback circuit with receiving feedback signals, the first primary control circuit, based on elementary mode select signal and feedback signal, produces the first primary control signal at output, the second primary control circuit, there is first input end, the second input and output, wherein first input end receives elementary mode select signal, the second input receives the primary current sampled signal that represents primary current, the second primary control circuit, based on elementary mode select signal and primary current sampled signal, produces the second primary control signal at output, and first level logic circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the first primary control circuit is to receive the first primary control signal, the second input is coupled to the output of the second primary control circuit to receive the second primary control signal, just level logic circuit, based on the first primary control signal and the second primary control signal, produces primary control signal at output, secondary controller, produces secondary control signal to control secondary switch pipe, comprising: secondary modes is selected circuit, produces secondary modes and selects signal, the first secondary control circuit, there is first input end, the second input and output, wherein first input end is coupled to secondary modes selection circuit and selects signal to receive secondary modes, the second input receives the terminal voltage of secondary switch pipe, the first secondary control circuit is selected the terminal voltage of signal and secondary switch pipe based on secondary modes, at output, produce first level control signal, second subprime control circuit, there is first input end, the second input, the 3rd input, four-input terminal and output, wherein first input end is coupled to secondary modes selection circuit and selects signal to receive secondary modes, the second input receives the terminal voltage of secondary switch pipe, the 3rd input receives the secondary current sampled signal that represents negative secondary current, four-input terminal receives the output voltage sampled signal of representation switch converter output voltage, second subprime control circuit is selected signal based on secondary modes, the terminal voltage of secondary switch pipe, secondary current sampled signal and output voltage sampled signal, at output, produce second subprime control signal, and inferior level logic circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the first secondary control circuit is to receive level control signal first time, the second input is coupled to the output of second subprime control circuit to receive second subprime control signal, inferior level logic circuit, based on first level control signal and second subprime control signal, produces secondary control signal at output.
In one embodiment, one or several in the parameters such as the switching frequency of elementary mode selection circuit based on switch converters, primary current sampled signal, feedback signal detect load condition, to produce elementary mode select signal, elementary mode selection circuit is passed to secondary modes by elementary mode select signal and selects circuit, and secondary modes is selected circuit to produce secondary modes according to the elementary mode select signal receiving and selected signal.
In one embodiment, secondary modes selects one or several in the parameters such as the switching frequency of circuit based on switch converters, secondary current sampled signal, output voltage sampled signal to detect load condition, to produce secondary modes, select signal, secondary modes selects circuit to select signal to be passed to elementary mode selection circuit secondary modes, and elementary mode selection circuit selects signal to produce elementary mode select signal according to the secondary modes receiving.
In one embodiment, in normal operation, whether one or several in the parameters such as the switching frequency of elementary mode selection circuit based on switch converters, primary current sampled signal, feedback signal come sense switch converter in light condition, to produce elementary mode select signal, and elementary mode select signal is passed to secondary modes selection circuit, secondary modes is selected circuit to produce secondary modes according to the elementary mode select signal receiving and is selected signal; Under light condition, whether secondary modes selects one or several in the parameters such as the switching frequency of circuit based on switch converters, secondary current sampled signal, output voltage sampled signal to come sense switch converter in normal operating conditions, to produce secondary modes, select signal, and select signal to be passed to elementary mode selection circuit secondary modes, elementary mode selection circuit selects signal to produce elementary mode select signal according to the secondary modes receiving.
In one embodiment, the second primary control circuit comprises: the first elementary comparator, there is first input end, the second input and output, wherein first input end receives primary current sampled signal, the second input receives the first elementary threshold value, the first elementary comparator compares primary current sampled signal and the first elementary threshold value, at output, produces the first elementary comparison signal; The second elementary comparator, there is first input end, the second input and output, wherein first input end receives the second elementary threshold value, the second input receives the drain-source voltage of primary switch pipe, the second elementary comparator compares the drain-source voltage of primary switch pipe and the second elementary threshold value, at output, produces the second elementary comparison signal; And the first elementary trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to the first elementary comparator is to receive the first elementary comparison signal, the second input is coupled to the output of the second elementary comparator to receive the second elementary comparison signal, the first elementary trigger, based on the first elementary comparison signal and the second elementary comparison signal, produces the second primary control signal at output.
In one embodiment, the first primary control circuit comprises: the 3rd elementary comparator, there is first input end, the second input and output, wherein first input end receives primary current sampled signal, the second input receives the 3rd elementary threshold value, the 3rd elementary comparator compares primary current sampled signal and the 3rd elementary threshold value, at output, produces the 3rd elementary comparison signal; Sampling hold circuit, there is first input end, the second input and output, wherein first input end is coupled to feedback circuit with receiving feedback signals, the second input receives the first primary control signal, sampling hold circuit to the feedback signal maintenance of sampling, produces sampling inhibit signal at output based on the first primary control signal; Error amplifier, there is first input end, the second input and output, the output that wherein first input end is coupled to sampling hold circuit is to receive sampling inhibit signal, the second input receives reference signal, error amplifier, based on sampling inhibit signal and reference signal, produces compensating signal at output; The 4th elementary comparator, there is first input end, the second input and output, wherein first input end receives the 4th elementary threshold value, the second input is coupled to feedback circuit with receiving feedback signals, the 4th elementary comparator compares feedback signal and the 4th elementary threshold value, at output, produces the 4th elementary comparison signal; Secondary conduction detection circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the 4th elementary comparator is to receive the 4th elementary comparison signal, the second input receives the first primary control signal, secondary conduction detection circuit, based on the 4th elementary comparison signal and the first primary control signal, produces secondary Continuity signal at output; Logic gates, there is first input end, the second input and output, the output that wherein first input end is coupled to secondary conduction detection circuit is to receive secondary Continuity signal, the second input receives the first primary control signal, logic gates, based on secondary Continuity signal and the first primary control signal, produces logic output signal at output; Current source, has input and output, and wherein input is coupled to supply power voltage; Capacitor, has first end and the second end, and wherein first end is coupled to the output of current source, the second end ground connection; Discharge switch pipe, has first end, the second end and control end, and wherein first end is coupled to the first end of capacitor, the second end ground connection, and control end is coupled to the output of logic gates with receive logic output signal; The 5th elementary comparator, there is first input end, the second input and output, wherein first input end is coupled to the first end of capacitor, the second input is coupled to the output of error amplifier to receive compensating signal, the 5th elementary comparator compares the voltage at capacitor two ends and compensating signal, at output, produces the 5th elementary comparison signal; And the second elementary trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to the 3rd elementary comparator is to receive the 3rd elementary comparison signal, the second input is coupled to the output of the 5th elementary comparator to receive the 5th elementary comparison signal, the second elementary trigger, based on the 3rd elementary comparison signal and the 5th elementary comparison signal, produces the first primary control signal at output.
In one embodiment, second subprime control circuit comprises: threshold value produces circuit, has input and output, and wherein input receives output voltage sampled signal, and threshold value produces circuit based on output voltage sampled signal, at output, produces first level threshold value; First level comparator, there is first input end, the second input and output, first input end secondary current sampled signal wherein, the second input is coupled to the output of threshold value generation circuit to receive level threshold value first time, first time level comparator compares secondary current sampled signal and first level threshold value, at output, produces first level comparison signal; Second subprime comparator, there is first input end, the second input and output, wherein first input end receives second subprime threshold value, the second input receives the terminal voltage of secondary switch pipe, second subprime comparator compares the terminal voltage of secondary switch pipe and second subprime threshold value, at output, produces second subprime comparison signal; And first level trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to first level comparator is to receive level comparison signal first time, the second input is coupled to the output of second subprime comparator to receive second subprime comparison signal, first level trigger, based on first level comparison signal and second subprime comparison signal, produces second subprime control signal at output.
In one embodiment, the first secondary control circuit comprises: for the third time level comparator, there is first input end, the second input and output, wherein first input end receives the terminal voltage of secondary switch pipe, the second input receives level threshold value for the third time, level comparator compares the terminal voltage of secondary switch pipe and a level threshold value for the third time for the third time, at output, produces level comparison signal for the third time; The 4th level comparator, there is first input end, the second input and output, wherein first input end receives the 4th level threshold value, the second input receives the terminal voltage of secondary switch pipe, the 4th time level comparator compares the terminal voltage of secondary switch pipe and the 4th level threshold value, at output, produces the 4th level comparison signal; And second subprime trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to for the third time level comparator is to receive level comparison signal for the third time, the second input is coupled to the output of the 4th level comparator to receive level comparison signal the 4th time, second subprime trigger, based on level comparison signal and the 4th level comparison signal for the third time, produces first level control signal at output.
According to embodiment of the present utility model, under light condition, isolated switch converters is used as secondary controller from controller by primary control device as master controller, thereby provides feedback information without feedback signal.Therefore, primary switch pipe can be turn-offed completely under Light Condition, and the no-load efficiency of isolated switch converters is compared with prior art largely increased.In addition,, because secondary controller directly carries out FEEDBACK CONTROL according to output voltage under light condition, isolated switch converters can provide response timely when load changing.Undershoot in prior art on output voltage is eliminated, and the transient response of isolated switch converters improves.
Accompanying drawing explanation
Fig. 1 shows the isolated switch converters 100 that the auxiliary winding of conventional employing is realized feedback;
Fig. 2 is the working waveform figure of isolated switch converters 100 shown in Fig. 1 under light condition;
Fig. 3 is according to the block diagram of the isolated switch converters 300 of the utility model one embodiment;
Fig. 4 is according to the block diagram of the primary control device 401 of the utility model one embodiment;
Fig. 5 is according to the block diagram of the secondary controller 502 of the utility model one embodiment;
Fig. 6 A～6C is the principle schematic diagram according to the load condition of the utility model embodiment detects and load status signal transmits;
Fig. 7 is according to the circuit theory diagrams of the second primary control circuit 713 of the utility model one embodiment;
Fig. 8 is according to the circuit theory diagrams of the first primary control circuit 812 of the utility model one embodiment;
Fig. 9 is according to the circuit theory diagrams of the second subprime control circuit 923 of the utility model one embodiment;
Figure 10 is according to the circuit theory diagrams of the first secondary control circuit 1022 of the utility model one embodiment.
Embodiment
To describe specific embodiment of the utility model in detail below, it should be noted that the embodiments described herein, only for illustrating, is not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it will be obvious to those skilled in the art that and needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised at least one embodiment of the utility model.Therefore phrase " in one embodiment ", " in an embodiment ", " example " or " example ", occurring in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and/or sub-portfolio by specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that the accompanying drawing providing at this is all for illustrative purposes, and accompanying drawing is not necessarily drawn in proportion.Should be appreciated that it can be directly connected or coupled to another element or can have intermediary element when claiming " element " " to be connected to " or " coupling " arrives another element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.Identical Reference numeral is indicated identical element.Term "and/or" used herein comprises any and all combinations of one or more relevant projects of listing.
The utility model can be applied to appointing watches isolated switch converters.In ensuing detailed description, for simplicity, the anti exciting converter (flyback converter) of only take is explained specific works principle of the present utility model as example.
Fig. 3 is according to the block diagram of the isolated switch converters 300 of the utility model one embodiment.This switch converters 300 comprises transformer T1, primary switch pipe MP, secondary switch pipe MS, primary control device 301, secondary controller 302 and feedback circuit 303.Transformer T1 has armature winding, secondary winding and auxiliary winding, and wherein armature winding couples to receive input voltage vin, and secondary winding couples to provide output voltage V out to load.Primary switch pipe MP is coupled to the armature winding of transformer T1, and secondary switch pipe MS is coupled to the secondary winding of transformer T1.Feedback circuit 303 is coupled to the auxiliary winding of transformer T1, produces the feedback signal FB of indication output voltage V out.In the embodiment shown in fig. 3, feedback circuit 303 comprises resitstance voltage divider.Primary control device 301 produces primary control signal DRVP to control primary switch pipe MP, and secondary controller 302 produces secondary control signal DRVS to control secondary switch pipe MS.
In normal operation, primary control device 301 is used as master controller (mastercontroller), produces primary control signal DRVP, to control primary switch pipe MP based on feedback signal FB.Secondary controller 302 is used as from controller (slave controller), at primary switch pipe MP, closes and has no progeny secondary switch pipe MS conducting, before primary switch pipe MP conducting, secondary switch pipe MS is turn-offed.The state of the electrical parameters detection primary switch pipe MP such as the drain-source voltage that secondary controller 302 can be based on secondary switch pipe MS, the voltage at secondary winding two ends or secondary current Isec, thereby correspondingly conducting or turn-off secondary switch pipe MS.
Under light condition, secondary controller 302 is used as master controller, based on output voltage V out, controls secondary switch pipe MS.Secondary controller 302 closes and has no progeny secondary switch pipe MS conducting at primary switch pipe MP, and makes the secondary current Isec commutation of flowing through secondary winding for negative.Secondary controller 302 turn-offs secondary switch pipe MS when negative secondary current reaches secondary current threshold value, makes this negative secondary current be coupled out negative primary current at armature winding.Primary control device 301 is used as from controller, based on this negative primary current, by primary switch pipe MP conducting, and when primary current Ipri reaches primary current threshold value, primary switch pipe MP is turn-offed.
Compare with the existing switch converters 100 shown in Fig. 1, switch converters 300 is used as secondary controller 302 from controller by primary control device 301 as master controller under light condition, thereby provides the load state information under light condition without feedback signal FB.Therefore, primary switch pipe M1 can be turn-offed completely under Light Condition, and the no-load efficiency of switch converters 300 is compared and is largely increased with switch converters 100.In addition, because secondary controller 302 directly carries out FEEDBACK CONTROL according to output voltage V out, switch converters 300 can provide response timely when load changing, and the undershoot in switch converters 100 on output voltage V out is eliminated.
In the embodiment shown in fig. 3, primary switch pipe M P and secondary switch pipe MS are N-shaped MOSFET.Yet those skilled in the art are known, in other embodiments, primary switch pipe MP and secondary switch pipe MS can be also p-type MOSFET or any other suitable controllable semiconductor device.In the embodiment shown in fig. 3, secondary switch pipe MS is coupled between the upper end (different name end) and load of transformer T1 secondary winding.In other embodiments, secondary switch pipe MS also can be coupled between the lower end (Same Name of Ends) and load of secondary winding.
Fig. 4 is according to the block diagram of the primary control device 401 of the utility model one embodiment.This primary control device 401 comprises elementary mode selection circuit 411, the first primary control circuit 412, the second primary control circuit 413 and first level logic circuit 414.Elementary mode selection circuit 411 produces elementary mode select signal MODEP.Elementary mode selection circuit 411 can be based on switch converters the parameter such as switching frequency Fs, primary current Ipri, feedback signal FB in one or several detect load condition, to produce elementary mode select signal MODEP.Elementary mode selection circuit 411 also can receive load state information from secondary controller, and produces accordingly elementary mode select signal MODEP.
The first primary control circuit 412 has first input end, the second input and output, wherein first input end is coupled to elementary mode selection circuit 411 to receive elementary mode select signal MODEP, and the second input is coupled to feedback circuit with receiving feedback signals FB.The first primary control circuit 412, based on elementary mode select signal MODEP and feedback signal FB, produces the first primary control signal DRVP1 at output.
The second primary control circuit 413 has first input end, the second input and output, wherein first input end is coupled to elementary mode selection circuit 411 to receive elementary mode select signal MODEP, and the second input receives the primary current sampled signal CSP that represents primary current Ipri.The second primary control circuit 413, based on elementary mode select signal MODEP and primary current sampled signal CSP, produces the second primary control signal DRVP2 at output.
Just level logic circuit 414 has first input end, the second input and output, the output that wherein first input end is coupled to the first primary control circuit 412 is to receive the first primary control signal DRVP1, and the second input is coupled to the output of the second primary control circuit 413 to receive the second primary control signal DRVP2.Just level logic circuit 414, based on the first primary control signal DRVP1 and the second primary control signal DRVP2, produces primary control signal DRVP at output.
In one embodiment, elementary mode select signal MODEP is used as the enable signal of the first primary control circuit 412 and the second primary control circuit 413, and first level logic circuit 414 comprises or door OR1.In normal operation, the first primary control circuit 412 is enabled (enabled), the second primary control circuit 413 conductively-closeds (disabled), and primary control signal DRVP equals the first primary control signal DRVP1.Under light condition, the first primary control circuit 412 conductively-closeds, the second primary control circuit 413 is enabled, and primary control signal DRVP equals the second primary control signal DRVP2.
Fig. 5 is according to the block diagram of the secondary controller 502 of the utility model one embodiment.This secondary controller 502 comprises secondary modes selection circuit 521, the first secondary control circuit 522, second subprime control circuit 523 and inferior level logic circuit 524.Secondary modes is selected circuit 521 to produce secondary modes and is selected signal MODES.Secondary modes selects circuit 521 to detect load condition based on one or several in the parameters such as switching frequency Fs, secondary current Isec, output voltage V out, to produce secondary modes, selects signal MODES.Secondary modes selects circuit 521 also can receive load state information from primary control device, and produces accordingly elementary mode select signal MODES.
The first secondary control circuit 522 has first input end, the second input and output, wherein first input end is coupled to secondary modes selection circuit 521 and selects signal MODES to receive secondary modes, and the second input receives the terminal voltage (for example drain-source voltage VDSS or source voltage VSS) of secondary switch pipe.The first secondary control circuit 522 is selected the terminal voltage of signal MODES and secondary switch pipe based on secondary modes, at output, produce first level control signal DRVS1.
Second subprime control circuit 523 has first input end, the second input, the 3rd input, four-input terminal and output, wherein first input end is coupled to secondary modes selection circuit 521 and selects signal MODES to receive secondary modes, the second input receives the terminal voltage of secondary switch pipe, the 3rd input receives the secondary current sampled signal CSS that represents negative secondary current, and four-input terminal receives the output voltage sampled signal VSENSE that represents output voltage V out.Second subprime control circuit 523 is selected terminal voltage, secondary current sampled signal CSS and the output voltage sampled signal VSENSE of signal MODES, secondary switch pipe based on secondary modes, at output, produce second subprime control signal DRVS.
Inferior level logic circuit 524 has first input end, the second input and output, the output that wherein first input end is coupled to the first secondary control circuit 522 is to receive level control signal DRVS1 first time, and the second input is coupled to the output of second subprime control circuit 523 to receive second subprime control signal DRVS2.Inferior level logic circuit 524, based on first level control signal DRVS1 and second subprime control signal DRVS2, produces secondary control signal DRVS at output.
In one embodiment, secondary modes selects signal MODES to be used as the enable signal of the first secondary control circuit 522 and second subprime control circuit 523, and inferior level logic circuit 524 comprises or door OR2.In normal operation, the first secondary control circuit 522 is enabled, 523 conductively-closeds of second subprime control circuit, and secondary control signal DRVS equals level control signal DRVS1 first time.Under light condition, the first secondary control circuit 522 conductively-closeds, second subprime control circuit 523 is enabled, and secondary control signal DRVS equals second subprime control signal DRVS2.
Primary control device and secondary controller can be detected load condition or be transmitted load state information by switching frequency Fs, primary current Ipri, secondary current Isec, feedback signal FB or output voltage V out.Fig. 6 A～6C is the principle schematic diagram according to the load condition of the utility model embodiment detects and load status signal transmits.
In the embodiment shown in Fig. 6 A, the switching frequency Fs of elementary mode selection circuit 611A based on switch converters, one or several in the parameter such as primary current sampled signal CSP, feedback signal FB detect load condition, to produce elementary mode select signal MODEP.Elementary mode selection circuit 611A provides to the first primary control circuit and the second primary control circuit elementary mode select signal MODEP to regulate primary control signal DRVP.Simultaneously, elementary mode selection circuit 611A is also passed to elementary mode select signal MODEP secondary modes and selects circuit 621A, and the signals such as voltage that these can be by modulation switch frequency Fs, primary current Ipri, armature winding two ends are so that it carries elementary mode select signal MODEP realizes.Secondary modes selects circuit 621A by the signals such as voltage at switching frequency Fs, secondary current Isec, secondary winding two ends being carried out to demodulation to receive elementary mode select signal MODEP, and produces secondary modes selection signal MODES according to the elementary mode select signal MODEP receiving.In certain embodiments, elementary mode selection circuit 611A and secondary modes are selected also can adopt other conventional signal transmission forms between circuit 621A.
In the embodiment shown in Fig. 6 B, secondary modes selects circuit 621B to detect load condition based on one or several in the parameters such as switching frequency Fs, secondary current sampled signal CSS, output voltage sampled signal VSENSE, to produce secondary modes, selects signal MODES.Secondary modes selects circuit 621B to select signal MODES to provide to the first secondary control circuit and second subprime control circuit to regulate secondary control signal DRVS secondary modes.Simultaneously, secondary modes selects circuit 621B also secondary modes to be selected signal MODES to be passed to elementary mode selection circuit 611B, and this can select signal MODES to realize so that it carries secondary modes by the signals such as voltage at modulation switch frequency Fs, secondary current Isec, secondary winding two ends.Elementary mode selection circuit 611B selects signal MODES by the signals such as voltage at switching frequency Fs, primary current Ipri, armature winding two ends being carried out to demodulation to receive secondary modes, and selects signal MODES to produce elementary mode select signal MODEP according to the secondary modes receiving.In certain embodiments, elementary mode selection circuit 611B and secondary modes are selected also can adopt other conventional signal transmission forms between circuit 621B.
In the embodiment shown in Fig. 6 C, in normal operation, whether elementary mode selection circuit 611C comes sense switch converter in light condition based on one or several in the parameters such as switching frequency Fs, primary current sampled signal CSP, feedback signal FB, to produce elementary mode select signal MODEP, and be passed to secondary modes selection circuit 621C.Secondary modes is selected circuit 621C to produce secondary modes according to the elementary mode select signal MODEP receiving and is selected signal MODES.
Under light condition, whether secondary modes selects circuit 621C to come sense switch converter in normal operating conditions based on one or several in the parameters such as switching frequency Fs, secondary current sampled signal CSS, output voltage sampled signal VSENSE, to produce secondary modes, select signal MODES, and be passed to elementary mode selection circuit 611C.Elementary mode selection circuit 611C selects signal MODES to produce elementary mode select signal MODEP according to the secondary modes receiving.
Elementary mode selection circuit 611C and secondary modes select the communication between circuit 621C to realize by the modulatedemodulate of the signals such as switching frequency Fs, primary current Ipri, secondary current Isec is transferred, and also can adopt other conventional signal transmission forms.
In one embodiment, when switching frequency Fs drops to while being less than first frequency threshold value, elementary mode selection circuit 611C judgement switch converters is in light condition.Primary control device is become from controller from master controller, the first primary control circuit conductively-closed, and the second primary control circuit is enabled.When secondary modes, select circuit 621C output voltage sampled signal VSENSE to be detected and drop to predetermined threshold value, or the continuous not conducting of a plurality of cycles of primary switch pipe detected, be considered as receiving the elementary mode select signal MODEP that elementary mode selection circuit 611C transmits.Secondary controller is from becoming master controller from controller, the first secondary control circuit conductively-closed, and second subprime control circuit is enabled.
When switching frequency Fs increases to while being greater than second frequency threshold value, secondary modes selects circuit 621C judgement switch converters in normal operating conditions, and wherein second frequency threshold value is greater than first frequency threshold value.Secondary controller is become from controller from master controller, the conductively-closed of second subprime control circuit, and the first secondary control circuit is enabled.When elementary mode selection circuit 611C detects the continuous not conducting of a plurality of cycles of secondary switch pipe, be considered as receiving secondary modes and select the secondary modes that circuit 621C transmits to select signal MODES.Primary control device is from becoming master controller from controller, the second primary control circuit conductively-closed, and the first primary control circuit is enabled.
Fig. 7 is according to the circuit theory diagrams of the second primary control circuit 713 of the utility model one embodiment.The second primary control circuit 713 is enabled or conductively-closed under the effect of elementary mode select signal MODEP.The second primary control circuit 713 comprises comparator C MP1, CMP2 and trigger FFP1.Comparator C MP1 has in-phase input end, inverting input and output, and wherein in-phase input end receives primary current sampled signal CSP, inverting input receive threshold VTHP1.Comparator C MP1 compares primary current sampled signal CSP and threshold value VTHP1, at output, produces comparison signal COP1.Comparator C MP2 has in-phase input end, inverting input and output, in-phase input end receive threshold VTHP2 wherein, and inverting input receives the drain-source voltage VDSP of primary switch pipe.Comparator C MP2 compares the drain-source voltage VDSP of primary switch pipe and threshold value VTHP2, at output, produces comparison signal COP2.Trigger FFP1 has reset terminal, set end and output, and the output that wherein reset terminal is coupled to comparator C MP1 is to receive comparison signal COP1, and set end is coupled to the output of comparator C MP2 to receive comparison signal COP2.Trigger FFP1 is signal COP1 and COP2 based on the comparison, at output, produces the second primary control signal DRVP2.
Under light condition, the second primary control circuit 713 is enabled, and primary control signal DRVP equals the second primary control signal DRVP2.Under light condition, secondary switch pipe MS is switched on to produce negative secondary current.At secondary switch pipe MS, close and have no progeny, this negative secondary current is coupled out negative primary current on armature winding, make buffer condenser (not shown in Fig. 3) electric discharge between the drain electrode of primary switch pipe and source electrode, the drain-source voltage VDSP of primary switch pipe reduces gradually.For example, when the drain-source voltage VDSP of primary switch pipe is decreased to threshold value VTHP2 (0V), trigger FFP1 is set, and primary switch pipe MP is switched on.After primary switch pipe MP conducting, primary current Ipri and primary current sampled signal CSP increase gradually.When elementary current sampling signal CSP increases to threshold value VTHP1, trigger FFP1 is reset, and primary switch pipe MP is turned off.In embodiment of the present utility model, threshold value VTHP1 can be steady state value, can be also the variable value changing with the peak change of bearing primary current.
The second primary control circuit 713 shown in Fig. 7 is realized the no-voltage conducting of primary switch pipe MP by the drain-source voltage VDSP of primary switch pipe being detected.Yet, it will be understood by those skilled in the art that in other embodiments, the second primary control circuit also can be based on primary current sampled signal CSP, when negative primary current being detected directly by primary switch pipe MP conducting.
Fig. 8 is according to the circuit theory diagrams of the first primary control circuit 812 of the utility model one embodiment.The first primary control circuit 812 is enabled or conductively-closed under the effect of elementary mode select signal MODEP.The first primary control circuit 812 comprises comparator C MP3, CMP4, CMP5, sampling hold circuit 8121, secondary conduction detection circuit 8122, error amplifier EA, logic gates 8123, current source IS, capacitor C1, discharge switch pipe S1 and trigger FFP2.Comparator C MP3 has in-phase input end, inverting input and output, and wherein in-phase input end receives primary current sampled signal CSP, inverting input receive threshold VTHP3.Comparator C MP3 compares primary current sampled signal CSP and threshold value VTHP3, at output, produces comparison signal COP3.Sampling hold circuit 8121 has first input end, the second input and output, and wherein first input end is coupled to feedback circuit with receiving feedback signals FB, and the second input receives the first primary control signal DRVP1.Sampling hold circuit 8121 to the feedback signal FB maintenance of sampling, produces sampling inhibit signal SH at output based on the first primary control signal DRVP1.In one embodiment, sampling hold circuit 8121 is based on the first primary control signal DRVP1, for example turn-offs, after a period of time (3.5uS), to the feedback signal FB maintenance of sampling at primary switch pipe MP.Error amplifier EA has in-phase input end, inverting input and output, and the output that wherein in-phase input end is coupled to sampling hold circuit 8121 is to receive sampling inhibit signal SH, and inverting input receives reference signal VREF.Error amplifier EA, based on sampling inhibit signal SH and reference signal VREF, produces compensating signal COMP at output.
Comparator C MP4 has in-phase input end, inverting input and output, in-phase input end receive threshold VTHP4 (for example 0.1V) wherein, and inverting input is coupled to feedback circuit with receiving feedback signals FB.Comparator C MP4 compares feedback signal FB and threshold value VTHP4, at output, produces comparison signal COP4.Secondary conduction detection circuit 8122 has first input end, the second input and output, and the output that wherein first input end is coupled to comparator C MP4 is to receive comparison signal COP4, and the second input receives the first primary control signal DRVP1.Secondary conduction detection circuit 8122 is signal COP4 and the first primary control signal DRVP1 based on the comparison, at output, produces secondary Continuity signal TONS.Logic gates 8123 has first input end, the second input and output, and the output that wherein first input end is coupled to secondary conduction detection circuit 8122 is to receive secondary Continuity signal TONS, and the second input receives the first primary control signal DRVP1.Logic gates 8123, based on secondary Continuity signal TONS and the first primary control signal DRVP1, produces logic output signal LGO at output.In one embodiment, logic gates 8123 comprises or door OR3.
Current source IS has input and output, and wherein input is coupled to supply power voltage.Capacitor C1 has first end and the second end, and wherein first end is coupled to the output of current source IS, the second end ground connection.Discharge switch pipe S1 has first end, the second end and control end, and wherein first end is coupled to the first end of capacitor C1, the second end ground connection, and control end is coupled to the output of logic gates 8123 with receive logic output signal LGO.Comparator C MP5 has in-phase input end, inverting input and output, and wherein in-phase input end is coupled to the first end of capacitor C1, and inverting input is coupled to the output of error amplifier EA to receive compensating signal COMP.Comparator C MP5 compares the voltage at capacitor C1 two ends and compensating signal COMOP, at output, produces comparison signal COP5.Trigger FFP2 has reset terminal, set end and output, and the output that wherein reset terminal is coupled to comparator C MP3 is to receive comparison signal COP3, and the second input is coupled to the output of comparator C MP5 to receive comparison signal COP5.Trigger FFP2 is signal COP3 and COP5 based on the comparison, at output, produces the first primary control signal DRVP1.
In normal operation, the first primary control circuit 812 is enabled, and primary control signal DRVP equals the first primary control signal DRVP1.When primary switch pipe MP conducting, transformer T1 stored energy, primary current Ipri and primary current sampled signal CSP increase gradually.When elementary current sampling signal CSP increases to threshold value VTHP3, trigger FFP2 is reset, and primary switch pipe MP is turned off, and the energy of storing in transformer T1 is passed to load.The energy of storing in transformer T1 is all passed to after load, and current source IS charges to capacitor C1, and the voltage at capacitor C1 two ends increases gradually.When the voltage at capacitor C1 two ends increases to compensating signal COMP, trigger FFP2 is set, and primary switch pipe MP is switched on.
The first primary control circuit 812 shown in Fig. 8 adopts the turn-off time to control.Yet, it will be understood by those skilled in the art that in other embodiments, the first primary control circuit also can adopt any other suitable control mode, such as determining the control of frequency peak current, quasi-resonance control etc.
Fig. 9 is according to the circuit theory diagrams of the second subprime control circuit 923 of the utility model one embodiment.Second subprime control circuit 923 is enabled or conductively-closed under the effect of secondary modes selection signal MODES.Second subprime control circuit comprises that threshold value produces circuit 9231, comparator C MS1, CMS2 and trigger FFS1.Threshold value produces circuit 9231 and has input and output, and wherein input receives output voltage sampled signal VSENSE.Threshold value produces circuit 9231 based on output voltage sampled signal VSENSE, at output, produces threshold value VTHS1.Comparator C MS1 has in-phase input end, inverting input and output, and wherein in-phase input end receives secondary current sampled signal CSS, and inverting input is coupled to the output of threshold value generation circuit 9231 with receive threshold VTHS1.Comparator C MS1 compares secondary current sampled signal CSS and threshold value VTHS1, at output, produces comparison signal COS1.Comparator C MS2 has in-phase input end, inverting input and output, in-phase input end receive threshold VTHS2 wherein, and inverting input receives the drain-source voltage VDSS of secondary switch pipe.Comparator C MS2 compares the drain-source voltage VDSS of secondary switch pipe and threshold value VTHS2, at output, produces comparison signal COS2.Trigger FFS1 has reset terminal, set end and output, and the output that wherein reset terminal is coupled to comparator C MS1 is to receive comparison signal COS1, and set end is coupled to the output of comparator C MS2 to receive comparison signal COS2.Trigger FFS1 is signal COS1 and COS2 based on the comparison, at output, produces second subprime control signal DRVS2.
Under light condition, second subprime control circuit 923 is enabled, and secondary control signal DRVS equals second subprime control signal DRVS2.When elementary switching tube MP closes, have no progeny, the body diode of secondary switch pipe MS is switched on.The drain-source voltage VDSS of secondary switch pipe is for example decreased to, below threshold value VTHS2 (-500mV), and trigger FFS1 is set, and secondary switch pipe MS is switched on, and secondary current Isec reduces gradually and commutates as negative.When the secondary current sampled signal CSS of the negative secondary current of representative increases to threshold value VTHS1, trigger FFS1 is reset, and secondary switch pipe MS is turned off.
Second subprime control circuit 923 shown in Fig. 9 changes threshold value VTHS1 according to output voltage sampled signal VSENSE, thereby has changed the peak value of secondary current threshold value and negative primary current.Primary control device can make primary current threshold value change with the peak change of negative primary current, to realize the adjusting to output voltage V out.Those skilled in the art are known, and in other embodiments, second subprime control circuit also can adopt other suitable control modes, such as stagnant ring control, turn-off time control etc.
Figure 10 is according to the circuit theory diagrams of the first secondary control circuit 1022 of the utility model one embodiment.The first secondary control circuit 1022 is enabled or conductively-closed under the effect of secondary modes selection signal MODES.The first secondary control circuit 1022 comprises comparator C MS3, CMS4 and trigger FFS2.Comparator C MS3 has in-phase input end, inverting input and output, and wherein in-phase input end receives the drain-source voltage VDSS of secondary switch pipe, inverting input receive threshold VTHS3.Comparator C MS3 compares the drain-source voltage VDSS of secondary switch pipe and threshold value VTHS3, at output, produces comparison signal COS3.Comparator C MS4 has in-phase input end, inverting input and output, in-phase input end receive threshold VTHS4 wherein, and inverting input receives the drain-source voltage VDSS of secondary switch pipe.Comparator C MS4 compares the drain-source voltage VDSS of secondary switch pipe and threshold value VTHS4, at output, produces comparison signal COS4.Trigger FFS2 has reset terminal, set end and output, and the output that wherein reset terminal is coupled to comparator C MS3 is to receive comparison signal COS3, and set end is coupled to the output of comparator C MS4 to receive comparison signal COS4.Trigger FFS2 is signal COS3 and COS4 based on the comparison, at output, produces first level control signal DRVSl.
In normal operation, the first secondary control circuit 1022 is enabled, and secondary control signal DRVS equals level control signal DRVSl first time.When elementary switching tube MP closes, have no progeny, the body diode of secondary switch pipe MS is switched on.The drain-source voltage VDSS of secondary switch pipe is for example decreased to, below threshold value VTHS4 (-500mV), and trigger FFS2 is set, and secondary switch pipe MS is switched on.When elementary switching tube MP prepares conducting, the drain-source voltage VDSS of secondary switch pipe increases gradually.For example, when the drain-source voltage VDSS of secondary switch pipe increases to threshold value VTHS3 (-70mV), trigger FFS2 is reset, and secondary switch pipe MS is turned off.
The drain-source voltage VDSS of the first secondary control circuit 1022 shown in Figure 10 based on secondary switch pipe controls secondary switch pipe MS.Yet, it will be understood by those skilled in the art that the state of the electrical parameters detection primary switch pipe MP such as voltage that the first secondary control circuit also can be based on secondary winding two ends or secondary current Isec, thus correspondingly conducting or turn-off secondary switch pipe MS.
Although described the utility model with reference to several exemplary embodiments, should be appreciated that term used is explanation and exemplary and nonrestrictive term.Because the utility model can specifically be implemented in a variety of forms and not depart from spirit or the essence of utility model, so be to be understood that, above-described embodiment is not limited to any aforesaid details, and explain widely in the spirit and scope that should limit in the claim of enclosing, therefore fall into whole variations in claim or its equivalent scope and remodeling and all should be the claim of enclosing and contain.
Claims (8)
1. an isolated switch converters, is characterized in that, comprising:
Transformer, has armature winding, secondary winding and auxiliary winding, and wherein armature winding couples to receive input voltage, and secondary winding couples to provide output voltage to load;
Primary switch pipe, is coupled to the armature winding of transformer;
Secondary switch pipe, is coupled to the secondary winding of transformer;
Feedback circuit, is coupled to the auxiliary winding of transformer, produces the feedback signal of indicator cock converter output voltage;
Primary control device, produces primary control signal to control primary switch pipe, comprising:
Elementary mode selection circuit, produces elementary mode select signal;
The first primary control circuit, there is first input end, the second input and output, wherein first input end is coupled to elementary mode selection circuit to receive elementary mode select signal, the second input is coupled to feedback circuit with receiving feedback signals, the first primary control circuit, based on elementary mode select signal and feedback signal, produces the first primary control signal at output;
The second primary control circuit, there is first input end, the second input and output, wherein first input end receives elementary mode select signal, the second input receives the primary current sampled signal that represents primary current, the second primary control circuit, based on elementary mode select signal and primary current sampled signal, produces the second primary control signal at output; And
First level logic circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the first primary control circuit is to receive the first primary control signal, the second input is coupled to the output of the second primary control circuit to receive the second primary control signal, just level logic circuit, based on the first primary control signal and the second primary control signal, produces primary control signal at output;
Secondary controller, produces secondary control signal to control secondary switch pipe, comprising:
Secondary modes is selected circuit, produces secondary modes and selects signal;
The first secondary control circuit, there is first input end, the second input and output, wherein first input end is coupled to secondary modes selection circuit and selects signal to receive secondary modes, the second input receives the terminal voltage of secondary switch pipe, the first secondary control circuit is selected the terminal voltage of signal and secondary switch pipe based on secondary modes, at output, produce first level control signal;
Second subprime control circuit, there is first input end, the second input, the 3rd input, four-input terminal and output, wherein first input end is coupled to secondary modes selection circuit and selects signal to receive secondary modes, the second input receives the terminal voltage of secondary switch pipe, the 3rd input receives the secondary current sampled signal that represents negative secondary current, four-input terminal receives the output voltage sampled signal of representation switch converter output voltage, second subprime control circuit is selected signal based on secondary modes, the terminal voltage of secondary switch pipe, secondary current sampled signal and output voltage sampled signal, at output, produce second subprime control signal, and
Inferior level logic circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the first secondary control circuit is to receive level control signal first time, the second input is coupled to the output of second subprime control circuit to receive second subprime control signal, inferior level logic circuit, based on first level control signal and second subprime control signal, produces secondary control signal at output.
2. switch converters as claimed in claim 1, it is characterized in that, one or several in the parameters such as the switching frequency of elementary mode selection circuit based on switch converters, primary current sampled signal, feedback signal detect load condition, to produce elementary mode select signal, elementary mode selection circuit is passed to secondary modes by elementary mode select signal and selects circuit, and secondary modes is selected circuit to produce secondary modes according to the elementary mode select signal receiving and selected signal.
3. switch converters as claimed in claim 1, it is characterized in that, secondary modes selects one or several in the parameters such as the switching frequency of circuit based on switch converters, secondary current sampled signal, output voltage sampled signal to detect load condition, to produce secondary modes, select signal, secondary modes selects circuit to select signal to be passed to elementary mode selection circuit secondary modes, and elementary mode selection circuit selects signal to produce elementary mode select signal according to the secondary modes receiving.
4. switch converters as claimed in claim 1, is characterized in that:
In normal operation, whether one or several in the parameters such as the switching frequency of elementary mode selection circuit based on switch converters, primary current sampled signal, feedback signal come sense switch converter in light condition, to produce elementary mode select signal, and elementary mode select signal is passed to secondary modes selection circuit, secondary modes is selected circuit to produce secondary modes according to the elementary mode select signal receiving and is selected signal;
Under light condition, whether secondary modes selects one or several in the parameters such as the switching frequency of circuit based on switch converters, secondary current sampled signal, output voltage sampled signal to come sense switch converter in normal operating conditions, to produce secondary modes, select signal, and select signal to be passed to elementary mode selection circuit secondary modes, elementary mode selection circuit selects signal to produce elementary mode select signal according to the secondary modes receiving.
5. switch converters as claimed in claim 1, is characterized in that, the second primary control circuit comprises:
The first elementary comparator, there is first input end, the second input and output, wherein first input end receives primary current sampled signal, the second input receives the first elementary threshold value, the first elementary comparator compares primary current sampled signal and the first elementary threshold value, at output, produces the first elementary comparison signal;
The second elementary comparator, there is first input end, the second input and output, wherein first input end receives the second elementary threshold value, the second input receives the drain-source voltage of primary switch pipe, the second elementary comparator compares the drain-source voltage of primary switch pipe and the second elementary threshold value, at output, produces the second elementary comparison signal; And
The first elementary trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to the first elementary comparator is to receive the first elementary comparison signal, the second input is coupled to the output of the second elementary comparator to receive the second elementary comparison signal, the first elementary trigger, based on the first elementary comparison signal and the second elementary comparison signal, produces the second primary control signal at output.
6. switch converters as claimed in claim 1, is characterized in that, the first primary control circuit comprises:
The 3rd elementary comparator, there is first input end, the second input and output, wherein first input end receives primary current sampled signal, the second input receives the 3rd elementary threshold value, the 3rd elementary comparator compares primary current sampled signal and the 3rd elementary threshold value, at output, produces the 3rd elementary comparison signal;
Sampling hold circuit, there is first input end, the second input and output, wherein first input end is coupled to feedback circuit with receiving feedback signals, the second input receives the first primary control signal, sampling hold circuit to the feedback signal maintenance of sampling, produces sampling inhibit signal at output based on the first primary control signal;
Error amplifier, there is first input end, the second input and output, the output that wherein first input end is coupled to sampling hold circuit is to receive sampling inhibit signal, the second input receives reference signal, error amplifier, based on sampling inhibit signal and reference signal, produces compensating signal at output;
The 4th elementary comparator, there is first input end, the second input and output, wherein first input end receives the 4th elementary threshold value, the second input is coupled to feedback circuit with receiving feedback signals, the 4th elementary comparator compares feedback signal and the 4th elementary threshold value, at output, produces the 4th elementary comparison signal;
Secondary conduction detection circuit, there is first input end, the second input and output, the output that wherein first input end is coupled to the 4th elementary comparator is to receive the 4th elementary comparison signal, the second input receives the first primary control signal, secondary conduction detection circuit, based on the 4th elementary comparison signal and the first primary control signal, produces secondary Continuity signal at output;
Logic gates, there is first input end, the second input and output, the output that wherein first input end is coupled to secondary conduction detection circuit is to receive secondary Continuity signal, the second input receives the first primary control signal, logic gates, based on secondary Continuity signal and the first primary control signal, produces logic output signal at output;
Current source, has input and output, and wherein input is coupled to supply power voltage;
Capacitor, has first end and the second end, and wherein first end is coupled to the output of current source, the second end ground connection;
Discharge switch pipe, has first end, the second end and control end, and wherein first end is coupled to the first end of capacitor, the second end ground connection, and control end is coupled to the output of logic gates with receive logic output signal;
The 5th elementary comparator, there is first input end, the second input and output, wherein first input end is coupled to the first end of capacitor, the second input is coupled to the output of error amplifier to receive compensating signal, the 5th elementary comparator compares the voltage at capacitor two ends and compensating signal, at output, produces the 5th elementary comparison signal; And
The second elementary trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to the 3rd elementary comparator is to receive the 3rd elementary comparison signal, the second input is coupled to the output of the 5th elementary comparator to receive the 5th elementary comparison signal, the second elementary trigger, based on the 3rd elementary comparison signal and the 5th elementary comparison signal, produces the first primary control signal at output.
7. switch converters as claimed in claim 1, is characterized in that, second subprime control circuit comprises:
Threshold value produces circuit, has input and output, and wherein input receives output voltage sampled signal, and threshold value produces circuit based on output voltage sampled signal, at output, produces first level threshold value;
First level comparator, there is first input end, the second input and output, first input end secondary current sampled signal wherein, the second input is coupled to the output of threshold value generation circuit to receive level threshold value first time, first time level comparator compares secondary current sampled signal and first level threshold value, at output, produces first level comparison signal;
Second subprime comparator, there is first input end, the second input and output, wherein first input end receives second subprime threshold value, the second input receives the terminal voltage of secondary switch pipe, second subprime comparator compares the terminal voltage of secondary switch pipe and second subprime threshold value, at output, produces second subprime comparison signal; And
First level trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to first level comparator is to receive level comparison signal first time, the second input is coupled to the output of second subprime comparator to receive second subprime comparison signal, first level trigger, based on first level comparison signal and second subprime comparison signal, produces second subprime control signal at output.
8. switch converters as claimed in claim 1, is characterized in that, the first secondary control circuit comprises:
For the third time level comparator, there is first input end, the second input and output, wherein first input end receives the terminal voltage of secondary switch pipe, the second input receives level threshold value for the third time, level comparator compares the terminal voltage of secondary switch pipe and a level threshold value for the third time for the third time, at output, produces level comparison signal for the third time;
The 4th level comparator, there is first input end, the second input and output, wherein first input end receives the 4th level threshold value, the second input receives the terminal voltage of secondary switch pipe, the 4th time level comparator compares the terminal voltage of secondary switch pipe and the 4th level threshold value, at output, produces the 4th level comparison signal; And
Second subprime trigger, there is first input end, the second input and output, the output that wherein first input end is coupled to for the third time level comparator is to receive level comparison signal for the third time, the second input is coupled to the output of the 4th level comparator to receive level comparison signal the 4th time, second subprime trigger, based on level comparison signal and the 4th level comparison signal for the third time, produces first level control signal at output.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107834840A (en) * | 2017-11-06 | 2018-03-23 | 上海斐讯数据通信技术有限公司 | Feedback regulation switching frequency solves circuit structure and its method that inductance is uttered long and high-pitched sounds |
| CN109163605A (en) * | 2018-08-02 | 2019-01-08 | 广州民航职业技术学院 | A kind of electric shock type arrests gloves and its control method |
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2013
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107834840A (en) * | 2017-11-06 | 2018-03-23 | 上海斐讯数据通信技术有限公司 | Feedback regulation switching frequency solves circuit structure and its method that inductance is uttered long and high-pitched sounds |
| CN109163605A (en) * | 2018-08-02 | 2019-01-08 | 广州民航职业技术学院 | A kind of electric shock type arrests gloves and its control method |
| CN109163605B (en) * | 2018-08-02 | 2020-06-16 | 广州民航职业技术学院 | Electric shock type catching glove and control method thereof |
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