CN203456493U - LED wafer structure - Google Patents
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- CN203456493U CN203456493U CN201320513335.4U CN201320513335U CN203456493U CN 203456493 U CN203456493 U CN 203456493U CN 201320513335 U CN201320513335 U CN 201320513335U CN 203456493 U CN203456493 U CN 203456493U
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Abstract
The utility model discloses an LED wafer structure. The LED wafer structure includes a substrate, an LED semiconductor layer, a transparent conducting layer, a first transparent insulative layer, a positive electrode and a negative electrode, wherein the LED semiconductor layer comprises an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer which are arranged in sequence; the positive electrode is disposed at one side of the substrate and the LED semiconductor layer in a stretching manner, and the positive electrode is directly contacted and connected with the end part of the p-type semiconductor layer and the end part of the transparent conducting layer, or only directly contacted and connected with the end part of the transparent conducting layer, or only directly contacted and connected with the end part of the p-type semiconductor layer instead of the end part of the transparent conducting layer; and the negative electrode is disposed at the other side of the substrate and the LED semiconductor layer, and the negative electrode is directly contacted and connected with an end part of the n-type semiconductor layer. In the LED wafer structure, the positive electrode and the negative electrode are arranged at two sides in a stretching manner, so that good heat radiation performance and good conductivity performance of the LED wafer structure are achieved; and no wire bonding is needed in packaging, so that low packaging cost and simple packaging process are achieved.
Description
[technical field]
The utility model relates to LED chip architecture.
[background technology]
Existing LED chip architecture, its structural representation conventionally as shown in Figure 1, comprises the substrate 1, LED semiconductor layer (comprising N-shaped semiconductor layer 2, luminescent layer 11 and p-type semiconductor layer 3), the transparency conducting layer 8 that set gradually.Positive electrode 12 be arranged on transparency conducting layer 8 above, LED semiconductor layer is step-like, negative electrode 13 is arranged on the table top of step.Positive electrode 12 is formed and is electrically connected to p-type semiconductor layer 3 by transparency conducting layer 8, and negative electrode 13 forms and is electrically connected to N-shaped semiconductor layer 2.
This kind of LED chip architecture has the following disadvantages: when 1, LED chip architecture is worked, heat radiation aspect is mainly substrate 1 heat radiation by bottom, and heat dispersion is not very good.Conduction aspect, is to connect respectively gold thread by positive electrode, negative electrode, and gold thread is the line layer on connecting PCB board again.And owing to being exiting surface on transparency conducting layer 8, therefore must the area that be arranged on the positive electrode 12 of exiting surface be arranged littlely, in order to avoid affect light extraction efficiency.Like this, the less electrode of area is by elongated gold thread conduction, makes the electric conductivity of LED wafer of this kind of structure bad.2, LED chip architecture is when follow-up encapsulation, must pass through wire (for example gold thread, silver-colored line, copper cash, alloy wire) is connected with the line layer on pcb board, this just relates on the positive electrode of LED wafer, negative electrode and beats gold thread, on the one hand, beating gold thread conventionally need to use nation and determine machine, and nation determines machine expensive (in three, 400,000 left and right), also there is consumables cost in the wires such as gold thread, and while making LED wafer package, cost is higher; On the other hand, nation determines machine while beating gold thread, and the parameter of each side need to be set, and arranges badly will cause operation failure, complex procedures while making LED wafer package.
[utility model content]
Technical problem to be solved in the utility model is: make up above-mentioned the deficiencies in the prior art, propose a kind of LED chip architecture, heat radiation and electric conductivity are better, and are convenient to follow-up encapsulation, and while making follow-up encapsulation, cost is lower, and operation is easy.
Technical problem of the present utility model is solved by following technical scheme:
A LED chip architecture, comprises substrate, LED semiconductor layer, transparency conducting layer, the first transparent insulating layer, positive electrode and negative electrode; Described LED semiconductor layer comprises N-shaped semiconductor layer, luminescent layer, the p-type semiconductor layer setting gradually; On described substrate, be disposed with described LED semiconductor layer and transparency conducting layer; Described positive electrode extends a side that is arranged on described substrate and described LED semiconductor layer; Described positive electrode directly contacts and is connected with the end of p type semiconductor layer in described LED semiconductor layer, the end of described transparency conducting layer, and described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer of described positive electrode and described LED semiconductor layer; Or described positive electrode directly contacts and is connected with the end of described transparency conducting layer, described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer, p-type semiconductor layer of described positive electrode and described LED semiconductor layer; Described negative electrode extends the opposite side that is arranged on described substrate and described LED semiconductor layer, and described negative electrode directly contacts and is connected with the end of N-shaped semiconductor layer in described LED semiconductor layer.
A LED chip architecture, comprises substrate, LED semiconductor layer, the first transparent insulating layer, positive electrode and negative electrode; Described LED semiconductor layer comprises N-shaped semiconductor layer, luminescent layer, the p-type semiconductor layer setting gradually; On described substrate, be provided with described LED semiconductor layer; Described positive electrode extends a side that is arranged on described substrate and described LED semiconductor layer, described positive electrode directly contacts and is connected with the end of described p-type semiconductor layer, and described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer of described positive electrode and described LED semiconductor layer; Described negative electrode extends the opposite side that is arranged on described substrate and described LED semiconductor layer, and described negative electrode directly contacts and is connected with the end of N-shaped semiconductor layer in described LED semiconductor layer.
The beneficial effect that the utility model is compared with the prior art is:
LED chip architecture of the present utility model, positive electrode and negative electrode extend respectively the both sides that are arranged on substrate and LED semiconductor layer, make isolated the opening of insulation of corresponding electrode and semiconductor layer, luminescent layer by transparent insulating layer, avoid short circuit.Because positive electrode, negative electrode extend, be arranged on both sides, therefore do not worry that electrode affects the problem of light extraction efficiency, the area of positive electrode, negative electrode can arrange greatlyr.During work, except the substrate heat radiation by bottom, the positive and negative electrode of both sides also can auxiliary heat dissipation, thereby improves the heat dispersion of LED chip architecture, makes the good heat dispersion performance of LED chip architecture.Conduction aspect, the positive and negative electrode of LED chip architecture can directly be welded to connect by the line layer on tin cream and pcb board, no longer need to connect by elongated gold thread, and conductive area is larger, thus the electric conductivity of LED chip architecture is also better.And be arranged on both sides because positive electrode, negative electrode extend, and during follow-up encapsulation, directly by tin cream, be welded on the line layer of pcb board, during encapsulation, no longer need dozen gold thread, packaging cost is lower, and packaging process is easy.
[accompanying drawing explanation]
Fig. 1 is the structural representation of LED chip architecture in prior art;
Fig. 2 is the structural representation of the LED chip architecture of the utility model embodiment one;
Fig. 3 is the first distressed structure schematic diagram of the LED chip architecture of the utility model embodiment one;
Fig. 4 is the second distressed structure schematic diagram of the LED chip architecture of the utility model embodiment one;
Fig. 5 is the third distressed structure schematic diagram of the LED chip architecture of the utility model embodiment one;
Fig. 6 is the structural representation of the LED chip architecture of the utility model embodiment two;
Fig. 7 is a kind of distressed structure schematic diagram of the LED chip architecture of the utility model embodiment two;
Fig. 8 is the structural representation of the LED chip architecture of the utility model embodiment three;
Fig. 9 is the structural representation of the LED chip architecture of the utility model embodiment four;
Figure 10 is the structural representation of the LED chip architecture of the utility model embodiment five;
Figure 11 is the structural representation of the LED chip architecture of the utility model embodiment six.
[embodiment]
Below in conjunction with embodiment and contrast accompanying drawing the utility model is described in further details.
Embodiment one
As shown in Figure 2, be the structural representation of LED chip architecture in this embodiment.LED chip architecture comprises substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.
Wherein, on substrate 1, be disposed with described LED semiconductor layer and transparency conducting layer 8.Substrate 1 can be Sapphire Substrate.LED semiconductor layer can be gallium nitride semiconductor layers.Preferably, substrate 1 can be patterned sapphire substrate (Patterned Sapphire Substrate is called for short PSS), when being PSS substrate, can improve the light extraction efficiency of LED chip architecture.
By above-mentioned setting, be that in the LED chip architecture in this embodiment, positive electrode, negative electrode extend respectively the both sides that are arranged on substrate and LED semiconductor layer, like this, positive electrode, negative electrode be not all on transparency conducting layer 8, do not worry the too large problem that affects light extraction efficiency of area setting, positive electrode, negative electrode extend at sidepiece, can accomplish that area is larger.During work, except the substrate heat radiation by bottom, the positive and negative electrode of both sides also can auxiliary heat dissipation, thereby improves the heat dispersion of LED chip architecture, makes the good heat dispersion performance of LED chip architecture.Conduction aspect, the positive and negative electrode of LED chip architecture can directly be welded to connect by the line layer on tin cream and pcb board, no longer need to connect by elongated gold thread, and conductive area is larger, thus the heat conductivility of LED chip architecture is also better.On the other hand, positive electrode, negative electrode extend at sidepiece, no longer need to beat gold thread during follow-up encapsulation, directly by tin cream, are welded on the line layer of pcb board, thereby reduce packaging cost, simplify packaging process.
As shown in Figure 3, be the first distressed structure of LED chip architecture in this embodiment.The assembly of LED chip architecture, position relationship between each modular construction is all identical with the LED chip architecture shown in Fig. 2, difference is only that p-type semiconductor layer 3 and transparency conducting layer 8 are all slightly longer, with respect to N-shaped semiconductor layer 2 and luminescent layer 11, stretch, now, excessively the same with Fig. 2, positive electrode 4 is also directly to contact connection by p type semiconductor layer 3,8 liang of aspects of transparency conducting layer, realizes the electrical connection between positive electrode 4 and p-type semiconductor layer 3.
As shown in Figure 4, be the second distressed structure of LED chip architecture in this embodiment.Now, in LED chip architecture, only transparency conducting layer 8 is slightly longer, with respect to N-shaped semiconductor layer 2, luminescent layer 11 and p-type semiconductor layer 3, stretch, now positive electrode extends to the height at transparency conducting layer 8 places, and now the height of the first insulating barrier 6 is identical with the height of the first insulating barrier 6 in Fig. 2, do not keep off between positive electrode 4 and p-type semiconductor layer 3.Now, positive electrode 4 directly contacts with the end of transparency conducting layer 8, also extends into one end of p-type semiconductor layer 3 simultaneously, directly contacts and is connected, thereby realize the electrical connection between positive electrode 4 and p-type semiconductor layer 3 with the end of p-type semiconductor layer 3.In Fig. 4, with the same in Fig. 2 and Fig. 3, positive electrode 4 is also by direct contact of 3 liang of aspects of transparency conducting layer 8 and p-type semiconductor layer, realizes the electrical connection between positive electrode 4 and p-type semiconductor layer 3.
As shown in Figure 5, be the third distressed structure of LED chip architecture in this embodiment.Now, in LED chip architecture, only transparency conducting layer 8 is slightly longer, with respect to N-shaped semiconductor layer 2, luminescent layer 11 and p-type semiconductor layer 3 are stretched, now positive electrode extends to the height at transparency conducting layer 8 places, positive electrode directly contacts and is connected with the end of described transparency conducting layer, and the height of the first insulating barrier 6 in a little higher than Fig. 2 of the height of the first insulating barrier 6 now, the first transparent insulating layer 6 is arranged on the N-shaped semiconductor layer 2 of positive electrode 4 and LED semiconductor layer, luminescent layer 11, between p-type semiconductor layer 3, thereby also keep off between positive electrode 4 and p-type semiconductor layer 3.Now, positive electrode 4 only unilaterally directly contacts with the end of transparency conducting layer 8, thereby realizes the electrical connection between positive electrode 4 and p-type semiconductor layer 3 by transparency conducting layer 8, and between positive electrode 4 and p-type semiconductor layer 3 directly contact be connected.Now, because only realizing and being electrically connected to by transparency conducting layer 8, the area of electric signal transmission is less than in Fig. 2,3,4 by 8 liang of aspects of p-type semiconductor 3 and transparency conducting layer and directly contacts the transmission area that forms the signal of telecommunication while being electrically connected to, so electric conductivity is relatively weak.
Embodiment two
This embodiment is with the difference of execution mode one: in this embodiment, dispense transparency conducting layer 8, positive electrode 4 only directly contacts and is connected with the end of p-type semiconductor layer 3.And embodiment one is the situation that comprises transparency conducting layer 8, positive electrode directly contacts with the end of transparency conducting layer 8, two aspects, end of p-type semiconductor layer 3, or is only connected with the one-sided directly contact in end of transparency conducting layer 8.
As shown in Figure 6, be the structural representation of LED chip architecture in this embodiment.In this embodiment, LED chip architecture comprises substrate 1, LED semiconductor layer, the first transparent insulating layer 6, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.
Wherein, on substrate, be provided with described LED semiconductor layer.
In this embodiment, with respect to embodiment one, can omit transparency conducting layer 8, by positive electrode 4, be contacted with the direct of end of p-type semiconductor layer 3, form being electrically connected between positive electrode and p-type semiconductor layer 3.But owing to being only unilaterally electrically connected to by p-type semiconductor layer 3 in this embodiment, the area of electric signal transmission is less than in Fig. 2,3,4 by 8 liang of aspects of p-type semiconductor 3 and transparency conducting layer and directly contacts the transmission area that forms the signal of telecommunication while being electrically connected to, during work, electric current uniformity is weaker a little, and electric conductivity is relatively weak.
As shown in Figure 7, be a kind of distressed structure of LED chip architecture in this embodiment.Now, in LED chip architecture, p-type semiconductor layer 3 is slightly longer, with respect to N-shaped semiconductor layer 2 and luminescent layer 11, stretch, now positive electrode 4 needn't extend into the end of p-type semiconductor 3, only extend to the height at p-type semiconductor layer 3 places, directly contact and be connected with p-type semiconductor layer 3.By being connected with the one-side contact of p-type semiconductor layer 3, thereby realize being electrically connected between positive electrode 4 and p-type semiconductor layer 3.
Embodiment three
This embodiment is with the difference of execution mode one: LED semiconductor layer is step-like, and negative electrode only directly contacts and is connected with the sidepiece of step, has not therefore needed the second transparent insulating layer 7 of insulating effect.And in execution mode one, be all to contact with table top with the sidepiece of step, simultaneously also by the isolated negative electrode 5 of the first transparent insulating layer 7 and p-type semiconductor layer 3.
As shown in Figure 8, be the structural representation of LED chip architecture in this embodiment.In this embodiment, LED chip architecture comprises substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.Wherein, substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, positive electrode 4 are identical with embodiment one with negative electrode 5 relative position setting to each other, in this not repeat specification.The following difference that only describes relevant negative electrode setting in detail.
As described in Figure 8, in this embodiment, N-shaped semiconductor 2 is longer than p-type semiconductor 3, makes LED semiconductor layer form step, and negative electrode 5 only directly contacts and is connected with the sidepiece of step, thereby realizes being electrically connected between negative electrode 5 and N-shaped semiconductor layer 2.Because negative electrode 5 now is only connected with N-shaped semiconductor layer 2 contacts of step sidepiece, no longer need to arrange the second transparent insulating layer 7 negative electrode 5 is completely cut off and opened with luminescent layer 11,3 insulation of p-type semiconductor layer.In addition, in Fig. 8, negative electrode 5 only contacts with the N-shaped semiconductor layer 2 of step sidepiece, the situation all contacting with N-shaped semiconductor layer 2 on table top with respect to negative electrode in Fig. 25 and step sidepiece, and in Fig. 8, the electric conductivity at negative electrode place is weak a little.
Although this embodiment negative electrode only contacts with the N-shaped semiconductor layer 2 of step sidepiece, but with embodiment one, the LED chip architecture of this embodiment, positive electrode, negative electrode extend respectively the both sides that are arranged on substrate and LED semiconductor layer, there is equally following effect: on the one hand, positive and negative electrode can accomplish that area is larger, thereby improves heat dispersion and the heat conductivility of LED chip architecture.On the other hand, positive electrode, negative electrode extend at sidepiece, during follow-up encapsulation, can reduce packaging cost, simplify packaging process.
Embodiment four
This embodiment is with the difference of execution mode one: LED semiconductor layer is not step-like, and N-shaped semiconductor layer, luminescent layer and p-type semiconductor layer align at the sidepiece that negative pole is set.Now, negative electrode 5 directly contacts to form with the end of N-shaped semiconductor layer 2 and is electrically connected to, and now LED chip architecture does not need the second insulating barrier 7.
As shown in Figure 9, be the structural representation of LED chip architecture in this embodiment.In this embodiment, LED chip architecture comprises substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.Wherein, substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, positive electrode 4 are identical with embodiment one with negative electrode 5 relative position setting to each other, in this not repeat specification.The following difference that only describes relevant negative electrode setting in detail.
As described in Figure 9, negative electrode 5 extends the opposite side that is arranged on substrate 1 and LED semiconductor layer, negative electrode 5 directly contacts and is connected with the end of N-shaped semiconductor layer 2 in described LED semiconductor layer, by the direct contact of end, realizes being electrically connected between negative electrode 5 and N-shaped semiconductor layer 2.Because negative electrode 5 now is only connected with the end contact of N-shaped semiconductor layer 2, no longer need to arrange the second transparent insulating layer 7 negative electrode 5 is completely cut off and opened with luminescent layer 11,3 insulation of p-type semiconductor layer.
This embodiment is the situation of the sidepiece alignment of LED semiconductor layer, with embodiment one, the LED chip architecture of this embodiment, positive electrode, negative electrode extend respectively the both sides that are arranged on substrate and LED semiconductor layer, can improve equally heat dispersion and the heat conductivility of LED chip architecture, reduce packaging cost simultaneously, simplify packaging process.
Embodiment five
This embodiment is with the difference of execution mode one: the positive electrode of LED chip architecture and negative electrode all extend to the bottom of substrate.
As shown in figure 10, be the structural representation of the LED chip architecture in this embodiment.LED chip architecture comprises substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, the second transparent insulating layer 7, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.Wherein, the relative position setting to each other of above-mentioned each assembly is identical with embodiment one, in this not repeat specification.The following difference that only describes relevant positive and negative electrode setting in detail.In this embodiment, positive electrode 4 and negative electrode 5 are separately positioned on the both sides of substrate 1 and LED semiconductor layer, and extend to the bottom of substrate 1.Due in this embodiment, positive and negative electrode extends to respectively the bottom of substrate, and therefore larger with respect in embodiment one of the area of positive and negative electrode can further promote heat radiation and the electric conductivity of LED chip architecture.
Embodiment six
This embodiment is with the difference of execution mode one: on the basis of execution mode one, set up transparent insulation protective layer.
As shown in figure 11, be the structural representation of the LED chip architecture in this embodiment.LED chip architecture comprises substrate 1, LED semiconductor layer, transparency conducting layer 8, the first transparent insulating layer 6, the second transparent insulating layer 7, positive electrode 4 and negative electrode 5.LED semiconductor layer comprises N-shaped semiconductor layer 2, luminescent layer 11, the p-type semiconductor layer 3 setting gradually.Wherein, the relative position setting to each other of above-mentioned each assembly is identical with embodiment one, in this not repeat specification.The following difference that only describes relevant transparent insulation protective layer setting in detail.This embodiment has been set up transparent insulation protective layer 10 on the basis of execution mode one, and transparent insulation protective layer 10 is arranged on transparency conducting layer 8, and transparency conducting layer 8 and the second transparent insulating layer 7 are covered.Transparent insulation protective layer 10 can be SiO2 insulating protective layer.By add transparent insulation protective layer 10 on transparency conducting layer 8, make LED chip architecture when suffering outside destroy, by transparent insulation protective layer 10 protection wafer internal core structures, can not damage.
Above content is in conjunction with concrete preferred implementation further detailed description of the utility model, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, make without departing from the concept of the premise utility some substituting or obvious modification, and performance or purposes identical, all should be considered as belonging to protection range of the present utility model.
Claims (10)
1. a LED chip architecture, is characterized in that: comprise substrate, LED semiconductor layer, transparency conducting layer, the first transparent insulating layer, positive electrode and negative electrode; Described LED semiconductor layer comprises N-shaped semiconductor layer, luminescent layer, the p-type semiconductor layer setting gradually;
On described substrate, be disposed with described LED semiconductor layer and transparency conducting layer;
Described positive electrode extends a side that is arranged on described substrate and described LED semiconductor layer; Described positive electrode directly contacts and is connected with the end of p type semiconductor layer in described LED semiconductor layer, the end of described transparency conducting layer, and described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer of described positive electrode and described LED semiconductor layer; Or described positive electrode directly contacts and is connected with the end of described transparency conducting layer, described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer, p-type semiconductor layer of described positive electrode and described LED semiconductor layer;
Described negative electrode extends the opposite side that is arranged on described substrate and described LED semiconductor layer, and described negative electrode directly contacts and is connected with the end of N-shaped semiconductor layer in described LED semiconductor layer.
2. LED chip architecture according to claim 1, is characterized in that: described N-shaped semiconductor is longer than described p-type semiconductor, makes described LED semiconductor layer form step; Described negative electrode directly contacts and is connected with the sidepiece of described step.
3. LED chip architecture according to claim 1, is characterized in that: described N-shaped semiconductor is longer than described p-type semiconductor, makes described LED semiconductor layer form step; Described negative electrode all directly contacts and is connected with table top with the sidepiece of described step; Described LED chip architecture also comprises the second transparent insulating layer, and described the second transparent insulating layer is arranged between the negative electrode on described p-type semiconductor, luminescent layer and described table top.
4. LED chip architecture according to claim 1, is characterized in that: described positive electrode and negative electrode all extend to the bottom of described substrate.
5. LED chip architecture according to claim 1, is characterized in that: described LED chip architecture also comprises transparent insulation protective layer, and described transparent insulation protective layer is arranged on described transparency conducting layer.
6. LED chip architecture according to claim 1, is characterized in that: described substrate is Sapphire Substrate.
7. LED chip architecture according to claim 6, is characterized in that: described substrate is patterned sapphire substrate.
8. LED chip architecture according to claim 1, is characterized in that: described LED semiconductor layer is gallium nitride semiconductor layers.
9. LED chip architecture according to claim 1, is characterized in that: described the first transparent insulating layer is SiO
2insulating barrier.
10. a LED chip architecture, is characterized in that: comprise substrate, LED semiconductor layer, the first transparent insulating layer, positive electrode and negative electrode; Described LED semiconductor layer comprises N-shaped semiconductor layer, luminescent layer, the p-type semiconductor layer setting gradually;
On described substrate, be provided with described LED semiconductor layer;
Described positive electrode extends a side that is arranged on described substrate and described LED semiconductor layer, described positive electrode directly contacts and is connected with the end of described p-type semiconductor layer, and described the first transparent insulating layer is arranged between the N-shaped semiconductor layer, luminescent layer of described positive electrode and described LED semiconductor layer;
Described negative electrode extends the opposite side that is arranged on described substrate and described LED semiconductor layer, and described negative electrode directly contacts and is connected with the end of N-shaped semiconductor layer in described LED semiconductor layer.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103400916A (en) * | 2013-08-21 | 2013-11-20 | 深圳市凯信光电有限公司 | LED wafer structure |
WO2016011608A1 (en) * | 2014-07-23 | 2016-01-28 | 深圳市国源铭光电科技有限公司 | Led light source and led lamp |
CN112968030A (en) * | 2020-12-30 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Display panel and manufacturing method thereof |
-
2013
- 2013-08-21 CN CN201320513335.4U patent/CN203456493U/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103400916A (en) * | 2013-08-21 | 2013-11-20 | 深圳市凯信光电有限公司 | LED wafer structure |
WO2016011608A1 (en) * | 2014-07-23 | 2016-01-28 | 深圳市国源铭光电科技有限公司 | Led light source and led lamp |
CN112968030A (en) * | 2020-12-30 | 2021-06-15 | 重庆康佳光电技术研究院有限公司 | Display panel and manufacturing method thereof |
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