CN203445776U - switching power converter system and control circuit thereof - Google Patents
switching power converter system and control circuit thereof Download PDFInfo
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- CN203445776U CN203445776U CN201320489887.6U CN201320489887U CN203445776U CN 203445776 U CN203445776 U CN 203445776U CN 201320489887 U CN201320489887 U CN 201320489887U CN 203445776 U CN203445776 U CN 203445776U
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- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The utility model provides a switching power supply converter system and controller thereof. The switching power supply converter system consists of a switching power supply converter, a feedback circuit, an error amplification circuit, a triangular wave signal generator and a constant conduction time control circuit. The triangular wave signal generator generates a triangular wave signal according to the soft switching signal, the second reference signal, the switching signal of the switching power converter and the output voltage, and the DC bias of the triangular wave signal is related to the smaller value of the soft switching signal and the second reference signal. The triangular wave signal is compared with an error amplification signal generated by an error amplification circuit according to a soft switching signal, a first reference signal and a feedback signal to generate a constant on-time control signal to control a switching power supply converter system, so that the switching power supply converter system realizes soft switching and has a larger output voltage regulation range.
Description
Technical field
The utility model relates to circuit field.The utility model more specifically but be not limited to relate to switch power converter system and control circuit thereof.
Background technology
In field of switch power, the switch power converter system of constant on-time control model, because its superior load transient response, simple internal structure and level and smooth mode of operation are switched, is widely used in the industry.
Constant on-time mode switch power-supply controller of electric of the prior art normally produces an error amplification signal and one triangular signal according to input voltage and output voltage is made comparisons, trigger constant on-time timer, generation system control signal.In this course, error amplification signal need to mate with the amplitude of triangular signal, could triggered as normal constant on-time timer.In prior art, be conventionally adopted as triangular signal and set the fixedly way of direct current biasing, complete amplitude coupling.Yet, set fixedly direct current biasing and can make the output voltage adjustable range of switch power converter system be restricted, be also difficult for adding soft start function in switch power converter system simultaneously.
Meanwhile, in the constant on-time mode switch power-supply controller of electric of prior art, in order to guarantee loop stability, conventionally can make the variation of error amplification signal as far as possible mild.And under underloaded condition, error amplification signal can be along with closing of all power switchs declines gradually, making has a larger difference between error amplification signal and triangular signal.In the case, it is very poor that system's transient response performance can become, and needs improvement badly.
Summary of the invention
The utility model is considered one or more problem of the prior art, has proposed a kind of switch power converter system and control circuit thereof.
First aspect of the present utility model, a kind of switch power converter system has been proposed, it is characterized in that, described switch power converter system comprises: switch power converter, there is power switch, by turning on and off of described power switch, an input voltage is converted to an output voltage, the switch of described power switch and shutoff produce a switching signal; Feedback circuit, receives described output voltage, generates feedback signal; Error amplifying circuit, is couple to described feedback circuit, according to the smaller value in described the first reference signal and soft switching signal and described feedback signal, produces described error amplification signal; Triangular signal generator based, be couple to described switch power converter, according to described soft switching signal, the second reference signal, described switching signal and described output voltage, produce a triangular signal; Constant on-time control circuit, be couple to described error amplifying circuit and described triangular signal generator based, receive described error amplification signal and described triangular signal, generate constant on-time control signal, for controlling the described power switch of described switch power converter; The direct current biasing of wherein said triangular signal is relevant with the smaller value in described soft switching signal and described the second reference signal.
In certain embodiments, described switch power converter further comprises soft switch signal generator, and when described switch power converter system starts, described soft switch signal generator produces described soft switching signal; Described constant on-time control circuit comprises: PWM comparator, wherein, described PWM comparator has in-phase input end, inverting input and output, and described in-phase input end and described inverting input receive respectively described error amplification signal and described triangular signal; And timer, be couple to the output of described PWM comparator, according to the output signal of described PWM comparator, at the output of timer, produce described constant on-time control signal.
In certain embodiments, described triangular signal generator based first resistance that comprises, the second resistance, the first electric capacity and voltage follower, wherein, the first end of described the first resistance receives described switching signal, the second end is couple to the first end of described the second resistance, the two ends of described the first electric capacity couple respectively the output voltage of described switch power converter and the second end of described the first resistance, described voltage follower has two in-phase input ends, an inverting input and an output, wherein said two in-phase input ends are couple to respectively described soft switching signal and described the second reference signal, the output of described inverting input and described voltage follower couples, the output of described voltage follower is further couple to the second end of described the second resistance, the signal of described second resistance the second end is as described triangular signal.
In certain embodiments, described the second reference signal equals described the first reference signal.
In certain embodiments, described switch power converter system further comprises: dormancy decision circuitry, export a dormancy judgement signal, for judging that whether described switch power converter system is in resting state; With
Clamp circuit, couple described dormancy decision circuitry, described triangular signal generator based and described error amplifying circuit, when described dormancy judgement signal judges that described switch power converter system is resting state, according to described triangular signal and described error amplification signal, decide described error amplification signal is carried out to clamp.
In certain embodiments, the condition that described clamp circuit carries out clamp to described error amplification signal is: described dormancy judgement signal designation system is in entering resting state; And the potential difference between described error amplification signal and described triangular signal reaches the first skew direct voltage; Described dormancy judgement signal judges that the condition of described switch power converter system in resting state is: the described power switch Close All in described switch power converter system; With the potential difference between described triangular signal and described error amplification signal is more than or equal to the second skew direct voltage, and continued for the first time of delay; And described dormancy judgement signal judges that the condition that described switch power converter system is left resting state is: the arbitrary power switch conducting in described switch power converter system; Or described feedback signal is less than the 3rd reference signal.
In certain embodiments, described the first skew direct voltage is greater than described the second skew direct voltage.
In certain embodiments, described the 3rd reference signal is 0.95 times of described the first reference signal.
In certain embodiments, described clamp circuit comprises: the first skew direct voltage source, and the anode of described the first skew direct voltage source is couple to described triangular signal generator based output and receives described triangular signal; Operational amplifier, in-phase input end is couple to the negative terminal of described the first skew direct voltage source, and inverting input is couple to and receives described error amplification signal; The first switch, the control end of described the first switch receives described dormancy judgement signal, the closed or disconnection according to described dormancy judgement signal deciding; Current source, anode is couple to system power supply voltage by described the first switch; With MOSFET pipe, the grid of described MOSFET pipe is couple to the output of described operational amplifier, and described current source negative terminal is couple to the drain electrode of described MOSFET pipe, and the source electrode of described MOSFET pipe is couple to described error amplifying circuit.
In certain embodiments, described dormancy decision circuitry comprises: the second skew direct voltage source, and the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal; The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and inverting input is couple to the anode of described the second skew direct voltage source; NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue; Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator; And trigger, there is set end, reset terminal and output, described set end is couple to the output of described anti-spike delay circuit, described reset terminal couples the control signal that receives described switch power converter system main switch, and the output signal of described output is as described dormancy judgement signal.
In certain embodiments, described dormancy decision circuitry comprises: the second skew direct voltage source, and the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal; The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and inverting input is couple to the anode of described the second skew direct voltage source; NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue; Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator; The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal; Or door, there are two inputs, the control signal of receiving key power supply changeover device system main switch, and the output signal of described the second comparator respectively; And trigger, there is set end, reset terminal and output, described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door, and the output signal of described output is as described dormancy judgement signal.
In certain embodiments, described dormancy decision circuitry comprises: the second skew direct voltage source, and the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal; The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein said in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and described inverting input is couple to the anode of described the second skew direct voltage source; NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue; Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator; The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal; Or door, there are two inputs, the control signal of receiving key power supply changeover device system main switch, and the output signal of described the second comparator respectively; Trigger, has set end, reset terminal and output, and described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door; And with door, there are two inputs, couple respectively the output of described trigger and the output of described the first comparator, the output signal on the output of described and door is as described dormancy judgement signal.
In certain embodiments, described dormancy decision circuitry comprises: the second skew direct voltage source, and the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal; The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein said in-phase input end is couple to described triangular signal generator based output and receives described triangular signal, and described inverting input is couple to the anode of described the second skew direct voltage source; NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue; Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator; The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal; Or door, thering are two inputs, first input end receives the output signal of described the second comparator; Trigger, has set end, reset terminal and output, and described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door; With door, there are two inputs, couple respectively the output of described trigger and the output of described the first comparator, the output signal on the output of described and door is as described dormancy judgement signal; And inverter, the input of described inverter is couple to output described and door, and the output of described inverter is couple to the second input described or door.
Second aspect of the present utility model, a kind of switch power controller has been proposed, power switch for control switch power supply changeover device produces switching signal, convert an input voltage to an output voltage, it is characterized in that, described switch power controller comprises: feedback circuit, receive described output voltage, and generate feedback signal; Error amplifying circuit, is couple to described feedback circuit, according to the smaller value in the first reference signal and soft switching signal and described feedback signal, produces described error amplification signal; Triangular signal generator based, be couple to described switch power converter, according to described soft switching signal, the second reference signal, described switching signal and described output voltage, produce a triangular signal; Constant on-time control circuit, be couple to described error amplifying circuit and described triangular signal generator based, receive described error amplification signal and described triangular signal, generate constant on-time control signal, for controlling the described power switch of described switch power converter; The direct current biasing of wherein said triangular signal is relevant with the smaller value in described soft switching signal and described the second reference signal.
In certain embodiments, described switch power controller further comprises: dormancy decision circuitry, export a dormancy judgement signal, for judging that whether described switch power converter is in resting state; And clamp circuit, couple described dormancy decision circuitry, described triangular signal generator based and described error amplifying circuit, when described dormancy judgement signal is judged as resting state, according to described triangular signal and described error amplification signal, decide described error amplification signal is carried out to clamp.
Compared to existing technology, the utility model can improve the scope of switch power converter system regulation output voltage, and realizes soft start.Meanwhile, the utility model can also improve switch power converter system's transient response performance under underload.
Accompanying drawing explanation
For a better understanding of the present invention, will to embodiments of the invention, be described according to the following drawings:
Figure 1 shows that the system block diagram according to the switch power converter system 10 of an embodiment of the utility model.
Fig. 2 shows a physical circuit schematic diagram according to the switch power converter system 10 of an embodiment of the utility model.
Fig. 3 is the work wave schematic diagram according to switch power converter system 10 in Fig. 2 of an embodiment of the utility model.
Fig. 4 shows according to the system block diagram of the switch power converter system 40 of another embodiment of the present utility model.
Fig. 5 shows according to the physical circuit schematic diagram of the switch power converter system 40 of another embodiment of the present utility model.
Fig. 6 A, Fig. 6 B, Fig. 6 C and Fig. 6 D show according to the circuit diagram of the dormancy decision circuitry 409 of alternative embodiments more of the present utility model.
Fig. 7 shows the work wave schematic diagram under underload according to switch power converter system 40 in Fig. 5 of an embodiment of the present utility model.
Run through institute's identical Reference numeral of drawings attached and represent same or analogous parts or feature.
Embodiment
Specific embodiment hereinafter described represents exemplary embodiment of the present utility model, and in essence only for example explanation is unrestricted.In specification, mention that " embodiment " or " embodiment " mean in conjunction with the described special characteristic of this embodiment, structure or characteristic to be included at least one embodiment of the present utility model.Term " in one embodiment " each position in specification occurs all not relating to identical embodiment, neither mutually get rid of other embodiment or variable embodiment.Disclosed all features in this specification, except mutually exclusive feature, all can combine by any way.
Describe below with reference to the accompanying drawings embodiment of the present utility model in detail.Run through institute's identical Reference numeral of drawings attached and represent same or analogous parts or feature.
Figure 1 shows that the system block diagram according to the switch power converter system 10 of an embodiment of the utility model.As shown in Figure 1, switch power converter system 10 comprises switch power converter 101 and system controller.Switch power converter 101 has power switch, by turning on and off of power switch, an input voltage VIN is converted to an output voltage VO UT.Wherein turning on and off of power switch produces a switching signal SW; System controller comprises feedback circuit 102, and error amplifying circuit 103 is triangular signal generator based 104, and constant on-time control circuit 105.Wherein, feedback circuit 102 receives output voltage VO UT, generates feedback signal VFB.Error amplifying circuit 103 couples feedback circuit 102, compares a first reference signal VREF1 and a soft switching signal SS, according to smaller value and feedback signal VFB wherein, generated error amplifying signal EAO.Triangular signal generator based 104 are couple to switch power converter 101, according to soft switching signal SS, and a second reference signal VREF2, switching signal SW and output voltage VO UT, produce a triangular signal VRAMP.Soft switching signal SS gently rises when system starts, to prevent voltage overshoot.Constant on-time control circuit 105 is couple to error amplifying circuit 103 and triangular signal generator based 104, receive error amplification signal EAO and triangular signal VRAMP, and generate constant on-time control signal TON according to above-mentioned binary signal, for the power switch of control switch power supply changeover device 101.
Wherein triangular signal VRAMP has direct current biasing, and this direct current biasing is relevant with the smaller value in soft switching signal SS and the second reference signal VREF2.Like this, when system starts, because soft switching signal SS is less than the first reference signal VREF1, triangular signal VRAMP is all relevant with soft switching signal SS with error amplification signal EAO, make startup stage triangular signal VRAMP can mate with error amplification signal EAO.
Simultaneously, because the direct current biasing in VRAMP signal has the component of signal SS or VREF2, therefore signal VRAMP can adjust automatically flexibly according to the variation of output voltage VO UT direct current biasing, to mate the amplitude of different error amplification signal EAO, like this, the adjusting range of the output voltage VO UT of switch power converter system 10 has obtained very large expansion.
In one embodiment, the first reference signal VREF1 equates with the second reference signal VREF2.
In one embodiment, switch power converter system 10 also comprises soft switch signal generator 106, when switch power converter system 10 starts, produces soft switching signal SS.In other embodiments, soft switching signal SS can be provided by outside source.
Fig. 2 shows a physical circuit schematic diagram according to the switch power converter system 10 of an embodiment of the utility model.As shown in Figure 2, in the illustrated embodiment, switch power converter 101 is a synchronous rectification step-down (Buck) transducer, comprises main switch 201, synchronous rectification switch 202, outputting inductance 203 and output capacitance 204.In this area, having average technical staff can understand, and in further embodiments, switch power converter 101 may be used rectifier diode to replace synchronous rectification switch 202.In other embodiments, switch power converter 101 may have the known topology of other those skilled in that art, as (Boost) transducer that boosts, buck (Buck-Boost) transducer, normal shock (Forward) transducer, flyback (Fly-back) transducer etc.
Triangular signal generator based 104 comprise the RC network 208 being comprised of resistance R c1, Rc2 and capacitor C c1, and voltage follower 209.Wherein the first end of resistance R c1 is couple to the common port of main switch 201 and synchronous rectification switch 202, receiving key signal SW.The second end of resistance R c1 is couple to the first end of resistance R c2.The two ends of capacitor C c1 couple respectively the output OUT of switch power converter and the second end of resistance R c1.Voltage on resistance R c1 the second end is as triangular signal VRAMP.Voltage follower 209 has two in-phase input ends, an inverting input and an output, and wherein two in-phase input ends are couple to respectively soft switching signal SS and the second reference signal VREF2, and inverting input and output couple.The output of voltage follower 209 is further couple to the second end of resistance R c2, selects the smaller value in soft switching signal SS and the second reference signal VREF2 to follow.In one embodiment, soft switching signal SS is couple to the input of voltage follower 209 by a bias voltage source BIAS.Bias voltage source BIAS has bias voltage Vbias.In other embodiments, soft switching signal SS may realize biasing by the mode of the interior additional voltage source of soft switch signal generator 106 or resistance.
In this area, having mean level technical staff can understand, in other embodiments, triangular signal generator based 104 or assembly wherein may there is different circuit structures and using to realize the smaller value in soft switching signal SS and the second reference signal VREF2 is coupled in the direct current biasing of triangular signal VRAMP as component.
Continue as shown in Figure 2, in the illustrated embodiment, constant on-time control circuit 105 comprises pulse-width modulation (PWM) comparator 210 and timer 211.Wherein, PWM comparator 210 has in-phase input end, inverting input and output, and in-phase input end and inverting input receive respectively error amplification signal EAO and triangular signal VRAMP.In one embodiment, comparator 210 is a hysteresis comparator.Timer 211 is couple to the output of comparator 210, according to the output signal of comparator 210, produces output signal, as constant on-time control signal TON at output.In the illustrated embodiment, switch power converter system 10 also has logical circuit 213, be couple to the output of timer 211, constant on-time control signal TON is converted into main switch control signal HSG and synchronous rectification switch control signal LSG, drives main switch 201 and synchronous rectification switch 202.In other embodiments, constant on-time control signal TON may directly control main switch 201.
In one embodiment, switch power converter system 10 also comprises soft switch signal generator 106.In the embodiment shown in Figure 2, soft switch signal generator 106 comprises current source IS and capacitor C S1.Wherein, current source IS and capacitor C S1 be coupled in series in system power supply Vcc and systematically between.The voltage of the common port of current source IS and capacitor C S1 is as soft switching signal SS.In this area, have average technical staff and can understand in other embodiments, soft switch signal generator 106 may have other circuit structure and realize the function that produces a mild soft switching signal SS who rises in power supply changeover device system open stage.
In one embodiment, error amplifier 206 in error amplifying circuit 103 has two in-phase input ends and an inverting input, wherein two in-phase input ends receive respectively the first reference signal VREF1 and soft switching signal SS, and select smaller value and feedback signal VFB in the first reference signal VREF1 and soft switching signal SS to compare.
In this area, having average technical staff can understand, and switch power converter system 10 is not limited to the circuit structure shown in Fig. 2.In other embodiments, switch power converter system 10 may have and is different from the circuit structure shown in Fig. 2 and assembly, to realize similar function.For example, in certain embodiments, the voltage buffer 207 in error amplifying circuit 103 can be removed, by the direct output error signal EAO of error comparator 206.Again for example, in further embodiments, constant on-time control circuit 105 may also comprise one and door, there is two inputs and an output, wherein two inputs couple respectively the output of comparator 210 and the output of timer 211, as constant on-time control signal TON, like this, constant on-time control signal TON may be determined jointly by the output signal of PWM comparator 210 and the output signal of timer 211 with the output signal of the output of door.
Fig. 3 is the work wave schematic diagram according to switch power converter system 10 in Fig. 2 of an embodiment of the utility model.Below in conjunction with Fig. 3, the operation principle of the switch power converter system 10 shown in Fig. 2 is explained.As shown in Figure 3, at T1, before the moment, system is switched on but is not yet opened soft switching signal SS<VREF.Now the direct current biasing of triangular signal VRAMP is relevant with soft switching signal SS.Due to the effect of bias current sources BIAS, VRAMP has a bias voltage Vbias, makes VRAMP>EAO, prevents false triggering timer 211.Arrived T1 constantly, system is opened, and now, VOUT is zero, and VFB=R2 * VOUT/ (R1+R2) is also zero.In soft switch signal generator 106, current source IS starts the charging to capacitor C S1, soft switching signal SS is started from scratch and with a slower constant speed, rise.Now soft switching signal SS is less than the first reference signal VREF1, so error amplifying circuit 103 is according to feedback signal VFB and soft switching signal SS, exports an error amplification signal EAO that amplitude is less.Due to the rise delayed action of slow and rear class buffer 207 of soft switching signal SS, arrived T2 constantly, the EAO rising of just starting from scratch.Constantly, EAO rises to same Vbias and equates T3 subsequently, and main switch 201 is opened first to output capacitance 204 chargings, and VOUT and VFB start to rise.On the other hand, due to the effect of voltage follower 209, the second terminal potential of resistance R c2 is followed soft switching signal SS.Therefore the direct current biasing amplitude of triangular signal VRAMP is (Rc2 * VOUT+Rc1 * SS)/Rc1+Rc2, because Vbias is conventionally less, therefore on the impact of the direct current biasing amplitude of triangular signal VRAMP, can ignore herein.Under the effect of RC network 208, the amplitude of triangular signal VRAMP is ton * (VIN-VOUT)/(Rc1 * Cc1).Wherein ton is the indicated constant on-time of constant on-time control signal TON.Starting the starting stage, soft switching signal SS is lower, therefore by resistance R c1 and Rc2 being set in suitable ratio, can make the direct current biasing of triangular signal VRAMP less, allow the error amplification signal EAO that triangular signal VRAMP can be less with amplitude mate.Continue as shown in Figure 3, in soft start-up process, SS is along with capacitor C S is recharged and slowly rises.Under the effect of soft-start signal SS, the rate of rise of VOUT and VFB is less, the impact while having reduced to start.Owing to there being a slope differences between VFB and SS, after amplifying, error amplifying circuit 206 make error amplification signal EAO also increase gradually.And the component that now has a soft-start signal SS due to the direct current biasing of triangular signal VRAMP also constantly rises, so triangular signal VRAMP can keep mating with EAO.To T4, after the moment, soft switching signal SS rises and equates and continue to rise with the first reference signal VREF1, and now error amplifier 206 starts the error between comparison the first reference signal VREF1 and feedback signal VFB.In the illustrated embodiment, VREF1=VREF2, therefore the output of voltage follower 209 is also switched to and follows the first reference signal VREF1 by following soft switching signal SS, and the direct current biasing component of triangular signal VRAMP is (Rc2 * VOUT+Rc1 * VREF1)/Rc1+Rc2.Afterwards, output voltage VO UT and feedback signal VFB continue to rise, and to T5 output voltage VO UT arrival constantly predetermined voltage, switch power converter system completes start-up course, enter steady-working state, now the direct current biasing of signal EAO and VRAMP is all stable no longer changes.
Fig. 4 shows according to the system block diagram of the switch power converter system 40 of another embodiment of the present utility model.Compare switch power converter system 10, switch power converter system further comprises a clamp circuit 408 and a dormancy decision circuitry 409.Dormancy judgement signal SLEEP of wherein dormancy decision circuitry 409 output, for judging that whether switch power converter system is in resting state.Clamp circuit 408 couples dormancy decision circuitry 409, triangular signal generator based 104 and error amplifying circuit 103, when dormancy judgement signal SLEEP is judged as resting state, according to triangular signal VRAMP and error amplification signal EAO, decides error amplification signal EAO is carried out to clamp.
When switch power converter system 40 is in low load condition lower time, switch power converter 101 can enter discontinuous current work state, and the work period is elongated.If now dormancy decision circuitry 409 is made system hibernates judgement, enable clamp circuit 408.The clamp of 408 couples of error amplification signal EAO of clamp circuit can avoid between triangular signal VRAMP and error amplification signal EAO gap excessive, thus the transient response performance of raising system under this state.
Fig. 5 shows according to the physical circuit schematic diagram of the switch power converter system 40 of another embodiment of the present utility model.In illustrated embodiment with the no longer repeat specification herein of the same or analogous part of circuit shown in Fig. 2.
As shown in Figure 5, clamp circuit 408 comprises the first skew direct voltage source OFFSET1, operational amplifier 501, switch S 1, MOSFET pipe M2 and current source I2.The anode of the first skew direct voltage source OFFSET1 is couple to triangular signal generator based 104 output reception triangular signal VRAMP, and negative terminal is couple to the in-phase input end of operational amplifier 501.The inverting input of amplifier 501 receives error amplification signal EAO.The output of operational amplifier 501 is couple to the grid of MOSFET pipe M2.The negative terminal of current source I2 is couple to system power supply voltage vcc by switch S 1, and anode is couple to the drain electrode of MOSFET pipe M2.The control end of switch S 1 receives dormancy judgement signal SLEEP, and according to dormancy judgement signal, SLEEP determines closed or disconnects.In one embodiment, when dormancy judgement signal SLEEP is high level, switch S 1 closure, when SLEEP is low level, switch S 1 disconnects.In other embodiments, switch S 1 also may have contrary condition of work.The source electrode of MOSFET pipe M2 is couple to error amplifying circuit 103.In the illustrated embodiment, the source electrode of MOSFET pipe M2 is couple to the output of the error amplifier 206 in error amplifying circuit 103.In other embodiments, the source electrode of MOSFET pipe M2 also may be couple to other correct position in error amplifying circuit 103 to realize clamp function according to particular circuit configurations.
In the illustrated embodiment, 408 couples of error amplification signal EAO of clamp circuit carry out the condition of clamp and are: (1) dormancy judgement signal SLEEP indication mechanism enters resting state; (2) potential difference between error amplification signal EAO and triangular signal VRAMP reaches the first skew direct voltage Voffset1.
In this area, concrete average technical staff can understand, and in other embodiments, the circuit structure of clamp circuit 408 may be different from embodiment mentioned above, for realizing similar function.For example, in another embodiment, clamp circuit 408 may further comprise a filter network, is coupled between triangular signal generator based 104 output and the anode of the first skew direct voltage source OFFSET1, for the alternating component of filtering triangular signal VRAMP.The anode of the first skew direct voltage source OFFSET1 may be coupled to the inverting input of operational amplifier 501 in another embodiment, and negative terminal couples reception error amplification signal EAO.
Continue as shown in Figure 5, in one embodiment, dormancy decision circuitry 409 comprises the second skew direct voltage source OFFSET2, the first comparator 502, NOR gate 503, anti-spike delay circuit 504, the second comparators 505, or door 506 and trigger 507.Wherein, the negative terminal of the second skew direct voltage source OFFSET2 is couple to the output of error amplifying circuit 103, receives error amplification signal EAO.The first comparator 502 has an in-phase input end, an inverting input, an Enable Pin and an output, wherein in-phase input end is couple to triangular signal generator based 104 output reception triangular signal VRAMP, and inverting input is couple to the anode of the second skew direct voltage source OFFSET2.The control signal of all power switchs in the input receiving key power supply changeover device system 40 of NOR gate 503.The output of NOR gate 503 is couple to the Enable Pin of the first comparator 502, exports a dormancy cue HZ.In system, any one power switch is when opening state, and NOR gate 503 does not enable the first comparator 502, makes dormancy judgement signal SLEEP indicator cock power supply changeover device system 40 leave resting state.In the illustrated embodiment, NOR gate 503 has two inputs, receives respectively main switch control signal HSG and synchronous rectification switch control signal LSG.When main switch control signal HSG and synchronous rectification switch control signal LSG are low level, NOR gate 503 output high level HZ signals, enable the first comparator 502.When any one in main switch control signal HSG and synchronous rectification switch control signal LSG is high level, while having a conducting in main switch 201 or synchronous rectification switch 202, the first comparator 502 does not enable, and output perseverance is low level.Anti-spike delay circuit 504 is coupled between the output of the first comparator 502 and the set end of trigger 507 (S end), for by the output delay of the first comparator 502 td the first time of delay, prevents the generation false triggering that is interfered of dormancy decision circuitry.In one embodiment, anti-spike delay circuit 504 first time of delay td be 1-2us.The in-phase input end of the second comparator 505 is used for receiving a 3rd reference signal VREF3.In one embodiment, VREF3=0.95VREF1.In other embodiments, VREF3 may have other suitable relative value.The end of oppisite phase receiving feedback signals VFB of the second comparator 505.Or door 506 has two inputs, receive respectively the control signal HSG of main switch 201, and the output signal of the second comparator 505.Or the output of door 506 is couple to the reset terminal (R end) of trigger 507.The output signal of the Q output of trigger 507 is as dormancy judgement signal SLEEP simultaneously.In another embodiment, dormancy decision circuitry further comprises and door 508, there are two inputs, couple respectively the Q output of trigger 507 and the output of the first comparator 502, with the output signal on the output of door 508 as dormancy judgement signal SLEEP.
In certain embodiments, the offset voltage Voffset1 of the first skew direct voltage source OFFSET1 is greater than the offset voltage Voffset2 of the second skew direct voltage source OFFSET2.In one embodiment, Voffset1 is set as 50mV, and Voffset2 is set as 15mV.
In the illustrated embodiment, the condition that dormancy decision circuitry judgement system enters resting state is: the power switch Close All in (1) switch power converter system; (2) potential difference between triangular signal VRAMP and error amplification signal EAO is more than or equal to the second skew direct voltage Voffset2, and continue first time of delay td.
The condition that dormancy decision circuitry judgement system is left resting state is: the arbitrary power switch conducting in (1) switch power converter system; Or (2) feedback signal VFB is less than the 3rd reference signal VREF3.
In this area, having average technical staff should understand, and in other embodiments, dormancy decision circuitry 409 judgement systems enter and leave the condition of resting state and condition that clamp circuit 408 carries out clamp may be different from illustrated embodiment.In this area, have average technical staff and it is also understood that, in other embodiments, the embodiment of the circuit structure of dormancy decision circuitry 409 and clamp circuit 408 shown in may being different from above, to realize different dormancy Rule of judgment and clamp condition.Fig. 6 A, Fig. 6 B, Fig. 6 C and Fig. 6 D show the circuit diagram of some alternative embodiments of dormancy decision circuitry 409.For example, in an embodiment shown in Fig. 6 A, dormancy decision circuitry 409 can save the second comparator 505 and or door 506, and directly by the control signal HSG of main switch 201, controlled the reset terminal of trigger 507.In another embodiment shown in Fig. 6 B, dormancy decision circuitry 409 may further comprise an inverter 609, and the input of this inverter 609 couples and receives dormancy judgement signal SLEEP, and output is couple to or the input of door 506.And or door 506 input no longer receive main switch signal HSG.In the another embodiment shown in Fig. 6 C, dormancy decision circuitry 409 may not comprise and door 508, and by the output signal of the Q output of trigger 507 directly as dormancy judgement signal.In the embodiment again shown in Fig. 6 D, the output of NOR gate 503 may be couple to or door 506 input by an inverter 610, replaces HSG signal.
Fig. 7 shows the work wave schematic diagram under underload according to switch power converter system 40 in Fig. 5 of an embodiment of the present utility model.Below in conjunction with Fig. 7, the operation principle of switch power converter system 40 is described.As shown in Figure 7, under underload, system works is in discontinuous current mode.At K1 constantly, error amplification signal EAO contacts triangular signal VRAMP, makes PWM comparator 210 to timer 211 output short pulses (Pulse).The constant on-time control signal TON of timer 211 outputs uprises and continues the ton time.Now, main switch 201 conductings, synchronous rectification switch 202 turn-offs, switching signal SW=VIN, the capacitor C c1 in RC network 208 is recharged, and triangular signal VRAMP rises.VOUT and VFB rise simultaneously, and VFB>VREF1 also makes error amplification signal EAO rise.At K2 constantly, constant on-time finishes, TON step-down, and main switch 201 turn-offs, synchronous rectification switch 202 conductings, switching signal SW=0, capacitor C c1 starts electric discharge, and triangular signal VRAMP declines.Equally, the impact that declined by VFB, error amplification signal EAO also starts to decline.At K3 constantly, the current reduction on outputting inductance 203 is to zero, and system enters discontinuous current mode, and main switch 201 and synchronous rectification switch 202 turn-off simultaneously.Now, HZ signal is high, and the first comparator 502 in dormancy decision circuitry 409 is enabled.On the other hand, main switch 201 and synchronous rectification switch 202 turn-off and also make switching signal SW=VOUT simultaneously.Triangular signal VRAMP remains on VOUT.At K3, after the moment, along with output capacitance 204 is gradually to load discharge, VOUT slowly declines with a lower speed, so VRAMP also slowly declines.Error amplification signal EAO has occurred declining more rapidly to the amplification of the decline of VFB due to the mutual conductance gm of error amplifier 206, and this widens the gap between triangular signal VRAMP and error amplification signal EAO gradually.To the K4 moment, the potential difference between triangular signal VRAMP and error amplification signal EAO reaches Voffset2, the first comparator 502 output high level in dormancy decision circuitry 409.After anti-spike delay circuit 504 delay td the first time of delay, at K5 constantly, trigger 507 overturns, and makes dormancy judgement signal SLEEP become high level.Switch S 1 closure in clamp circuit 408 now.But due to VRAMP-EAO<Voffset1, clamp circuit 408 is clamp EAO not still.Arrived K6 constantly, error amplification signal EAO continues to decline, and enlarges to Voffset1 with the potential difference of triangular signal VRAMP, and now operational amplifier 501 output actions are managed M2 in MOSFET, make current source I1 to capacitor C COMP charging, stop error amplification signal EAO to continue to decline.Afterwards, error amplification signal EAO is clamped on than on the current potential of the low Voffset1 of triangular signal VRAMP.
After error amplification signal EAO is by clamp, VFB continues slow decreasing, to K7 constantly, VFB=VREF1, VFB keeps downward trend afterwards, and error amplifier 206 starts capacitor C COMP to charge, clamp circuit 408 stops clamp error amplification signal EAO, and error comparison signal EAO starts to rise.Because the gap between VFB and VREF1 constantly widens, the charging current of 206 couples of capacitor C COMP of error amplifier is constantly increased, error amplification signal EAO can continue to accelerate to rise.Finally, error amplification signal EAO touches triangular signal VRAMP constantly at K8, and main switch 201 is open-minded, and switch power converter system 40 enters next cycle.After main switch 201 is opened, signal HSG resets the trigger 507 in dormancy decision circuitry 409, and the judgement of dormancy simultaneously signal SLEEP returns low level, and the switch S 1 of clamp circuit 408 is turn-offed, and clamp circuit 408 quits work and avoids energy loss.
During error amplification signal EAO is by clamping device, when generation load current rises to saltus step, VFB can decline rapidly.When feedback signal VFB=VREF3, the second comparator 505 output high level, make or door 506 output high level reset flip-flops 507.Sleep signal SLEEP becomes the switch S 1 that low level is turn-offed clamp circuit 408.Clamp circuit 408 stops clamp EAO.Because the potential difference of now EAO and VRAMP is apart from only there being Voffset1, so EAO can rise to VRAMP in the short period of time, makes switch power converter system 40 enter rapidly next cycle, improved transient response ability.
About foregoing, obviously a lot of other remodeling of the present utility model and change are also feasible.Here should be understood that in the protection range of containing at the claims of enclosing, the utility model can be applied not to be had specifically described technology herein and implements.Certainly it is also to be understood that, because foregoing only relates to preferred embodiment of the present utility model, so can also carry out much remodeling, do not depart from spirit of the present utility model and protection range that the claim of enclosing contains.Due to disclosed be only preferred embodiment, those of ordinary skills can infer different remodeling and not depart from by the defined spirit of the present utility model of the claim of enclosing and protection range.
Claims (15)
1. a switch power converter system, is characterized in that, described switch power converter system comprises:
Switch power converter, has power switch, by turning on and off of described power switch, an input voltage is converted to an output voltage, and the switch of described power switch and shutoff produce a switching signal;
Feedback circuit, receives described output voltage, generates feedback signal;
Error amplifying circuit, is couple to described feedback circuit, and smaller value and described feedback signal according in first reference signal and a soft switching signal, produce described error amplification signal;
Triangular signal generator based, be couple to described switch power converter, according to described soft switching signal, second reference signal, described switching signal and described output voltage, produce a triangular signal;
Constant on-time control circuit, be couple to described error amplifying circuit and described triangular signal generator based, receive described error amplification signal and described triangular signal, generate constant on-time control signal, for controlling the described power switch of described switch power converter;
Wherein said triangular signal has direct current biasing, and described direct current biasing is relevant with the smaller value in described soft switching signal and described the second reference signal.
2. switch power converter system as claimed in claim 1, is characterized in that:
Described switch power converter further comprises soft switch signal generator, and when described switch power converter system starts, described soft switch signal generator produces described soft switching signal;
Described constant on-time control circuit comprises:
PWM comparator, wherein, described PWM comparator has in-phase input end, inverting input and output, described in-phase input end and described inverting input receive respectively described error amplification signal and described triangular signal; With
Timer, is couple to the output of described PWM comparator, according to the output signal of described PWM comparator, at the output of timer, produces described constant on-time control signal.
3. switch power converter system as claimed in claim 1, it is characterized in that, described triangular signal generator based first resistance that comprises, the second resistance, the first electric capacity and voltage follower, wherein, the first end of described the first resistance receives described switching signal, the second end is couple to the first end of described the second resistance, the two ends of described the first electric capacity couple respectively the output voltage of described switch power converter and the second end of described the first resistance, described voltage follower has two in-phase input ends, an inverting input and an output, wherein said two in-phase input ends are couple to respectively described soft switching signal and described the second reference signal, the output of described inverting input and described voltage follower couples, the output of described voltage follower is further couple to the second end of described the second resistance, the signal of described second resistance the second end is as described triangular signal.
4. switch power converter system as claimed in claim 1, is characterized in that, described the second reference signal equals described the first reference signal.
5. switch power converter system as claimed in claim 1, is characterized in that, described switch power converter system further comprises:
Dormancy decision circuitry, exports a dormancy judgement signal, for judging that whether described switch power converter system is in resting state; With
Clamp circuit, couple described dormancy decision circuitry, described triangular signal generator based and described error amplifying circuit, when described dormancy judgement signal judges that described switch power converter system is resting state, according to described triangular signal and described error amplification signal, decide described error amplification signal is carried out to clamp.
6. switch power converter system as claimed in claim 5, is characterized in that:
The condition that described clamp circuit carries out clamp to described error amplification signal is: described dormancy judgement signal designation system is in entering resting state; And the potential difference between described error amplification signal and described triangular signal reaches the first skew direct voltage;
Described dormancy judgement signal judges that the condition of described switch power converter system in resting state is: the described power switch Close All in described switch power converter system; With the potential difference between described triangular signal and described error amplification signal is more than or equal to the second skew direct voltage, and continued for the first time of delay; And
Described dormancy judgement signal judges that the condition that described switch power converter system is left resting state is: the arbitrary power switch conducting in described switch power converter system; Or described feedback signal is less than the 3rd reference signal.
7. switch power converter system as claimed in claim 6, is characterized in that, described the first skew direct voltage is greater than described the second skew direct voltage.
8. switch power converter system as claimed in claim 6, is characterized in that, described the 3rd reference signal is 0.95 times of described the first reference signal.
9. switch power converter system as claimed in claim 5, is characterized in that, described clamp circuit comprises:
The first skew direct voltage source, the anode of described the first skew direct voltage source is couple to described triangular signal generator based output and receives described triangular signal;
Operational amplifier, in-phase input end is couple to the negative terminal of described the first skew direct voltage source, and inverting input is couple to and receives described error amplification signal;
The first switch, the control end of described the first switch receives described dormancy judgement signal, the closed or disconnection according to described dormancy judgement signal deciding;
Current source, anode is couple to system power supply voltage by described the first switch; With
MOSFET pipe, the grid of described MOSFET pipe is couple to the output of described operational amplifier, and described current source negative terminal is couple to the drain electrode of described MOSFET pipe, and the source electrode of described MOSFET pipe is couple to described error amplifying circuit.
10. switch power converter system as claimed in claim 5, is characterized in that, described dormancy decision circuitry comprises:
The second skew direct voltage source, the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal;
The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and inverting input is couple to the anode of described the second skew direct voltage source;
NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue;
Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator; And
Trigger, there is set end, reset terminal and output, described set end is couple to the output of described anti-spike delay circuit, described reset terminal couples the control signal that receives described switch power converter system main switch, and the output signal of described output is as described dormancy judgement signal.
11. switch power converter systems as claimed in claim 5, is characterized in that, described dormancy decision circuitry comprises:
The second skew direct voltage source, the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal;
The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and inverting input is couple to the anode of described the second skew direct voltage source;
NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue;
Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator;
The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal;
Or door, there are two inputs, the control signal of receiving key power supply changeover device system main switch, and the output signal of described the second comparator respectively; And
Trigger, has set end, reset terminal and output, and described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door, and the output signal of described output is as described dormancy judgement signal.
12. switch power converter systems as claimed in claim 5, is characterized in that, described dormancy decision circuitry comprises:
The second skew direct voltage source, the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal;
The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein said in-phase input end is couple to described triangular signal generator based output and receives triangular signal, and described inverting input is couple to the anode of described the second skew direct voltage source;
NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue;
Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator;
The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal;
Or door, there are two inputs, the control signal of receiving key power supply changeover device system main switch, and the output signal of described the second comparator respectively;
Trigger, has set end, reset terminal and output, and described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door; And
With door, there are two inputs, couple respectively the output of described trigger and the output of described the first comparator, the output signal on the output of described and door is as described dormancy judgement signal.
13. switch power converter systems as claimed in claim 5, is characterized in that, described dormancy decision circuitry comprises:
The second skew direct voltage source, the negative terminal of described the second skew direct voltage source is couple to the output of described error amplifying circuit, receives described error amplification signal;
The first comparator, there is an in-phase input end, an inverting input, an Enable Pin and an output, wherein said in-phase input end is couple to described triangular signal generator based output and receives described triangular signal, and described inverting input is couple to the anode of described the second skew direct voltage source;
NOR gate, input receives the control signal of each power switch in described switch power converter system, and output is couple to the Enable Pin of described the first comparator, output dormancy cue;
Anti-spike delay circuit, input is coupled to the output of described the first comparator, for by the first time of delay of the output delay of described the first comparator;
The second comparator, the in-phase input end of described the second comparator receives the 3rd reference signal, and end of oppisite phase receives described feedback signal;
Or door, thering are two inputs, first input end receives the output signal of described the second comparator;
Trigger, has set end, reset terminal and output, and described set end is couple to the output of described anti-spike delay circuit, and described reset terminal is couple to output described or door;
With door, there are two inputs, couple respectively the output of described trigger and the output of described the first comparator, the output signal on the output of described and door is as described dormancy judgement signal; And
Inverter, the input of described inverter is couple to output described and door, and the output of described inverter is couple to the second input described or door.
14. 1 kinds of switch power controllers, the power switch generation switching signal for control switch power supply changeover device, converts an input voltage to an output voltage, it is characterized in that, and described switch power controller comprises:
Feedback circuit, receives described output voltage, generates feedback signal;
Error amplifying circuit, is couple to described feedback circuit, according to the smaller value in the first reference signal and soft switching signal and described feedback signal, produces described error amplification signal;
Triangular signal generator based, be couple to described switch power converter, according to described soft switching signal, the second reference signal, described switching signal and described output voltage, produce a triangular signal; And
Constant on-time control circuit, be couple to described error amplifying circuit and described triangular signal generator based, receive described error amplification signal and described triangular signal, generate constant on-time control signal, for controlling the described power switch of described switch power converter;
The direct current biasing of wherein said triangular signal is relevant with the smaller value in described soft switching signal and described the second reference signal.
15. switch power controllers as claimed in claim 14, is characterized in that, described switch power controller further comprises:
Dormancy decision circuitry, exports a dormancy judgement signal, for judging that whether described switch power converter is in resting state; With
Clamp circuit, couple described dormancy decision circuitry, described triangular signal generator based and described error amplifying circuit, when described dormancy judgement signal is judged as resting state, according to described triangular signal and described error amplification signal, decide described error amplification signal is carried out to clamp.
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| CN201320489887.6U CN203445776U (en) | 2013-08-12 | 2013-08-12 | switching power converter system and control circuit thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103401400A (en) * | 2013-08-12 | 2013-11-20 | 成都芯源系统有限公司 | switching power converter system and control circuit and control method thereof |
| CN110165875A (en) * | 2019-06-26 | 2019-08-23 | 绍兴光大芯业微电子有限公司 | Realize the circuit and corresponding driving method of constant on-time control model |
-
2013
- 2013-08-12 CN CN201320489887.6U patent/CN203445776U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103401400A (en) * | 2013-08-12 | 2013-11-20 | 成都芯源系统有限公司 | switching power converter system and control circuit and control method thereof |
| CN103401400B (en) * | 2013-08-12 | 2016-01-13 | 成都芯源系统有限公司 | Switching power converter system and control circuit and control method thereof |
| CN110165875A (en) * | 2019-06-26 | 2019-08-23 | 绍兴光大芯业微电子有限公司 | Realize the circuit and corresponding driving method of constant on-time control model |
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