CN203407099U - Alignment monitor structure for layers of PCBs - Google Patents

Alignment monitor structure for layers of PCBs Download PDF

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Publication number
CN203407099U
CN203407099U CN201320480540.5U CN201320480540U CN203407099U CN 203407099 U CN203407099 U CN 203407099U CN 201320480540 U CN201320480540 U CN 201320480540U CN 203407099 U CN203407099 U CN 203407099U
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CN
China
Prior art keywords
pcb board
alignment
level
pcb
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201320480540.5U
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Chinese (zh)
Inventor
刘慧民
董成权
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dongguan Somacis Graphic PCB Co Ltd
Original Assignee
Dongguan Somacis Graphic PCB Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongguan Somacis Graphic PCB Co Ltd filed Critical Dongguan Somacis Graphic PCB Co Ltd
Priority to CN201320480540.5U priority Critical patent/CN203407099U/en
Application granted granted Critical
Publication of CN203407099U publication Critical patent/CN203407099U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

The utility model relates to the field of PCB technology, and specially relates to an alignment monitor structure for layers of PCBs. The alignment monitor structure comprises a plurality of layers of PCBs, the edge of each PCB is provided with a plurality of aligning blocks correspondingly, the aligning blocks are extended out of the trim line of each PCB, and a plurality of aligning blocks are distributed at the side edges of two opposite corners of each PCB. According to the alignment monitor structure, each PCB is provided with aligning blocks, the alignment of each PCB is rapidly monitored, unqualified products with unqualified interlayer alignment is rapidly and accurately detected, and defective products are prevented from flowing to a client, operation of the monitor structure is simple, no extra alignment test equipment is required, and costs are reduced.

Description

Each level to level alignment degree monitoring structure of pcb board
technical field:
The utility model relates to PCB technical field, relates in particular to each level to level alignment degree monitoring structure of a kind of pcb board.
background technology:
PCB(Printed Circuit Board, printed circuit board (PCB)) be important electronic unit, be the supporter of electronic devices and components, be the supplier of electronic devices and components electrical connection.At present, along with the fast development of PCB industry, its application is also more and more extensive.Electronic equipment is little arrives greatly computer, communication electronic device, military armament systems to electronic watch, calculator, general-purpose computer, as long as there are the electronic devices and components such as integrated circuit, the electric interconnection between them all will be used PCB.At present, a lot of pcb boards are to be formed by multi-layer PCB board pressing, and pcb board is had relatively high expectations to each level to level alignment degree, and interlayer skew requires to be no more than 0.1mm.In existing PCB manufacture process, pcb board itself does not have Aligning degree monitoring structure, general employing produced 4 external Aligning degree test modules monitoring Aligning degrees of plate plate angle placement, troublesome poeration, Aligning degree is not easy to control, once test module just damage cannot effective monitoring to the Aligning degree situation of each unit in production plate.
utility model content:
The purpose of this utility model is exactly for the deficiency of prior art existence, to provide a kind of can monitor the Aligning degree between each layer of pcb board, easy to operate each level to level alignment degree monitoring structure of pcb board.
To achieve these goals, the technical solution adopted in the utility model is:
Each level to level alignment degree monitoring structure of pcb board, it includes multi-layer PCB board, and on the limit of every layer of pcb board, all correspondence is distributed with a plurality of alignment blocks.
Described alignment block extends the object line of every layer of pcb board.
At least two limits of every layer of pcb board are distributed with alignment block.
Preferably, described a plurality of alignment block is distributed in the lateral location at two angles that pcb board is relative.
Preferably, be distributed with two alignment blocks on every layer of pcb board, two alignment blocks are distributed in respectively on a side at two angles that pcb board is relative.
More preferably, on every layer of pcb board, be distributed with four alignment blocks, on the dual-side at two angles that pcb board is relative, be respectively distributed with an alignment block.
Every layer of pcb board forms alignment block by etching mode.
The utility model beneficial effect is: the utility model includes multi-layer PCB board, on the limit of every layer of pcb board, all correspondence is distributed with a plurality of alignment blocks, the utility model by arranging alignment block on every layer of pcb board, can be effectively, the Aligning degree situation between each layer of pcb board of Fast Monitoring, after completing, pcb board can find fast and accurately the defective item that level to level alignment degree exceeds standard, prevent that defective products is lost to client, this monitoring structure is simple to operation, do not need optional equipment Aligning degree testing equipment, save cost.
accompanying drawing explanation:
Fig. 1 is structural representation of the present utility model.
Fig. 2 is decomposing schematic representation of the present utility model.
embodiment:
Below in conjunction with accompanying drawing, the utility model is further described, sees shown in Fig. 1 ~ 2, each level to level alignment degree monitoring structure of pcb board, it includes multi-layer PCB board 1, and on the limit of every layer of pcb board 1, all correspondence is distributed with a plurality of alignment blocks 2.
Every layer of pcb board 1 forms alignment block 2 by etching mode, and easy to process, cost is low.Alignment block 2 extends the object line 11 of every layer of pcb board 1, the copper alignment block 2 of the pcb board rear dew of the complete object line 11 of 1 milling, convenient monitoring Aligning degree.
1 at least two limit of every layer of pcb board is distributed with alignment block 2, aims at accurately.A plurality of alignment blocks 2 are distributed in the lateral location at two angles that pcb board 1 is relative, and it is convenient to aim at.Can be on every layer of pcb board 1, to be distributed with 2, two alignment blocks 2 of two alignment blocks to be distributed in respectively on a side at two angles that pcb board 1 is relative; Also can be on every layer of pcb board 1, to be distributed with four alignment blocks 2, respectively be distributed with an alignment block 2 on the dual-side at two angles that pcb board 1 is relative, it be more accurate to locate.
The utility model by arranging alignment block 2 on every layer of pcb board 1, can be effectively, the Aligning degree situation between each layer of pcb board of Fast Monitoring, after completing, pcb board 1 can find fast and accurately the defective item that level to level alignment degree exceeds standard, prevent that defective products is lost to client, this monitoring structure is simple to operation, do not need optional equipment Aligning degree testing equipment, save cost.
Certainly, the above is only preferred embodiment of the present utility model, and the equivalence of doing according to structure, feature and principle described in the utility model patent claim therefore all changes or modifies, and is included in the utility model patent claim.

Claims (7)

  1. Each level to level alignment degree monitoring structure of 1.PCB plate, includes multi-layer PCB board (1), it is characterized in that: on the limit of every layer of pcb board (1), all correspondence is distributed with a plurality of alignment blocks (2).
  2. 2. each level to level alignment degree monitoring structure of pcb board according to claim 1, is characterized in that: described alignment block (2) extends the object line of every layer of pcb board (1).
  3. 3. each level to level alignment degree monitoring structure of pcb board according to claim 1, is characterized in that: (1) at least two limit of every layer of pcb board is distributed with alignment block (2).
  4. 4. each level to level alignment degree monitoring structure of pcb board according to claim 1, is characterized in that: described a plurality of alignment blocks (2) are distributed in the lateral location at two angles that pcb board (1) is relative.
  5. 5. each level to level alignment degree monitoring structure of pcb board according to claim 1, is characterized in that: on every layer of pcb board (1), be distributed with two alignment blocks (2), two alignment blocks (2) are distributed in respectively on a side at two angles that pcb board (1) is relative.
  6. 6. each level to level alignment degree monitoring structure of pcb board according to claim 1, is characterized in that: on every layer of pcb board (1), be distributed with four alignment blocks (2), be respectively distributed with an alignment block (2) on the dual-side at two angles that pcb board (1) is relative.
  7. 7. according to each level to level alignment degree monitoring structure of the pcb board described in claim 1 ~ 6 any one, it is characterized in that: every layer of pcb board (1) forms alignment block (2) by etching mode.
CN201320480540.5U 2013-08-07 2013-08-07 Alignment monitor structure for layers of PCBs Expired - Fee Related CN203407099U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201320480540.5U CN203407099U (en) 2013-08-07 2013-08-07 Alignment monitor structure for layers of PCBs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201320480540.5U CN203407099U (en) 2013-08-07 2013-08-07 Alignment monitor structure for layers of PCBs

Publications (1)

Publication Number Publication Date
CN203407099U true CN203407099U (en) 2014-01-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201320480540.5U Expired - Fee Related CN203407099U (en) 2013-08-07 2013-08-07 Alignment monitor structure for layers of PCBs

Country Status (1)

Country Link
CN (1) CN203407099U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104254210A (en) * 2014-09-19 2014-12-31 江西景旺精密电路有限公司 Manufacturing method capable of preventing PCB (Printed Circuit Board) with layer sequence error from flowing into process after edge milling and PCB
CN107241851A (en) * 2016-03-29 2017-10-10 北大方正集团有限公司 The detection method and multilayer circuit board of the level to level alignment degree of multilayer circuit board
CN113686898A (en) * 2021-08-24 2021-11-23 悦虎晶芯电路(苏州)股份有限公司 Method for monitoring copper leakage during forming edge milling

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104254210A (en) * 2014-09-19 2014-12-31 江西景旺精密电路有限公司 Manufacturing method capable of preventing PCB (Printed Circuit Board) with layer sequence error from flowing into process after edge milling and PCB
CN104254210B (en) * 2014-09-19 2017-11-07 江西景旺精密电路有限公司 Pcb board and the preparation method for preventing layer sequence error from flowing into process after milling side
CN107241851A (en) * 2016-03-29 2017-10-10 北大方正集团有限公司 The detection method and multilayer circuit board of the level to level alignment degree of multilayer circuit board
CN107241851B (en) * 2016-03-29 2019-05-28 北大方正集团有限公司 The detection method and multilayer circuit board of the level to level alignment degree of multilayer circuit board
CN113686898A (en) * 2021-08-24 2021-11-23 悦虎晶芯电路(苏州)股份有限公司 Method for monitoring copper leakage during forming edge milling

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140122

Termination date: 20150807

EXPY Termination of patent right or utility model