CN203396904U - Transistor function test device - Google Patents
Transistor function test device Download PDFInfo
- Publication number
- CN203396904U CN203396904U CN201320443994.5U CN201320443994U CN203396904U CN 203396904 U CN203396904 U CN 203396904U CN 201320443994 U CN201320443994 U CN 201320443994U CN 203396904 U CN203396904 U CN 203396904U
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- transistor
- resistance
- solder joint
- solder joints
- solder
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Abstract
The utility model discloses a transistor function test device. The transistor function test device comprises: a substrate on which a plurality of solder joint groups are arranged, wherein each solder joint group comprises two solder joints, and a distance exists between the two solder joints; a plurality of resistors, wherein two ends of each resistor are soldered between the two solder joints of the solder joint group; connecting wires, wherein one end of each connecting wire is soldered onto the solder joints, the other end of the connecting wire is provided with a clamping element, and the clamping elements are used to clamp pins of the transistor correspondingly; and a direct-current power source comprising two power outlet groups, wherein each power outlet group comprises two power outlets for outputting the positive electrode and the negative electrode respectively. The resistors are soldered and fixed onto the substrate, and the gate pin, the source pin and the drain pin of the transistor and the resistors are connected through the clamping elements, and the soldering process does not need to be performed, so not only printed circuit boards which are suitable for corresponding transistors do not need to be provided, and but also the problem that the SMT cannot be performed due to poor transistor functional parameters after the high-temperature soldering process can be avoided.
Description
[technical field]
The utility model relates to a kind of proving installation, particularly relates to a kind of transistor function proving installation.
[background technology]
Transistor (for example SO-8, SOT363, SOT23, SOT-113, TO92) generally need to carry out testing authentication, normal to verify its function.Take SO-8 as example, and it comprises a G utmost point (grid) pin, three S utmost points (source electrode) pin, four D utmost points (source electrode) pin.
Refer to Fig. 1, Fig. 1 is a circuit diagram of transistor function test.This functional test is the resistance R between test source electrode and drain electrode
dS, this circuit need to be connected in series the first power supply 11 and the first resistance 12 between the source electrode of transistor 10 and drain electrode, between the grid of transistor 10 and drain electrode, is connected in series second source 13 and the second resistance 14.
Refer to Fig. 2, Fig. 2 illustrates the connection diagram in kind into Fig. 1 transistor function test circuit.As shown in the figure, four drain lead of described transistor 10, three source lead, a gate lead are welded in printed-wiring board (PWB) 18(by the first solder joint 15, the second solder joint 16, the 3rd solder joint 17 respectively and conventionally utilize the wiring board of scrapping) on, direct supply 19 provides above-mentioned the first power supply 11 and second source 13, then connects to form the circuit in Fig. 1 by wire.One end of described wire is welded on described the first solder joint 15, the second solder joint 16, the 3rd solder joint 17, and the other end connects described the first resistance 12, the second resistance 14 or described direct supply 19.
Yet the test circuit that adopts aforesaid way to connect, because being is welded on described transistor 10 on printed-wiring board (PWB) 18.On the one hand, need to provide the printed-wiring board (PWB) 18 that can weld accordingly described transistor 10; On the other hand, high-temperature soldering easily causes the functional parameter of transistor 10 bad, the transistor after high-temperature soldering 10 generally can not carry out SMT again or scrap.
In view of this, be necessary to develop a kind of transistor function proving installation in fact, to address the above problem.
[summary of the invention]
Therefore, the purpose of this utility model is to provide a kind of transistor function proving installation, need to provide and be applicable to the printed-wiring board (PWB) of respective transistor and test the problem that rear described transistor function parameter is bad, can not carry out SMT or scrap again while solving transistor function test.
In order to achieve the above object, the transistor function proving installation that the utility model provides, comprising:
Substrate, which is provided with several solder joint group, and described in each, solder joint group has two solder joints, between described two solder joints, has spacing;
Some resistance, each described resistance two ends are welded between two solder joints of described solder joint group;
Connection wire ，Qi one end is welded on described solder joint, the other end has holder, the described transistorized pin of the corresponding clamping of described holder;
Direct supply, has two power output groups, and described in each, power output group has two power outputs, respectively output cathode and negative pole.
Optionally, described direct supply has power supply and connects wire, and described power supply connection wire one end is fixedly connected on described power output, the other end has output holder.
Optionally, the resistance of resistance for the corresponding described transistor testing of the resistance of described resistance.
Compared to prior art, utilize transistor function proving installation of the present utility model, when using, only need according to the required resistance of test, on described substrate, select resistance, the holder on the connection wire at selected resistance two ends is connected to respectively on the power output of described transistorized gate lead, source lead, drain lead or described direct supply according to test circuit figure.Because being is fixed on resistance welded on substrate, and being connected between described transistorized gate lead, source lead, drain lead and resistance is to complete by holder, need not weld, therefore the printed-wiring board (PWB) that is applicable to respective transistor both need not be provided, avoid again after high-temperature soldering after described transistor function parameter bad, can not carry out again the problem of SMT.
[accompanying drawing explanation]
Fig. 1 is a circuit diagram of transistor function test.
Fig. 2 illustrates the connection diagram in kind into Fig. 1 transistor function test circuit.
Fig. 3 illustrates the partial structurtes schematic diagram into transistor function proving installation one preferred embodiment of the present utility model.
Fig. 4 illustrates the apparatus structure schematic diagram into transistor function proving installation one preferred embodiment of the present utility model.
[embodiment]
Please jointly consult Fig. 3, Fig. 4, partial structurtes schematic diagram, Fig. 4 that Fig. 3 illustrates as transistor function proving installation one preferred embodiment of the present utility model illustrate the apparatus structure schematic diagram into transistor function proving installation one preferred embodiment of the present utility model.
In order to achieve the above object, the transistor function proving installation that the utility model provides, in the present embodiment, it comprises:
Some resistance 22, each described resistance 22 two ends are welded in 21 of two solder joints of described solder joint group;
Connection wire ，Qi one end is welded on described solder joint 21, the other end has holder 23, the pin of the described transistor 10 of described holder 23 corresponding clamping;
Direct supply 24, has two power output groups, and described in each, power output group has two power outputs 25, respectively output cathode and negative pole.
Wherein, described direct supply 24 has power supply and connects wire, and described power supply connection wire one end is fixedly connected on described power output 25, the other end has output holder 26.
Wherein, the resistance of resistance for corresponding described transistor 10 tests of the resistance of described resistance 22.
Please, again in conjunction with consulting Fig. 1, this sentences the resistance R between described transistor 10 source electrodes of test and drain electrode
dSfor example, the resistance Qu10 Europe of described resistance 22 and 1 kilo-ohm.
Herein, described transistor 10 is to take SO-8 as example, and the transistor 10(of other type is SOT363, SOT23, SOT-113, TO92 for example) also can use above-mentioned proving installation.
Compared to prior art, utilize transistor function proving installation of the present utility model, when using, only need according to the required resistance of test, on described substrate 20, select resistance 22, the holder 23 on the connection wire at selected resistance 22 two ends is connected to respectively according to test circuit figure on the power output 25 of gate lead, source lead, drain lead or described direct supply 24 of described transistor 10.Because being is weldingly fixed on resistance 22 on substrate 20, and being connected between the gate lead of described transistor 10, source lead, drain lead and resistance 22 is to complete by holder 23, need not weld, therefore the printed-wiring board (PWB) that is applicable to respective transistor 10 both need not be provided, avoid again after high-temperature soldering after described transistor 10 functional parameters bad, can not carry out again the problem of SMT.
Claims (3)
1. a transistor function proving installation, is characterized in that, comprising:
Substrate, which is provided with several solder joint group, and described in each, solder joint group has two solder joints, between described two solder joints, has spacing;
Some resistance, each described resistance two ends are welded between two solder joints of described solder joint group;
Connection wire ，Qi one end is welded on described solder joint, the other end has holder, the described transistorized pin of the corresponding clamping of described holder;
Direct supply, has two power output groups, and described in each, power output group has two power outputs, respectively output cathode and negative pole.
2. transistor function proving installation as claimed in claim 1, is characterized in that, described direct supply has power supply and connects wire, and described power supply connection wire one end is fixedly connected on described power output, the other end has output holder.
3. transistor function proving installation as claimed in claim 1, is characterized in that, the resistance of resistance for the corresponding described transistor testing of resistance of described resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320443994.5U CN203396904U (en) | 2013-07-24 | 2013-07-24 | Transistor function test device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201320443994.5U CN203396904U (en) | 2013-07-24 | 2013-07-24 | Transistor function test device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203396904U true CN203396904U (en) | 2014-01-15 |
Family
ID=49908426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201320443994.5U Expired - Fee Related CN203396904U (en) | 2013-07-24 | 2013-07-24 | Transistor function test device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203396904U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104345256A (en) * | 2013-07-24 | 2015-02-11 | 神讯电脑(昆山)有限公司 | Transistor function testing apparatus |
-
2013
- 2013-07-24 CN CN201320443994.5U patent/CN203396904U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104345256A (en) * | 2013-07-24 | 2015-02-11 | 神讯电脑(昆山)有限公司 | Transistor function testing apparatus |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140115 Termination date: 20180724 |