CN203373143U - Ultra-thin MEMS chip packaged in vacuum mode - Google Patents

Ultra-thin MEMS chip packaged in vacuum mode Download PDF

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Publication number
CN203373143U
CN203373143U CN201320405107.5U CN201320405107U CN203373143U CN 203373143 U CN203373143 U CN 203373143U CN 201320405107 U CN201320405107 U CN 201320405107U CN 203373143 U CN203373143 U CN 203373143U
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China
Prior art keywords
layer
ultra
mems chip
substrate layer
vacuum package
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Withdrawn - After Issue
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CN201320405107.5U
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Chinese (zh)
Inventor
付世
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Senodia Technologies Shanghai Co Ltd
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Senodia Technologies Shanghai Co Ltd
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Abstract

The utility model discloses an ultra-thin MEMS chip packaged in a vacuum mode. The ultra-thin MEMS chip comprises a substrate layer, a structural layer and a sealing cover layer. The structural layer is electrically connected with the substrate layer through structural anchor points, and the sealing cover layer and the substrate layer are packaged into a whole through glass paste. According to the ultra-thin MEMS chip packaged in the vacuum mode, effect on device performance caused by stress generated in the high vacuum packaging process is reduced. The electric connection and sensor structure is manufactured through machining of the two faces of the structural layer, and too much stress effect will not be caused due to the fact that physical machining is performed on only one layer of silicon material.

Description

A kind of ultra-thin MEMS chip of Vacuum Package
Technical field
The utility model relates to a kind of chip processing method, relates in particular to a kind of ultra-thin MEMS chip processing method of Vacuum Package.
Background technology
Along with the function of the intelligent network terminals such as smart mobile phone, panel computer is more and more abundanter, the quantity of its integrated sensor kind is also more and more, thus, also more and more stricter to the dimensional requirement of various sensors.In addition, for minisize gyroscopes, stable high vacuum encapsulation is also one of problem that must think better of in R&D process.
Usually, the MEMS gyroscope mainly is comprised of three part-structures, i.e. substrate layer, sensor construction layer and capping layer, and the thickness after three-decker directly superposes is generally in the 800um left and right, thickness based on after this encapsulation, for the above-mentioned portable product of mentioning, is difficult to meet the demands easily.Simultaneously, due to the limitation of some flow process in some maturation process, one is, because the space between the moving component of substrate and sensor layer is too narrow and small and be difficult to accurate control, causes the three-dimensional motion insufficient space of the moving component of sensor layer; Another is, cause the electromechanical structure design of sensor to be subject to serious constraint, make some important electric connection structure can only be arranged in the periphery of sensor construction, so just can not do according to demand structure arrangement flexibly, the stern challenge that the simplification of the lifting of the reducing of device size, performance and system is all proposed.
The utility model content
The purpose of this utility model is to solve the problems of the prior art, and a kind of ultra-thin MEMS chip of Vacuum Package is provided.
The technical solution of the utility model is: a kind of ultra-thin MEMS chip of Vacuum Package comprises:
Substrate layer, be provided with cabling on the surface of described substrate layer, is provided with a plurality of substrate anchor points, the metal framework for increasing Vacuum Package stability, the electrical connection through hole that makes substrate layer ground connection and external pin on the surface of cabling;
Structure sheaf, fluted in the surface etch of structure sheaf, and arrange a plurality of for the structure anchor point that is electrically connected to the substrate anchor point and for decomposing the support anchor point of external force, scribing alignment mark;
And capping layer, be etched with the capping groove on it, in described capping groove, growth has the silica material layer, at the two ends of capping layer, is provided with patterned glass paste;
Structure sheaf is electrically connected to the substrate anchor point of substrate layer by the structure anchor point, and described capping layer is by glass paste and described substrate layer Vacuum Package one.
Described cabling is the single or multiple lift cabling.
The surface etch of described structure sheaf has the groove that 0~30um is dark.
On described metal framework, figure dissolves the 2*10 μ m of a plurality of rectangular arranged 2aperture.
The utlity model has following beneficial effect:
The stress produced while 1) having reduced the high vacuum encapsulation affects device performance.Make electrical connection and sensor construction by do two-sided processing at structure sheaf, because being all does Physical Processing at one deck silicon materials, therefore, can not produce too much stress influence.
Only need the patterned cabling of one deck at substrate layer, though layout multilayer cabling as required, also can be because of without etched recesses, and avoid increasing device at the too much stress produced after several roads technique, can produce positive effect to the productive rate of sensor itself.
Utilize cheap wet etching technique to make capping layer, and utilize stable glass paste vacuum encapsulation process, capping layer directly is packaged together with substrate layer, greatly improved the success rate encapsulated.
2) reduce the constraint of cabling to the micro electromechanical structure design.In the utility model, the electric connection structure of structure sheaf directly utilizes Jin-Jin eutectic bonding to be directly connected to the position that substrate is corresponding by anchor point, has improved the flexibility of micro electromechanical structure design.
The accompanying drawing explanation
The cutaway view that Fig. 1 is the utility model Plays wafer material;
The cutaway view that Fig. 2 is substrate layer in the utility model;
The top view that Fig. 2 a is metal framework in the utility model;
The cutaway view that Fig. 2 b is substrate layer in the utility model;
Fig. 3 is the cutaway view after substrate layer and structure sheaf bonding in the utility model;
Fig. 4 is the cutaway view after the structure sheaf attenuate after Fig. 3 bonding;
Fig. 5 is that in the utility model, structure sheaf etches the cutaway view after sensor construction;
The structural representation that Fig. 6 is capping layer in the utility model;
Fig. 7 is the dual chip cutaway view after encapsulation in the utility model.
The specific embodiment
For technological means, technical characterictic, utility model purpose and the technique effect that the utility model is realized is easy to understand, below in conjunction with concrete diagram, further set forth the utility model.
As Fig. 6: a kind of ultra-thin MEMS chip of Vacuum Package comprises:
Substrate layer 100, be provided with single or multiple lift cabling 101 on the surface of substrate layer 100, be provided with a plurality of substrate anchor points 102, the metal framework for increasing Vacuum Package stability, the electrical connection through hole that makes substrate layer 100 ground connection and external pin 104 on the surface of cabling 101, on described metal framework, figure dissolves the 2*10 μ m of a plurality of rectangular arranged 2 aperture 103, as shown in Fig. 2,2a;
Structure sheaf 200, have in the surface etch of structure sheaf 200 groove 201 that 0~30um is dark, and arrange a plurality of for the structure anchor point 202 that is electrically connected to substrate anchor point 102 and for decomposing the support anchor point 203 of external force, scribing alignment mark;
And capping layer 300, be etched with capping groove 301 on it, in the interior growth of described capping groove 301, silica material layer 302 is arranged, be provided with patterned glass paste at the two ends of capping layer 300;
Structure sheaf 200 is electrically connected to the substrate anchor point 102 of substrate layer 100 by structure anchor point 202, and capping layer 300 is by glass paste and substrate layer 200 Vacuum Package one.
Ultra-thin its processing method of MEMS chip of a kind of Vacuum Package of the utility model is as follows:
1) choose standard wafer material that thickness the is 400 μ m substrate layer 100 as the MEMS chip, as shown in Figure 1;
2) make individual layer or multilayer cabling 101 by grow one deck silica material layer graphical, deposition of aluminum or copper or gold or germanium layer of thermal oxidation technology on substrate layer 100; and deposit passivation layer protection as required; a plurality of substrate anchor points 102, the metal framework for increasing Vacuum Package stability, the electrical connection through hole that makes substrate layer 100 ground connection and external pin 104 are set on the surface of individual layer or multilayer cabling 101, and on described metal framework, figure dissolves the 2*10 μ m of a plurality of rectangular arranged 2 aperture 103, as shown in Fig. 2,2a;
3) choose standard wafer material that thickness the is 400 μ m structure sheaf 200 as the MEMS chip, deposition of aluminum or copper or gold or germanium layer graphical on structure sheaf 200, then the groove 201 that direct etching 0~30um is dark, and arrange a plurality of for the structure anchor point 202 that is electrically connected to substrate anchor point 102, for decomposing the support anchor point 203 of external force and scribing alignment mark, as shown in Figure 2 b;
4) utilize Jin-Jin eutectic bonding method that above-mentioned substrate layer 100 and structure sheaf 200 are carried out to bonding, during bonding, the substrate anchor point 102 on substrate layer 100 is electrically connected to the structure anchor point 202 on structure sheaf 200, as shown in Figure 3;
5) by structure sheaf 200 by grinding and the CMP(chemically mechanical polishing) it is thinned to required thickness, as shown in Figure 4;
6) utilize DRIE(deep reaction ion) etching etches sensor construction 204 by structure sheaf 200, as shown in Figure 5;
7) choose standard wafer material that thickness the is 400 μ m capping layer 300 as the MEMS chip, utilize wet method or DRIE etching to prepare the groove 301 that capping layer 0~30um is dark, and in groove 301 by thermal oxidation technology growing silicon oxide material layer 302, the correlation technique of recycling serigraphy, glass paste is graphically arrived to capping layer 300, as Fig. 6;
8) the structure device structure 204 of utilizing stable glass paste vacuum encapsulation process that capping layer 300 and step 6) are handled well completes the chip level encapsulation, as Fig. 7;
9) on reserved scribe line 400, scribing obtains one single chip.
The thickness of above selection standard wafer material is that 170 μ m also can manufacture corresponding chip.In the utility model, the selection standard wafer material can be also different-thickness for same thickness as substrate layer, structure sheaf and the capping layer of chip, according to the needs of chip, is selected.
Be only the utility model preferred embodiment in sum, not be used for limiting practical range of the present utility model.Be that all equivalences of doing according to the content of the utility model claim change and modify, all should belong to technology category of the present utility model.

Claims (4)

1. the ultra-thin MEMS chip of a Vacuum Package, is characterized in that, comprising:
Substrate layer, be provided with cabling on the surface of described substrate layer, is provided with a plurality of substrate anchor points, the metal framework for increasing Vacuum Package stability, the electrical connection through hole that makes substrate layer ground connection and external pin on the surface of cabling;
Structure sheaf, fluted in the surface etch of structure sheaf, and arrange a plurality of for the structure anchor point that is electrically connected to the substrate anchor point and for decomposing the support anchor point of external force, scribing alignment mark;
And capping layer, be etched with the capping groove on it, in described capping groove, growth has a silica material layer, in the surrounding of capping layer, is provided with patterned glass paste;
Described structure sheaf is electrically connected to described substrate layer by the structure anchor point, and described capping layer is by glass paste and described substrate layer Vacuum Package one.
2. the ultra-thin MEMS chip of Vacuum Package according to claim 1, it is characterized in that: described cabling is the single or multiple lift cabling.
3. the ultra-thin MEMS chip of Vacuum Package according to claim 1, it is characterized in that: the surface etch of described structure sheaf has the dark groove of 0~30 μ m.
4. the ultra-thin MEMS chip of Vacuum Package according to claim 1, it is characterized in that: on described metal framework, figure dissolves a plurality of evenly distributed 2*10 μ m 2aperture.
CN201320405107.5U 2013-07-08 2013-07-08 Ultra-thin MEMS chip packaged in vacuum mode Withdrawn - After Issue CN203373143U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103359680A (en) * 2013-07-08 2013-10-23 深迪半导体(上海)有限公司 Vacuum-packaged ultrathin MEMS chip and processing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103359680A (en) * 2013-07-08 2013-10-23 深迪半导体(上海)有限公司 Vacuum-packaged ultrathin MEMS chip and processing method thereof
CN103359680B (en) * 2013-07-08 2016-06-01 深迪半导体(上海)有限公司 The ultra-thin MEMS chip of a kind of Vacuum Package and working method thereof

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GR01 Patent grant
AV01 Patent right actively abandoned

Granted publication date: 20140101

Effective date of abandoning: 20160601

C25 Abandonment of patent right or utility model to avoid double patenting