CN203312296U - Array baseplate and display device - Google Patents
Array baseplate and display device Download PDFInfo
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- CN203312296U CN203312296U CN2013203933020U CN201320393302U CN203312296U CN 203312296 U CN203312296 U CN 203312296U CN 2013203933020 U CN2013203933020 U CN 2013203933020U CN 201320393302 U CN201320393302 U CN 201320393302U CN 203312296 U CN203312296 U CN 203312296U
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Abstract
The utility model discloses an array baseplate and a display device. The array substrate comprises a substrate baseplate, and a plurality of thin-film transistor units arranged on the substrate baseplate. The thin-film transistor unit includes: a first gate arranged on the substrate baseplate, a gate insulating layer arranged on the first gate, an active layer arranged on the gate insulating layer and opposite to the first gate, a source electrode and a drain electrode which are arranged on the active layer, and a photosensitive resin passivation layer which is arranged on the source electrode and the drain electrode, wherein a gap is formed between the source electrode and the drain electrode. Compared with the prior art, in the manufacturing process of the array baseplate of the utility model, the channel protective layer process is saved; the production process is greatly simplified; the production cost is effectively reduced; and the product yield rate is improved.
Description
Technical field
The utility model relates to tft liquid crystal Display Technique field, particularly relates to a kind of array base palte and display unit.
Background technology
In panel display apparatus, TFT-LCD(Thin Film Transistor Liquid Crystal Display, Thin Film Transistor-LCD) have that volume is little, low in energy consumption, manufacturing cost is relatively low and characteristics such as radiationless, occupied leading position in current panel display apparatus market.
Because having, the photosensitive resin passivation layer has an even surface, the characteristics of low-k, therefore, in the actual production of TFT-LCD array base palte, usually introduce aperture opening ratio and the display brightness of photosensitive resin passivation layer further to improve the TFT-LCD product, reduce the signal delay of TFT-LCD product, finally improve the competitiveness of product.
ADS(Advanced Super Dimension Switch, a senior super dimension switch technology) pattern is the wide visual angle of plane electric fields core technology, its core technology characteristic description is: the electric field that the electric field produced by gap electrode edge in same plane and gap electrode layer and plate electrode interlayer produce forms multi-dimensional electric field, make in liquid crystal cell between gap electrode, directly over electrode, all aligned liquid-crystal molecules can both produce rotation, thereby improved the liquid crystal operating efficiency and increased light transmission efficiency.The switching technique of ADS pattern can improve the picture quality of TFT-LCD product, has high-resolution, high permeability, low-power consumption, wide visual angle, high aperture, low aberration, without advantages such as water of compaction ripples (push Mura).For different application, the improvement technology of ADS technology has high permeability I-ADS technology, high aperture H-ADS and high-resolution S-ADS technology etc.
As shown in Figure 1, the TFT-LCD array base palte of ADS pattern of take is example, this array base palte comprises: underlay substrate 1, a plurality of film crystal pipe unit and GOA(Gate Driver on Array be positioned on underlay substrate 1, the capable driving of array base palte) unit, usually each figure layer of array base palte all forms by composition technique, and composition technique generally includes mask, exposure, development, etching and the operation such as peels off each time.
Existing array base palte, in manufacture process, after forming the figure of active layer 4, forms the figure of channel protective layer 7 and photosensitive resin passivation layer 8 successively, and therefore, the manufacturing cost of array base palte is higher, and manufacturing process is comparatively complicated, easily causes product defects.
The utility model content
The purpose of this utility model is to provide a kind of array base palte and a kind of display unit, can effectively reduce the manufacturing cost of array base palte, and simplified manufacturing technique widely further improves the yields of product.
In order to achieve the above object, the utility model provides following technical scheme:
A kind of array base palte comprises: underlay substrate and be positioned at a plurality of film crystal pipe units on underlay substrate,
Described film crystal pipe unit comprises: be positioned at the first grid on described underlay substrate, be positioned at the gate insulator on described first grid, be positioned on described gate insulator and the active layer relative with described first grid position, be positioned at source electrode and drain electrode on described active layer, between described source electrode and drain electrode, be provided with gap, and be positioned at the photosensitive resin passivation layer on described source electrode and drain electrode.
Preferably, the array base palte that the utility model provides also comprises: be positioned at the capable driver element of a plurality of array base paltes on described underlay substrate, wherein, the capable driver element of described array base palte comprises: be positioned at the second grid on described underlay substrate, be positioned at the gate insulator on described second grid and be positioned at the metal lead wire on described gate insulator; Described first grid and second grid are positioned at same figure layer, and described metal lead wire and described source electrode and drain electrode are positioned at same figure layer.
Preferably, the array base palte that the utility model provides further comprises: be positioned at the first transparency electrode on described photosensitive resin passivation layer, be positioned on described the first transparency electrode and the second passivation layer of covered substrate, be positioned on described the second passivation layer and have the second transparency electrode of narrow slit structure.
Preferably, described the first transparency electrode is plate electrode or gap electrode.
A kind of display unit, comprise the described array base palte of aforementioned arbitrary technical scheme.
In technical solutions of the utility model; because the photosensitive resin passivation layer is positioned on source electrode and drain electrode; therefore, in the manufacture process of array base palte, after formation comprises the pre-figure of source electrode and drain electrode; saved the manufacture of channel protective layer; in contrast to prior art, effectively reduced the manufacturing cost of array base palte, simplified widely manufacturing process; effectively improve the display brightness of TFT-LCD product, improved the yields of product.
The accompanying drawing explanation
Fig. 1 is the cross section structure schematic diagram (ADS pattern) of existing array base palte;
Fig. 2 be the utility model array base palte one embodiment cross section structure schematic diagram (the ADS pattern of take is example);
Fig. 3 is the schematic flow sheet (the ADS pattern of take is example) of the manufacture method of the utility model array base palte one embodiment;
Fig. 4 is another schematic flow sheet (the ADS pattern of take is example) of the manufacture method of the utility model array base palte one embodiment;
Fig. 5 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of grid in manufacture process after;
Fig. 6 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of active layer in manufacture process after;
Fig. 7 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of gate insulator in manufacture process after;
Fig. 8 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the pre-figure of source electrode and drain electrode in manufacture process after;
Fig. 9 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of photosensitive resin passivation layer in manufacture process after;
Figure 10 is the cross section structure schematic diagram the utility model array base palte one embodiment forms transparent conductive metallic film in manufacture process after;
Figure 11 is that the utility model array base palte one embodiment applies the cross section structure schematic diagram that the photoresist finishing patterns shifts a rear embodiment in manufacture process;
Figure 12 is that the utility model array base palte one embodiment forms the figure of active layer and the cross section structure schematic diagram behind the gap between source electrode and drain electrode in manufacture process;
Figure 13 is the cross section structure schematic diagram the utility model array base palte one embodiment exposes the transparent conductive metallic film at the first transparency electrode slit place in manufacture process after;
Figure 14 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of the figure of active layer and the first transparency electrode in manufacture process after;
Figure 15 is that the utility model array base palte one embodiment applies the cross section structure schematic diagram that the photoresist finishing patterns shifts rear another embodiment in manufacture process;
Figure 16 is the cross section structure schematic diagram the utility model array base palte one embodiment forms the figure of the second passivation layer in manufacture process after.
Reference numeral:
1-underlay substrate 2a-first grid
2b-second grid 3-gate insulator
4-active layer 5-photoresist
The pre-figure 6a-source electrode of 6-source electrode and drain electrode
6b-drain electrode 6c-metal lead wire
7-channel protective layer 8-photosensitive resin passivation layer
9-first transparency electrode 10-the second passivation layer
11-the second transparency electrode
Embodiment
The purpose of this utility model is to provide a kind of array base palte and a kind of display unit; compared with prior art; the photosensitive resin passivation layer of array base palte is positioned on source electrode and drain electrode; in the manufacture process of array base palte; after formation comprises the pre-figure of source electrode and drain electrode, the manufacture of having saved channel protective layer, array base palte of the present utility model can reduce the manufacturing cost of array base palte effectively; simplify widely manufacturing process, effectively improved the yields of product.
As shown in Figure 2, the array base palte that the utility model provides, comprise underlay substrate 1 and be positioned at a plurality of film crystal pipe units on underlay substrate 1, wherein,
The film crystal pipe unit comprises: be positioned at the first grid 2a on underlay substrate 1, be positioned at the gate insulator 3 on first grid 2a, be positioned on gate insulator 3 and the active layer 4 relative with first grid 2a position, be positioned at source electrode 6a and drain electrode 6b on active layer 4, between described source electrode 6a and drain electrode 6b, be provided with gap, and be positioned at the photosensitive resin passivation layer 8 on source electrode 6a and drain electrode 6b.
In the utility model, described underlay substrate 1 can be the substrate of glass substrate, plastic base or other materials; The material of described first grid 2a, source electrode 6a and drain electrode 6b can be the monofilm of aluminium (Al), molybdenum (Mo), molybdenum and tungsten alloy (MoW), copper (Cu), copper alloy; The material of gate insulator 3 can be silicon nitride.
The material of active layer 4 can be the materials such as amorphous silicon, polysilicon or conductor oxidate, and conductor oxidate is IGZO(In-Ga-Zn-O for example, indium gallium zinc oxide) or IZO(Indium Zinc Oxide, indium-zinc oxide); As shown in Figure 2, further, the structure of active layer 4 can comprise two-layer, near active layer material employing amorphous silicon (a-Si) or the polysilicon (p-Si) of gate insulator 3; Active layer material away from gate insulator 3 adopts doped semiconductor (n+a-Si).
As shown in Figure 2, the array base palte that the utility model provides also comprises: be positioned at a plurality of GOA unit on underlay substrate 1, described GOA unit comprises: be positioned at the second grid 2b on underlay substrate 1, be positioned at the gate insulator 3 on second grid 2b and be positioned at the metal lead wire 6c on gate insulator 3; Described first grid 2a and second grid 2b are positioned at same figure layer, and described metal lead wire 6c and described source electrode 6a and drain electrode 6b are positioned at same figure layer.
The material of described second grid 2b and metal lead wire 6c can be the monofilm of aluminium (Al), molybdenum (Mo), molybdenum and tungsten alloy (MoW), copper (Cu), copper alloy.
As shown in Figure 2, described array base palte also comprises: be positioned at the first transparency electrode 9 on photosensitive resin passivation layer 8, be positioned on the first transparency electrode 9 and the second passivation layer 10 of covered substrate, be positioned on the second passivation layer 10 and have the second transparency electrode 11 of narrow slit structure.
Described the first transparency electrode can be plate electrode or gap electrode.
The material of the first transparency electrode 9 and the second transparency electrode 11 can be tin indium oxide etc.; The second passivation layer 10 can adopt inorganic insulating membrane, such as silicon nitride etc., or organic insulating film.
In array base palte provided by the utility model; due to photosensitive resin passivation layer 8 be positioned at source electrode 6a with the drain electrode 6b on and stacked the contact; saved the manufacture of channel protective layer; therefore; the array base palte that the utility model provides has reduced the manufacturing cost of array base palte, has simplified widely manufacturing process.Simultaneously; because the channel protective layer material adopts inorganic insulating membrane usually; such as silicon nitride etc.; for visible light; the transmitance of silicon nitride channel protective layer is 90%, and the transmitance of photosensitive resin passivation layer is 95%, and array base palte described in the utility model has further improved the display brightness of TFT-LCD product; improve the yields of product, effectively reduced the power consumption of TFT-LCD product.
The utility model embodiment provides the array base palte under the ADS pattern, this array base palte can improve the picture quality of TFT-LCD product, has high-resolution, high permeability, low-power consumption, wide visual angle, high aperture, low aberration, without advantages such as water of compaction ripples (push Mura).
The utility model also provides a kind of display unit, and it comprises above-mentioned any one array base palte.Described display unit can be: liquid crystal panel, Electronic Paper, OLED(Organic Light-Emitting Diode, Organic Light Emitting Diode) any product or parts with Presentation Function such as panel, mobile phone, panel computer, television set, display, notebook computer, DPF, navigator.
The array base palte that the utility model embodiment provides can adopt method manufacture as shown in Figure 3, comprising:
Step 11: form source electrode and drain metal film on the pre-figure of active layer, form the pre-figure 6 that comprises source electrode and drain electrode by composition technique.
Step 12: on the figure that step 11 forms, form photosensitive resin passivation layer 8, by composition technique, form the figure of the photosensitive resin passivation layer 8 that comprises the first via hole, described the first via hole is positioned at the top of the pre-figure 6 of source electrode and drain electrode.
In prior art, the material of channel protective layer adopts silicon nitride material usually, due to silicon nitride material and photosensitive resin material lateral etching speed different, in case the silicon nitride channel protective layer lateral etching speed be positioned under the photosensitive resin passivation layer is fast, will cause first of raceway groove place to cross Hole chamfering bad, therefore, in step 11, do not form the raceway groove of active layer, the active layer at raceway groove place is covered by the pre-figure of source electrode and drain electrode, avoided the active layer at raceway groove place to be subjected to the impact of photosensitive resin passivation layer, effectively solved in step 12 the bad problem of chamfering while manufacturing the first via hole, improved the yields of product.
Step 13: form transparent conductive metallic film on the figure that step 12 forms, form and comprise the figure of the first transparency electrode 9 and comprise the figure of active layer 4 and the gap between source electrode and drain electrode by composition technique.
The material of transparent conductive metallic film can be tin indium oxide etc.
Wherein, before step S11, also comprise:
Step S01: form the grid metallic film on underlay substrate, form the figure that comprises first grid 2a by composition technique;
Step S02: form successively gate dielectric materials layer and active material layer on the figure that step S01 forms, form the figure that comprises gate insulator 3 and the figure that comprises active layer 4 pre-figures by composition technique.
Wherein, in step S12, by composition technique, also form the second via hole, described the second via hole is exposed by the part-structure of drain electrode 6b in the pre-figure 6 of source electrode and drain electrode, so that the figure of the first transparency electrode 9 formed in step S13 is connected with drain electrode 6b by the second via hole.
Wherein, in step S13:
By twice composition technique, form the gap comprised between the figure of the first transparency electrode 9, the figure that comprises active layer 4 and source electrode 6a and drain electrode 6b, wherein, composition technique forms gap between source electrode 6a and drain electrode 6b and the figure of active layer 4, and another time composition technique forms the figure that comprises the first transparency electrode 9;
Or, by a composition technique, form the gap comprised between the figure of the first transparency electrode 9, the figure that comprises active layer 4 and source electrode 6a and drain electrode 6b.
Concrete can be as shown in figure 10, to form transparent conductive metallic film on the figure that step 12 forms; As shown in figure 11, on transparent conductive metallic film, apply photoresist 5, use pellicle composition technique finishing patterns to shift, be that source electrode 6a and the gap location of drain electrode between 6b are whole exposure areas, pixel electrode in the array base palte provided due to the utility model embodiment has narrow slit structure, therefore the first transparency electrode 9 slit places are half exposure area, and other are local is exposure area not; As shown in figure 12, adopt wet etching that the transparent conductive metallic film of the gap location between source electrode 6a and drain electrode 6b and source electrode and drain metal film are etched away, adopt dry etching that a part of active material layer of the gap location between source electrode 6a and drain electrode 6b is etched away, the gap between formation source electrode 6a and drain electrode 6b and the figure of active layer 4.As shown in figure 13, by gray tone mask composition technique, form the figure that comprises the first transparency electrode 9, namely carry out the photoresist 5 that half exposure area is disposed in ashing, expose the transparent conductive metallic film at the first transparency electrode 9 slit places; Adopt wet etching that the transparent conductive metallic film at the first transparency electrode 9 slit places is etched away, obtain the pattern of the first transparency electrode 9; Finally, stripping photoresist 5, form the gap comprised between the figure of the first transparency electrode 9, the figure that comprises active layer 4 and source electrode 6a and drain electrode 6b.Structure after the figure of formation active layer and the figure of the first transparency electrode is with reference to shown in Figure 14.
Perhaps, as shown in figure 15, on transparent conductive metallic film, apply photoresist 5, by a composition technique finishing patterns, shift, adopt wet etching that the transparent conductive metallic film of the gap location between source electrode 6a and drain electrode 6b and source electrode and drain metal film are etched away, the transparent conductive metallic film at the first transparency electrode 9 slit places also is etched away simultaneously, adopts dry etching, and a part of active material layer of the gap location between source electrode 6a and drain electrode 6b is etched away; Stripping photoresist 5, form the gap comprised between the figure of the first transparency electrode 9, the figure that comprises active layer 4 and source electrode 6a and drain electrode 6b.
Certainly, above-mentioned formation comprises that the step in the gap between the figure of the first transparency electrode 9, the figure that comprises active layer 4 and source electrode 6a and drain electrode 6b just illustrates, not as limit.Wherein, the first transparency electrode can be plate electrode or gap electrode.
Wherein, in step S11, by composition technique, also form the figure of metal lead wire 6c and data scanning line.
Wherein, in step S01, by composition technique, also form the figure that comprises second grid 2b and the controlling grid scan line be connected with described first grid 2a.
Wherein, in step S02, by composition technique, form the figure of the gate insulator 3 that comprises the 3rd via hole, described the 3rd via hole is positioned at the top of described second grid 2b.
Wherein, after step S13, also further comprise:
Step S14: on the figure that step S13 forms, form the second layer of passivation material, by composition technique, form the second passivation layer 10 figures that comprise the 4th via hole, described the 4th via hole is positioned at the top in the gap of source electrode 6a and drain electrode 6b.
Wherein, after step S13, also further comprise:
Step S15: form the second layer of passivation material on the figure that step S13 forms, by composition technique, form the second passivation layer 10 figures that comprise the 4th via hole and the 5th via hole, described the 4th via hole is positioned at the top in the gap of source electrode 6a and drain electrode 6b, and described the 5th via hole is positioned at the top of the 3rd via hole.
Wherein, after step S14 or S15, also further comprise:
Step S16: form transparent conductive metallic film on the figure of step S14 or S15 formation, form the second transparency electrode 11 figures with narrow slit structure by composition technique.
As shown in Figure 4, the array base palte that the utility model embodiment provides can adopt following method manufacture, specifically comprises:
Step 401: form the grid metallic film on underlay substrate 1, form the figure of first grid 2a, second grid 2b and the controlling grid scan line (not shown) be connected with described first grid 2a by composition technique.Cross section structure after the figure of formation grid is with reference to shown in Figure 5.
One time composition technique generally includes the operations such as base-plate cleaning, film forming, photoresist coating, exposure, development, etching, photoresist lift off; For metal level, usually adopt physical vapour deposition (PVD) mode (for example magnetron sputtering method) film forming, by wet etching, form figure, and usually adopt chemical vapour deposition (CVD) mode film forming for non-metallic layer, form figure by dry etching, the following steps reason is identical, repeats no more.In the manufacture process of the array base palte that the utility model utility model embodiment provides, composition technique, can include only photoetching process, or, comprise photoetching process and etch step, other are used to form the technique of predetermined pattern can also to comprise printing, ink-jet etc. simultaneously; Photoetching process, refer to that utilize photoresist, mask plate, the exposure machine etc. of technical processs such as comprising film forming, exposure, development form the technique of figure.Can be according to the corresponding composition technique of the structure choice of array base palte provided by the utility model.
Step 402: form successively gate insulator 3 and active material layer on the figure that step 401 forms, form the figure of active layer 4 pre-figures by composition technique.Cross section structure after the figure of formation active layer 4 pre-figures is with reference to shown in Figure 6.
Step 403: on the figure that step 402 forms, form the figure of the gate insulator 3 that comprises the 3rd via hole by composition technique, described the 3rd via hole is positioned at the top of second grid 2b.Cross section structure after the figure of formation gate insulator 3 is with reference to shown in Figure 7.
Step 402 and step 403 can replace with: form successively gate insulator 3 and active material layer on the figure that step 401 forms; By pellicle composition technique, form the figure and the figure that comprises the gate insulator 3 of the 3rd via hole of active layer 4, described the 3rd via hole is positioned at the top of second grid 2b figure.
Step 404: form source electrode and drain metal film on the figure that step 403 forms, form the figure of the pre-figure 6, metal lead wire 6c and the data scanning line that comprise source electrode and drain electrode by composition technique.Form structure after the pre-figure of source electrode and drain electrode with reference to shown in Figure 8, wherein, 6 what refer to is the pre-figure of source electrode and drain electrode.
Step 405: form photosensitive resin passivation layer 8 on the figure that step 404 forms, by composition technique, form the figure of the photosensitive resin passivation layer 8 that comprises the first via hole and the second via hole, described the first via hole is positioned at the top of the pre-figure 6 of source electrode and drain electrode, and described the second via hole is exposed by the part-structure drained in the pre-figure of source electrode and drain electrode.Structure after the figure of formation photosensitive resin passivation layer 8 is with reference to shown in Figure 9.
Step 406: form transparent conductive metallic film on the figure that step 405 forms, comprise the figure of the first transparency electrode 9, active layer 4 and the gap between source electrode 6a and drain electrode 6b by the formation of composition technique.
In the present embodiment, step 406 specifically comprises, forms transparent conductive metallic film on the figure that step 405 forms, and by pellicle composition technique, forms the figure of active layer 4 and the gap between source electrode 6a and drain electrode 6b; By gray tone mask composition technique, form the figure of the first transparency electrode 9, with foregoing, form the figure that comprises the first transparency electrode 9, active layer 4 and the gap between source electrode 6a and drain electrode 6b is compared by composition technique, technical process is more stable, has effectively improved the yields of TFT product.Structure after the figure of formation active layer 4 and the figure of the first transparency electrode 9 is with reference to shown in Figure 14.
Step 407: on the figure that step 406 forms, form the second layer of passivation material, by composition technique, form the figure of the second passivation layer 10 that comprises the 4th via hole, described the 4th via hole is positioned at the top in the gap of source electrode and drain electrode.
Perhaps, on the figure that step 406 forms, form the second layer of passivation material, by composition technique, form the figure of the second passivation layer 10 that comprises the 4th via hole and the 5th via hole, described the 4th via hole is positioned at the top in the gap of source electrode and drain electrode, and described the 5th via hole is positioned at the top of the 3rd via hole.Form cross section structure after the figure of the second passivation layer 10 with reference to shown in Figure 16.
Step 408: form transparent conductive metallic film on the figure that step 407 forms, form the figure of the second transparency electrode 11 with narrow slit structure by composition technique.
Visible, the array base palte that the utility model provides, in manufacture process, has saved the manufacture of channel protective layer, has reduced manufacturing cost, has simplified production technology, has greatly promoted the yields of product.
Obviously, those skilled in the art can carry out various changes and modification and not break away from spirit and scope of the present utility model the utility model.Like this, if within of the present utility model these are revised and modification belongs to the scope of the utility model claim and equivalent technologies thereof, the utility model also is intended to comprise these changes and modification interior.
Claims (5)
1. an array base palte, is characterized in that, comprising: underlay substrate and be positioned at a plurality of film crystal pipe units on described underlay substrate, wherein,
Described film crystal pipe unit comprises: be positioned at the first grid on described underlay substrate, be positioned at the gate insulator on described first grid, be positioned on described gate insulator and the active layer relative with described first grid position, be positioned at source electrode and drain electrode on described active layer, between described source electrode and drain electrode, be provided with gap, and be positioned at the photosensitive resin passivation layer on described source electrode and drain electrode.
2. array base palte as claimed in claim 1, it is characterized in that, also comprise: be positioned at the capable driver element of a plurality of array base paltes on described underlay substrate, wherein, the capable driver element of described array base palte comprises: be positioned at the second grid on described underlay substrate, be positioned at the gate insulator on described second grid and be positioned at the metal lead wire on described gate insulator; Described first grid and second grid are positioned at same figure layer, and described metal lead wire and described source electrode and drain electrode are positioned at same figure layer.
3. array base palte as claimed in claim 1 or 2, it is characterized in that, further comprise: be positioned at the first transparency electrode on described photosensitive resin passivation layer, be positioned on described the first transparency electrode and the second passivation layer of covered substrate, be positioned on described the second passivation layer and have the second transparency electrode of narrow slit structure.
4. array base palte as claimed in claim 3, is characterized in that, described the first transparency electrode is plate electrode or gap electrode.
5. a display unit, is characterized in that, comprises array base palte as described as any one in claim 1～4.
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| CN2013203933020U CN203312296U (en) | 2013-07-03 | 2013-07-03 | Array baseplate and display device |
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| CN2013203933020U CN203312296U (en) | 2013-07-03 | 2013-07-03 | Array baseplate and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103383945A (en) * | 2013-07-03 | 2013-11-06 | 北京京东方光电科技有限公司 | Array substrate, display device and manufacturing method of array substrate |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103383945A (en) * | 2013-07-03 | 2013-11-06 | 北京京东方光电科技有限公司 | Array substrate, display device and manufacturing method of array substrate |
| WO2015000255A1 (en) * | 2013-07-03 | 2015-01-08 | 京东方科技集团股份有限公司 | Array substrate, display device, and method for manufacturing array substrate |
| CN103383945B (en) * | 2013-07-03 | 2015-10-14 | 北京京东方光电科技有限公司 | The manufacture method of a kind of array base palte, display unit and array base palte |
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Owner name: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY Effective date: 20150708 Owner name: JINGDONGFANG SCIENCE AND TECHNOLOGY GROUP CO., LTD Free format text: FORMER OWNER: BEIJING BOE PHOTOELECTRICITY SCIENCE + TECHNOLOGY CO., LTD. Effective date: 20150708 |
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Effective date of registration: 20150708 Address after: 100015 Jiuxianqiao Road, Beijing, No. 10, No. Patentee after: BOE TECHNOLOGY GROUP Co.,Ltd. Patentee after: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 100176 Beijing city in Western Daxing District economic and Technological Development Zone, Road No. 8 Patentee before: BEIJING BOE OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |
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Granted publication date: 20131127 |