CN203311814U - CMOS logic chip-based signal conversion circuit - Google Patents
CMOS logic chip-based signal conversion circuit Download PDFInfo
- Publication number
- CN203311814U CN203311814U CN2013203465887U CN201320346588U CN203311814U CN 203311814 U CN203311814 U CN 203311814U CN 2013203465887 U CN2013203465887 U CN 2013203465887U CN 201320346588 U CN201320346588 U CN 201320346588U CN 203311814 U CN203311814 U CN 203311814U
- Authority
- CN
- China
- Prior art keywords
- cmos logic
- logic chip
- chip
- interface
- conversion circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The utility model relates to an electrical level conversion circuit, especially a CMOS logic chip-based signal conversion circuit and belongs to the technical field of interface circuits. According to the technical schemes provided by the utility model, the CMOS logic chip-based signal conversion circuit includes a CMOS logic chip; the input end of the CMOS logic chip is connected with a first interface used for connecting an LED control board; the output end of the CMOS logic chip is connected with a second interface used for connecting with an LED driving circuit; and a power supply end of the CMOS logic chip is connected with a power supply circuit. The CMOS logic chip-based signal conversion circuit of the utility model can realize electrical level conversion through the CMOS logic chip and realize electrical level matching of signals. The CMOS logic chip-based signal conversion circuit has the advantages of simple structure, lower cost, wide adaptation range, safety and reliability.
Description
Technical field
The utility model relates to a kind of level shifting circuit, and especially a kind of signaling conversion circuit based on the CMOS logic chip belongs to the technical field of interface circuit.
Background technology
In road traffic control, adopt more and more LED display, using LED display as information promulgating platform, issue violation information, remind the car owner, or show that vehicle flow information, guided vehicle select road, improve the unimpeded rate of road traffic.But, the signal interface circuit complexity of current LED display, the power utilization rate is not high, causes inner heat to increase, serviceable life and reliability decrease, use cost is high, is difficult to meet request for utilization.
Summary of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, and a kind of signaling conversion circuit based on the CMOS logic chip is provided, and its circuit structure is simple, reduces use cost, and wide accommodation is safe and reliable.
The technical scheme provided according to the utility model, described signaling conversion circuit based on the CMOS logic chip, comprise the CMOS logic chip, the input end of described CMOS logic chip connects with the first interface be used to being connected the LED control panel, the output terminal of CMOS logic chip connects with the second interface for being connected with LED drive circuit, and the power end of CMOS logic chip is connected with power circuit.
It is the chip of SN74LVC8T245DWR that described CMOS logic chip adopts model, power circuit comprises the first diode, the VCCA end of the cathode terminal of the first diode and CMOS logic chip and an end of the second electric capacity, an end of the first electric capacity are connected, the other end ground connection of the other end of the first electric capacity and the second electric capacity; The anode tap of the first diode is connected with the cathode terminal of the second diode, the anode tap of the second diode is connected with an end of the 3rd electric capacity and an end of the 4th electric capacity, and the anode tap of the second diode is connected with power supply VCC, the other end ground connection of the other end of the 3rd electric capacity and the 4th electric capacity, the VCCB end of CMOS logic chip is connected with power supply VCC.
Described CMOS logic chip is connected with the 3rd interface in LED drive circuit by the second interface, and the 3rd interface is connected with the input end of signal driver chip, and the signal driver chip drives chip with LED and the 6th interface is connected.
It is the chip of SN74HC245 that described signal driver chip adopts model, and LED drives the chip that chip adopts MBI5024.
Advantage of the present utility model: the input end of CMOS logic chip is connected with first interface, the output terminal of CMOS logic chip is connected with LED drive circuit by the second interface, by the CMOS logic chip, realize level conversion, can realize the level match of signal, circuit structure is simple, reduce use cost, wide accommodation, safe and reliable.
The accompanying drawing explanation
Fig. 1 is circuit theory diagrams of the present utility model.
Fig. 2 is the circuit theory diagrams of the utility model LED drive circuit.
Embodiment
The utility model is described in further detail below in conjunction with concrete drawings and Examples.
As shown in Figure 1: in order to realize that the driving of LED display is controlled, reduce the complexity of interface, the utility model comprises CMOS logic chip U1, the input end of described CMOS logic chip U1 connects with the first interface JK1 be used to being connected the LED control panel, the output terminal of CMOS logic chip U1 connects with the second interface JK2 for being connected with LED drive circuit, and the power end of CMOS logic chip U1 is connected with power circuit.
Particularly, it is the chip of SN74LVC8T245DWR that described CMOS logic chip U1 adopts model, power circuit comprises the first diode D1, the VCCA end of the cathode terminal of the first diode D1 and CMOS logic chip U1 and an end of the second capacitor C 2, an end of the first capacitor C 1 are connected, the other end ground connection of the other end of the first capacitor C 1 and the second capacitor C 2; The cathode terminal of described the first diode D1 forms voltage VCCA, and the voltage of described voltage VCCA is for being converted to through power supply VCC, and described voltage VCCA is 3.8V.The anode tap of the first diode D1 is connected with the cathode terminal of the second diode D2, the anode tap of the second diode D2 is connected with an end of the 3rd capacitor C 3 and an end of the 4th capacitor C 4, and the anode tap of the second diode D2 is connected with power supply VCC, the other end ground connection of the other end of the 3rd capacitor C 3 and the 4th capacitor C 4, the VCCB end of CMOS logic chip U1 is connected with power supply VCC.
Described first interface JK1 has 50 links, described the 49 end and the 47 end all are connected with power supply VCC, and be connected with the anode tap of the second diode D2, the 50 end, the 48 end and the equal ground connection of the 46 end of first interface JK1, in addition, the first end of first interface JK1, the 3rd end and five terminal be ground connection also, and the second end of first interface JK1 and the 4th end all are connected with power supply VCC.The GND end of CMOS logic chip U1 is connected with the five terminal of first interface JK1, DIR end and the equal ground connection of Enable Pin of CMOS logic chip U1.The B8 end of CMOS logic chip U1 is connected with the 37 end of first interface JK1, and to form the G1 signal, described G1 signal is the green signal that drives of the first row.The B7 end of CMOS logic chip U1 is connected with the 44 end of first interface JK1, to form the CLK signal, described CLK signal is the shift clock signal, the B6 end of CMOS logic chip U1 is connected with the 43 end of first interface JK1, to form the LAT signal, described LAT signal is the latch signal after data are sent.The B5 end of CMOS logic chip U1 is connected with the 37 end of first interface JK1, to form the R1 signal, described R1 signal is the first danger signal, the B4 end of CMOS logic chip U1 is connected with the 40 end of first interface JK1, to form the LC signal, the B3 end of CMOS logic chip U1 is connected with the 41 end of first interface JK1, to form the LB signal, the B2 end of CMOS logic chip U1 is connected with the 42 end of first interface JK1, to form the LA signal, described LA signal, LB signal and LC signal are the row address control signal while needing realization to divide line scanning, three signal line can realize 8 road wheel scan flows by 3-8 decoding, the B1 end of CMOS logic chip U1 is connected with the 40 five terminal of first interface JK1, to form the OE signal, described OE signal is the output enable signal.
The second interface JK2 has 16 links, the second end of the second interface JK2, the 4th end, the 6th end, the 8th end, the tenth end, the 12 end and the equal ground connection of the 14 end.The A8 end of CMOS logic chip U1 is connected with the 9th end of the second interface JK2, forms the Gin signal, the A7 end of CMOS logic chip U1 is connected with the first end of the second interface JK2, form the CLKin signal, the A6 end of CMOS logic chip U1 is connected with the 3rd end of the second interface JK2, form the STin signal, the A5 end of CMOS logic chip U1 is connected with the five terminal of the second interface JK2, form the Rin signal, the A4 end of CMOS logic chip U1 and the tenth six end connecting of the second interface JK2, form the LCin signal, the A3 end of CMOS logic chip U1 is connected with the tenth five terminal of the second interface JK2, form the LBin signal, the A2 end of CMOS logic chip U1 is connected with the 13 end of the second interface JK2, form the LAin signal, the A1 end of CMOS logic chip U1 is connected with the five terminal of the second interface JK2, form the ENin signal.In the utility model embodiment, the A8 end ~ A1 of CMOS logic chip U1 end and described CMOS logic chip U1 B8 ~ the B1 signal is corresponding one by one.
As shown in Figure 2: described LED drive circuit can be made independently drive plate, also can be placed on LED display main body wiring board by cloth.When being the drive plate, the 3rd interface JK3 is the signal input, with the second interface JK2 in Fig. 1, be connected, the 4th interface JK4, the 5th interface 5 connect respectively 16 road green LED negative poles (positive pole connects the 4V power supply), here the green of only take is example, and GD is the inputs of green LED data, and Gout is the outputs of green LED data, for connecting next 16 tunnel green LED, by the 6th interface JK6 output.
Particularly, described CMOS logic chip 1 is connected with the 3rd interface JK3 in LED drive circuit by the second interface JK2, the 3rd interface JK3 is connected with the input end of signal driver chip U2, and signal driver chip U2 drives chip U3 with LED and the 6th interface JK6 is connected.Described the 3rd interface JK3 is connected with the second interface JK2 coupling, to receive the signal of the second interface JK2 output, and described signal is input in signal driver chip U2, namely is connected respectively to the A1 of signal drive signal U2 ~ A8 and holds.It is the chip of SN74HC245 that described signal driver chip U2 adopts model, and LED drives the chip that chip U3 adopts MBI5024.The DIR termination power VCC of signal driver chip U2, Enable Pin ground connection.The B1 end of signal driver chip U2 and the tenth six end connecting of the 6th interface JK6, and ground connection, the B2 end of signal driver chip U2 is connected with the tenth five terminal of the 6th interface JK6, the B3 end of signal driver chip U2 is connected with the 13 end of the 6th interface JK6, the XSDI end that B4 end and the LED of signal driver chip U2 drives chip U3 is connected, form the GD signal, the B6 end of signal driver chip U2 is connected with the ENZ end that the five terminal of the 6th interface JK6 and LED drive chip U3, the B7 end of signal driver chip U2 is connected with the 3rd end of the 6th interface JK6, the B8 end of signal driver chip U2 is connected with the first end of the 6th interface JK6, LED drives the REXT end of chip U3 by resistance R 1 ground connection, the OUT0 of LED driving chip U3 ~ OUT7 end is connected with the 4th interface JK4, the OUT8 of LED driving chip U3 ~ OUT15 end is connected with the 5th interface JK5.
The input end of the utility model CMOS logic chip U1 is connected with first interface JK1, the output terminal of CMOS logic chip U1 is connected with LED drive circuit by the second interface JK2, U1 realizes level conversion by the CMOS logic chip, can realize the level match of signal, circuit structure is simple, reduce use cost, wide accommodation, safe and reliable.
Claims (4)
1. signaling conversion circuit based on the CMOS logic chip, it is characterized in that: comprise CMOS logic chip (U1), the input end of described CMOS logic chip (U1) connects with the first interface (JK1) be used to being connected the LED control panel, the output terminal of CMOS logic chip (U1) connects with the second interface (JK2) for being connected with LED drive circuit, and the power end of CMOS logic chip (U1) is connected with power circuit.
2. the signaling conversion circuit based on the CMOS logic chip according to claim 1, it is characterized in that: it is the chip of SN74LVC8T245DWR that described CMOS logic chip (U1) adopts model, power circuit comprises the first diode (D1), the VCCA end of the cathode terminal of the first diode (D1) and CMOS logic chip (U1) and an end of the second electric capacity (C2), an end of the first electric capacity (C1) are connected, the other end ground connection of the other end of the first electric capacity (C1) and the second electric capacity (C2); The anode tap of the first diode (D1) is connected with the cathode terminal of the second diode (D2), the anode tap of the second diode (D2) is connected with an end of the 3rd electric capacity (C3) and an end of the 4th electric capacity (C4), and the anode tap of the second diode (D2) is connected with power supply VCC, the other end ground connection of the other end of the 3rd electric capacity (C3) and the 4th electric capacity (C4), the VCCB end of CMOS logic chip (U1) is connected with power supply VCC.
3. the signaling conversion circuit based on the CMOS logic chip according to claim 1, it is characterized in that: described CMOS logic chip (1) is connected with the 3rd interface (JK3) in LED drive circuit by the second interface (JK2), the 3rd interface (JK3) is connected with the input end of signal driver chip (U2), and signal driver chip (U2) drives chip (U3) with LED and the 6th interface (JK6) is connected.
4. the signaling conversion circuit based on the CMOS logic chip according to claim 3 is characterized in that: it is the chip of SN74HC245 that described signal driver chip (U2) adopts model, and LED drives the chip that chip (U3) adopts MBI5024.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203465887U CN203311814U (en) | 2013-06-17 | 2013-06-17 | CMOS logic chip-based signal conversion circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2013203465887U CN203311814U (en) | 2013-06-17 | 2013-06-17 | CMOS logic chip-based signal conversion circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203311814U true CN203311814U (en) | 2013-11-27 |
Family
ID=49618005
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2013203465887U Expired - Lifetime CN203311814U (en) | 2013-06-17 | 2013-06-17 | CMOS logic chip-based signal conversion circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203311814U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109754748A (en) * | 2017-11-03 | 2019-05-14 | 上海和辉光电有限公司 | A kind of driving circuit of display panel, display panel and display device |
-
2013
- 2013-06-17 CN CN2013203465887U patent/CN203311814U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109754748A (en) * | 2017-11-03 | 2019-05-14 | 上海和辉光电有限公司 | A kind of driving circuit of display panel, display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203759473U (en) | Data acquisition transmission system used for rail transit signal interlocking test simulation | |
| CN104091722B (en) | Relay drive circuit | |
| CN203278279U (en) | Multifunctional mobile power supply | |
| CN203311814U (en) | CMOS logic chip-based signal conversion circuit | |
| CN204680875U (en) | Quick charge data wire | |
| CN202167679U (en) | Telescoping multi-plug socket | |
| CN205015882U (en) | Burn record ware switching card | |
| CN201716720U (en) | Singlechip communication circuit and singlechip system | |
| CN101694995B (en) | Passive RS232-485 signal converter | |
| CN201237839Y (en) | Traffic signaling machine | |
| CN207457318U (en) | A kind of modular electric energy meter | |
| CN203661030U (en) | Electrical level switching circuit and circuit board having same | |
| CN202772864U (en) | Key and indicator light control circuit, and television | |
| CN206441144U (en) | A kind of multi-functional display card system | |
| CN201918590U (en) | USB cable | |
| CN201562273U (en) | High-speed parallel port interface circuit | |
| CN203151466U (en) | Positive-negative logic level conversion switching circuit | |
| CN103956087A (en) | Headstock decoding controller of urban rail traffic operation safety simulation sand table | |
| CN207559972U (en) | A kind of level shifting circuit based on metal-oxide-semiconductor | |
| CN203588021U (en) | Memory chip for automatic transmission | |
| CN206293338U (en) | A kind of frequency modulation switch | |
| CN203149829U (en) | Intensifier circuit based on PWM (Pulse Width Modulation) signal modulation with double infrared emission tubes | |
| CN204680001U (en) | A kind of STM32 chip program programming circuit | |
| CN104915313A (en) | FMC board card for realizing level transformation by using FPGA (field programmable gate array) | |
| CN205716529U (en) | LED bulb lamp with power supply isolation structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP03 | Change of name, title or address |
Address after: 214101 Xishan Economic Development Zone, Jiangsu Province, science and Technology Industrial Park, No. 1, No. Patentee after: JIANGSU CASIC DAWAY TECHNOLOGY Co.,Ltd. Address before: 214101 Xishan, Jiangsu, East Road, South District, No. 39, No. Patentee before: JIANGSU DAWAY TECHNOLOGIES Co.,Ltd. |
|
| CX01 | Expiry of patent term |
Granted publication date: 20131127 |
|
| CX01 | Expiry of patent term |