CN203232289U - Medium range multinode acquisition apparatus based on 485 bus - Google Patents

Medium range multinode acquisition apparatus based on 485 bus Download PDF

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Publication number
CN203232289U
CN203232289U CN2012206970027U CN201220697002U CN203232289U CN 203232289 U CN203232289 U CN 203232289U CN 2012206970027 U CN2012206970027 U CN 2012206970027U CN 201220697002 U CN201220697002 U CN 201220697002U CN 203232289 U CN203232289 U CN 203232289U
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China
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acquisition
acquisition processing
bus
processing module
host computer
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Expired - Fee Related
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CN2012206970027U
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Chinese (zh)
Inventor
谷兴华
周玲玲
张新强
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Renergy Electric Tianjin Ltd
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Renergy Electric Tianjin Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

The utility model provides a medium range multinode acquisition apparatus based on 485 bus; the apparatus comprises a signal unit group, an acquisition processing module, the 485 bus, and a host computer; each signal unit is respectively in serial connection with the acquisition processing module; the acquisition processing module is connected with the host computer through the 485 bus in sequence, and transmits processed digital signals to the host computer; the acquisition processing module comprises a plurality of acquisition processing units, and enabled pins among the acquisition processing units are in mutual serial connection; and synchronization pins of the acquisition processing units are in mutual parallel connection. The beneficial effects are that the bus system corporately formed by the 485 bus, the acquisition processing module and the host computer can carry out automatic and freely-changed digital processing unit sub-node group and node number distribution function, and communication rate is fast and acquisition efficiency is high; and only one slightly trained person is needed to operate arrangement system, so usage is more convenient and processing cost is low.

Description

A kind of middle distance based on 485 buses, multinode harvester
Technical field
The utility model be related to that a kind of photovoltaic system uses to multinode data acquisition device, more particularly, to a kind of middle distance based on 485 buses, multinode harvester. 
Background technology
Typically there are two kinds of application aspects in conventional bus communication system.A kind of real-time general line controlling system application for distance typically realizes that such a total demand pairs are higher according to real-time communication security requirement by differential signal transmission mode, but to data volume demand less, and is easier to realization and can typically be realized in small-sized remote equipment.The realizations of data transfer communications for Large Copacity a kind of is general to be realized but communication distance is general all within 2 meters or there is single point-to-point communication and can not realize multinode network topological structure such as USB, RS-232 bus etc. by concurrently or sequentially interface. 
And 485 buses are a kind of bus systems of technical grade is usually applied to industry spot and is acquired multipoint data, analog signal or data signal, typically use 485 buses, using more than a master tape from communication mode, this kind of martingale conveniently only needs to two shielded cables, the remote maximum of communication distance can support that 1500m, plus repeater can also extend communication distance, good using differential signal mode electromagnetism interference.But 485 bus communications have following defect:The data of each subelement, i.e. master unit are gathered by the way of principal and subordinate's question and answer and accesses each subelement successively, which unit had access to, which unit uploads data, the right to use of bus is distributed by master unit completely, and each subelement can not capture bus without authorization.Also, all nodes must enter predefined child node of acting charitably in advance before bus starting and distribute in whole bus structures, greatly limit flexibility and the autgmentability of system. 
When multinode data acquisition is realized in existing technology, not only need to be connected with each other between node, typically carried out by two ways: 
(1)Need to carry out additional treatments on software, node number distribution is carried out by software
(2)Increase toggle switch, input equipment on hardware. 
Both the above mode exist can not flexible additions and deletions node, need artificial participation to be allocated in distribution node, while also communication distance is short, speed is slow, efficiency is low, so as to be unable to reach the technical problems such as the Quick Acquisition of real time data. 
The content of the invention
Problem to be solved in the utility model is to provide a kind of high speed half duplex bus collection device, is especially suitable for a kind of fast automatic distribution bus node group and each group child node number and can transmit each child node mass data to the bus communicating devices of host node. 
To solve above-mentioned technical problem, the technical solution adopted in the utility model includes signal element group, acquisition processing module, 485 buses, 485 converters, host computer, each signal element is connected in series with acquisition processing module respectively, respectively exports secondary side signal to acquisition processing module;Acquisition processing module passes sequentially through 485 buses, 485 converters and is connected with host computer, by the digital data transmission after processing to host computer;The acquisition processing module includes acquisition process unit, and the enable pin that the quantity of acquisition process unit is not less than between 1, acquisition process unit is mutually connected in series;The synchronous pin of acquisition process unit is mutually connected in parallel.Its role is to:First acquisition process unit in acquisition process unit group can carry out the digital processing element child node group of automatic capable freely changing and node number distribution function, now can additions and deletions at any time among the nodes, improve gathered data flexibility ratio;And data are uploaded to by host computer with 921600bit/s speed. 
Further, signal element group includes voltage sensor unit, current sensing unit or Current Mutual Inductance unit. 
Further, the acquisition process unit is not less than two. 
Further, the host computer is computer, Intelligent mobile equipment. 
Further, the acquisition process unit is provided with dsp chip. 
Further, 485 converter is USB-485 converters. 
The utility model has the advantages and positive effects of:Due to using above-mentioned technical proposal, by 485 buses, the bus system that acquisition processing module and host computer coordinate can be carried out the digital processing element child node group and node number distribution function of automatic capable freely changing by first acquisition process unit in acquisition process unit group, traffic rate is fast, communication efficiency is up to 1M or so, mass data is set efficiently to send to computer in order in a short time, collection signal time control is accurate to be applied to have while gathering desired application scenario, simple system is reliable only can arrangements of operations system by an ordinary person slightly trained.More facilitate with using, the advantages of processing cost is low, collecting efficiency is high. 
Brief description of the drawings
Fig. 1 is structural representation of the present utility model
Fig. 2 is acquisition process cellular construction schematic diagram of the present utility model
In figure: 
1st, synchronous pin DI 2, synchronous pin DO 3, acquisition process unit
4th, enable pin DI 5, enable pin DO 6, node distribution control line
7th, 485 bus
Embodiment
As shown in figure 1, the course of work of the present utility model:Whole bus system automatic child node number of distribution acquisition process unit 3 with 485 buses 7, acquisition processing module and host computer gives acquisition process unit 3.Host computer sends whole system after data acquisition command and carries out the collection of data automatically and the data obtained of acquisition process unit 3 selectively can be sent into host computer.The isolation circuit of system control box 485 accesses the USB-485 converters of bus also from CP2102USB transits chip with this high speed circuit, making the traffic rate up to 921600bit/s of whole system using high speed circuit and host computer.Each acquisition process unit 3 supplies 5V power supplys using 24V direct current supplys host node USB-485 converters by computer USB port.The child node distribution function of described automatic distribution acquisition process unit 3 can be redistributed by the change of line at any time.Whole bus system is operated in high bit rate using high-speed communication unit and circuit, each acquisition process unit 3 can be made to be acquired data with the interval of several microseconds successively, to realize high speed acquisition.Each acquisition process unit 3, which is assigned as matrix form packet, can distribute group number respectively with child node number beneficial to maximization, the efficient operation of complication system. 
First acquisition process unit 3 in acquisition process unit group is the acquisition process unit 3 that node number is 1 group No. 0 (1-0), by second acquisition process unit 3 node number be 1 group No. 1 (1-1) acquisition process unit 3, the like until the node number of n-th acquisition process unit 3 be 1 group No. N (1-N) acquisition process unit 3.It is connected by the enable pin DO5 for the acquisition process unit 3 that node number is 1 group No. 0 (1-0) with the enable pin DI4 for the acquisition process unit 3 that node number is 1 group No. 1 (1-1), node number is connected for the enable pin DO5 of the acquisition process unit 3 of 1 group No. 1 (1-1) with the enable pin DI4 of next acquisition process unit 3;The like connection, until the enable pin DI4 with n-th acquisition process unit 3 is attached.Ordered during utility model works by the sending node distribution first of computer host node, start to coordinate and distribute child node automatically, and allocation result is sent to computer.Carry out being used as host node by computer during data acquisition(0-0)Acquisition is sent, is 1 group No. 0 by node number(1-0)Acquisition process unit 3 send unified signal collection each child node gathered data of level after the completion of transmitted completion signal by 485 buses 7 to host node.And by computer host node(0-0)Selection node data is simultaneously received. 
By computer as host node, distribution node number is 0 group No. 0(0-0), computer accesses the bus 7 of 485 bus 7,485 by USB-485 converters and by bus type topological structure is switched to each acquisition process unit 3.Node distribution control line 6 is set to node number for 1 group No. 0 by preparation(1-0)Child node(1-0)The synchronous pin DO2 outputs of acquisition process unit 3 be connected to node number for 1 group No. 0(1-0)Synchronous pin DI1 and node number are 1 group No. 1(1-1)Acquisition process unit 3 synchronous pin DI1 inputs, by that analogy until being finally coupled to node number for 1 group No. N(1-N)End acquisition process unit 3 synchronous pin DI1.In order to realize that all child node synchronized samplings can be 1 group No. 0 by node number(1-0)Synchronous pin DO2 mouthfuls of acquisition process unit 3 draw the synchronous pin DI1 input ports that sync level control line is respectively connecting to each acquisition process unit 3.Analog quantity source signal by signal element group accesses each acquisition process unit 3 by analog output mouthful. 
The power supply unit of acquisition process unit 3 described in the utility model as shown in Figure 2 is by the outside power taking of 24V power interfaces 1 and is converted to corresponding level by power supply unit 2 and is powered to each unit, DSP control chips 3 are responsible for all unit co-ordinations of control and the processing of data, analog input unit 4 is responsible for the collection of analog quantity and is sent to DSP control chips, 485 communication units 5 be responsible for by outside 485 communication interface be connected to 485 buses 7 and with DSP control chip communication handshake datas, digital quantity input/output module 6 is responsible for the 3.3VIO mouth level signals of DSP control chips being converted to 24V level signals and carries out digital level input and output by external interface. 
One embodiment of the present utility model is described in detail above, but the content is only preferred embodiment of the present utility model, it is impossible to it is considered as being used to limit practical range of the present utility model.All impartial changes made according to present utility model application scope and improvement etc., all should still be belonged within patent covering scope of the present utility model. 

Claims (7)

1. a kind of middle distance based on 485 buses, multinode harvester, including signal element group, acquisition processing module, host computer, signal element are connected in series with acquisition processing module respectively, secondary side signal is exported to acquisition processing module respectively;Acquisition processing module is connected with host computer, by the digital data transmission after processing to host computer;It is characterized in that:Acquisition processing module includes acquisition process unit, 485 buses;Signal element group includes signal element, and signal element is connected with each collecting unit, and collecting unit is connected by 485 buses with host computer;Enable pin between acquisition process unit is mutually connected in series;The synchronous pin of acquisition process unit is mutually connected in parallel, and the node number of acquisition process unit is then distributed automatically.
2. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:Signal element group includes voltage sensor unit, current sensing unit or Current Mutual Inductance unit.
3. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:The host computer is computer, Intelligent mobile equipment.
4. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:The acquisition process unit is provided with dsp chip.
5. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:485 converter is USB-485 converters.
6. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:Signal element group includes being not less than 1 signal element.
7. the middle distance according to claim 1 based on 485 buses, multinode harvester, it is characterised in that:The quantity of acquisition process unit is not less than 2.
CN2012206970027U 2012-12-14 2012-12-14 Medium range multinode acquisition apparatus based on 485 bus Expired - Fee Related CN203232289U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103093004A (en) * 2012-12-14 2013-05-08 天津瑞能电气有限公司 Multiple node automatic allocation and high-speed data collection device based on a 485 bus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103093004A (en) * 2012-12-14 2013-05-08 天津瑞能电气有限公司 Multiple node automatic allocation and high-speed data collection device based on a 485 bus

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CF01 Termination of patent right due to non-payment of annual fee
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Granted publication date: 20131009

Termination date: 20171214