CN103093004A - Multiple node automatic allocation and high-speed data collection device based on a 485 bus - Google Patents
Multiple node automatic allocation and high-speed data collection device based on a 485 bus Download PDFInfo
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- CN103093004A CN103093004A CN2012105444211A CN201210544421A CN103093004A CN 103093004 A CN103093004 A CN 103093004A CN 2012105444211 A CN2012105444211 A CN 2012105444211A CN 201210544421 A CN201210544421 A CN 201210544421A CN 103093004 A CN103093004 A CN 103093004A
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Abstract
The invention provides a multiple node automatic allocation and high-speed data collection device based on a 485 bus. The multiple node automatic allocation and high-speed data collection device based on the 485 bus comprises a signal unit group, a collection processing module, the 485 bus, and an upper computer. Each signal unit is connected with the collection processing module in series. The collection processing module is connected with the upper computer through the 485 bus; processed digital signals are transmitted to the upper computer. The collection processing module comprises a plurality of collection processing units, and the collection processing units enable base pins arranged among the collection processing units are connected in series. Synchronous base pins of the collection processing units are mutually connected in parallel. The multiple node automatic allocation and high-speed data collection device based on the 485 bus has the advantages that the bus system composed of the 485 bus, the collection processing module and the upper computer can distribute the digital processing unit sub-node group and the node number in an automatic and changeable manner, the communication speed is high and the collection speed is high. Only a slightly trained person can operate and allocate the system. The multiple node automatic allocation and high-speed data collection device based on the 485 bus has the advantages of being convenient to use and low in processing cost.
Description
Technical field
The present invention relates to that a kind of photovoltaic system uses to the multinode data collector, relate to especially that a kind of multinode based on 485 buses distributes automatically, high-speed data acquiring device.
Background technology
Two kinds of application facet are generally arranged in the conventional bus communication system.A kind of real-time general line controlling system for distance is used and is generally realized by the differential signal transmission mode, and the total demand pairs of this kind are higher according to the real-time communication security requirement, but little to the data volume demand, and is easier to realize generally can realize at small-sized remote equipment.A kind of for the realization of jumbo data transmission communication generally realize by parallel or serial line interface but communication distance generally all at 2 meters with interior or exist the single point point to-point communication can't realize multinode network topological structure such as USB, RS-232 bus etc.
And often being applied to industry spot, the bus system that 485 buses are a kind of technical grades gathers multipoint data, simulating signal or digital signal, generally use 485 buses, use a master tape many from communication mode, convenient of this kind martingale needs two shielded cables, communication distance maximum far away can be supported 1500m, adds repeater and also can extend communication distance, adopts the anti-electromagnetic interference (EMI) of differential signal mode good.But 485 bus communications have following defective: the mode of employing principal and subordinate question and answer gathers the data of each subelement, be that master unit is accessed each subelement successively, have access to which unit, which unit uploading data, the right to use of bus is distributed by master unit fully, and each subelement can not capture bus without authorization.And in whole bus structure, all nodes must carry out predefined child node distribution in advance before bus starting, have greatly limited dirigibility and the extendability of system.
When realizing the multinode data acquisition in existing technology, not only need and will interconnect between node, generally undertaken by dual mode:
(1) need to carry out additional treatments on software, carry out node number by software and distribute
(2) increase toggle switch, input equipment on hardware.All there is additions and deletions node flexibly in above dual mode, needs artificial the participation to distribute when distribution node, and communication distance is short in addition simultaneously, speed is slow, efficient is low, thereby can't reach the technical matterss such as Quick Acquisition of real time data.
Summary of the invention
The problem to be solved in the present invention is to provide a kind of high speed half duplex bus collection device, especially is fit to a kind of fast automatic distribution bus node group and each group child node and number also each child node mass data can be transferred to the bus communication device of host node.
For solving the problems of the technologies described above, the technical solution used in the present invention comprises signal element group, acquisition processing module, 485 buses, 485 converters, host computer, each signal element is connected in series with acquisition processing module respectively, respectively the secondary signal is exported to acquisition processing module; Acquisition processing module is connected with host computer by 485 buses, 485 converters successively, with the digital data transmission after processing to host computer; Described acquisition processing module comprises the acquisition process unit, and the quantity of acquisition process unit is not less than 1, and the enable pin between the acquisition process unit is mutually connected in series; The mutual parallel join of synchronous pin of acquisition process unit.Its role is to: first acquisition process unit in acquisition process unit group can carry out digital processing element child node group and the node number distribution function of automatic capable freely changing, this moment can additions and deletions at any time between node, have improved the image data flexibility ratio; And with the speed of 921600bit/s with data upload to host computer.。
Further, described acquisition process unit is not less than two.
Further, described host computer is computing machine, Intelligent mobile equipment.
Further, described acquisition process unit is provided with dsp chip.
Further, described 485 converters are USB-485 converters.
advantage and good effect that the present invention has are: owing to adopting technique scheme, by 485 buses, the bus system that acquisition processing module and host computer coordinate can be carried out by first acquisition process unit in acquisition process unit group digital processing element child node group and the node number distribution function of automatic capable freely changing, traffic rate is fast, communication efficiency is up to the 1M left and right, make mass data can be sent to efficiently in order at short notice computing machine, the collection signal time is controlled and accurately is applicable to gather simultaneously the application scenario that requires, system simple and reliable only by one a little the ordinary person of training can arrangements of operations system.Have use convenient, processing cost is low, the collecting efficiency advantages of higher.
Description of drawings
Fig. 1 is structural representation of the present invention
Fig. 2 is acquisition process cellular construction schematic diagram of the present invention
In figure:
1, synchronous pin DI 2, synchronous pin DO 3, acquisition process unit
4, enable pin DI 5, enable pin DO 6, node distribute control line
7,485 buses
Embodiment
As shown in Figure 1, the course of work of the present invention: whole bus system is coordinated by 485 buses 7, acquisition processing module and host computer distributes acquisition process unit 3 child nodes number to acquisition process unit 3 automatically.Host computer sends whole system after data acquisition command automatically to carry out the collection of data and can be selectively acquisition process unit 3 the data obtaineds be sent to host computer.The USB-485 converter that system control box 485 buffer circuits adopt high speed circuits and host computer access bus also by CP2102USB transit chip therewith high speed circuit coordinate, make the traffic rate of whole system can be up to 921600bit/s.Each acquisition process unit 3 adopts 24V direct current supply host node USB-485 converters to supply with the 5V power supply by computing machine USB mouth.The child node distribution function of described automatic distribution acquisition process unit 3 can be redistributed by the change of line at any time.Adopt high-speed communication unit and circuit to make whole bus system be operated in the high bit rate, can make successively each acquisition process unit 3 carry out image data with the interval of several microseconds, to realize high speed acquisition.Each acquisition process unit 3 is assigned as the matrix form grouping and can distributes respectively group number and child node number to be beneficial to the efficient operation of maximization, complicated system.
First acquisition process unit 3 in acquisition process unit group is that node number is the acquisition process unit 3 of 1 group No. 0 (1-0), be the acquisition process unit 3 of 1 group No. 1 (1-1) by the node number of second acquisition process unit 3, the like until N acquisition process unit 3 node number acquisition process that is 1 group No. N (1-N) unit 3.Enable pin DO5 and the node number that by node number is the acquisition process unit 3 of 1 group No. 0 (1-0) is that the enable pin DI4 of the acquisition process unit 3 of 1 group No. 1 (1-1) is connected, and node number is that the enable pin DO5 of the acquisition process unit 3 of 1 group No. 1 (1-1) is connected with the enable pin DI4 of next acquisition process unit 3; The like connection, until be connected with the enable pin DI4 of N acquisition process unit 3.By computing machine host node sending node assignment commands at first, begin to coordinate and automatically distribute child node, and allocation result is sent to computing machine when the present invention works.Send acquisition by computing machine as host node (0-0) when carrying out data acquisition, unified to transmit completion signal to host node by 485 buses 7 after each child node image data of signals collecting level are completed by acquisition process unit 3 transmissions that node number is 1 group No. 0 (1-0).And select node data and receive by computing machine host node (0-0).
As host node, distribution node number is 0 group No. 0 (0-0) by computing machine, and computing machine is switched to each acquisition process unit 3 by USB-485 converter access 485 bus 7,485 buses 7 by bus type topological structure.Node distribute control line 6 by prepare to be set to node number be the synchronous pin DO2 output of acquisition process unit 3 of the child node (1-0) of 1 group No. 0 (1-0) to be connected to node number be that 1 group No. 0 (1-0) synchronous pin DI1 and node number are the synchronous pin DI1 input of the acquisition process unit 3 of 1 group No. 1 (1-1), by that analogy until be connected at last the synchronous pin DI1 that node number is the end acquisition process unit 3 of 1 group No. N (1-N).Can draw the synchronous pin DI1 input port that the sync level control line is connected to respectively each acquisition process unit 3 by the synchronous pin DO2 mouth that node number is 1 group of No. 0 (1-0) acquisition process unit 3 in order to realize all child node synchronized samplings.Access each acquisition process unit 3 through the analog quantity source signal of signal element group by the analog output mouth.
the power supply unit of acquisition process of the present invention unit 3 is converted to corresponding level to each unit power supply by outside 24V power interface 1 power taking and by power supply unit 2 as shown in Figure 2, DSP control chip 3 is responsible for controlling the processing of all unit co-ordinations and data, analog input unit 4 is responsible for the collection of analog quantity and is sent to the DSP control chip, 485 communication units 5 are responsible for being connected to 485 buses 7 and communicating by letter swap data with the DSP control chip by outside 485 communication interfaces, digital quantity input/output module 6 is responsible for the 3.3VIO mouth level signal of DSP control chip is converted to the 24V level signal and carries out digital level input and output by external interface.
Above one embodiment of the present of invention are had been described in detail, but described content is only preferred embodiment of the present invention, can not be considered to be used to limiting practical range of the present invention.All equalizations of doing according to the present patent application scope change and improve etc., within all should still belonging to patent covering scope of the present invention.
Claims (7)
- A multinode based on 485 buses automatically distribute, high-speed data acquiring device, comprise signal element group, acquisition processing module, host computer, signal element is connected in series with acquisition processing module respectively, respectively the secondary signal is exported to acquisition processing module; Acquisition processing module is connected with host computer, with the digital data transmission after processing to host computer; It is characterized in that: acquisition processing module comprises acquisition process unit, 485 buses; The signal element group comprises signal element, and signal element is connected with each collecting unit, and collecting unit is connected with host computer by 485 buses; Enable pin between the acquisition process unit is mutually connected in series; The mutual parallel join of synchronous pin of acquisition process unit, the node number of acquisition process unit distributes automatically.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: the signal element group comprises voltage sensor unit, current sensing unit or Current Mutual Inductance unit.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: described host computer is computing machine, Intelligent mobile equipment.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: described acquisition process unit is provided with dsp chip.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: described 485 converters are USB-485 converters.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: the signal element group comprises and is not less than 1 signal element.
- Multinode based on 485 buses according to claim 1 automatically distribute, high-speed data acquiring device, it is characterized in that: the quantity of acquisition process unit is not less than 2.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109799758A (en) * | 2019-01-29 | 2019-05-24 | 上海度普新能源科技有限公司 | A kind of CAN bus application system and the method for numbering serial for handling node |
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| US5428357A (en) * | 1993-05-28 | 1995-06-27 | Sensar Corporation | High speed data acquisition system and method |
| CN2491901Y (en) * | 2001-09-26 | 2002-05-15 | 郑肖惺 | General analog and digital data acquisition and control signal regulator |
| CN101340568A (en) * | 2007-07-02 | 2009-01-07 | 同方威视技术股份有限公司 | Data collecting system |
| CN102023808A (en) * | 2010-12-07 | 2011-04-20 | 北京理工大学 | Multi-channel synchronous data acquisition card |
| CN203232289U (en) * | 2012-12-14 | 2013-10-09 | 天津瑞能电气有限公司 | Medium range multinode acquisition apparatus based on 485 bus |
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2012
- 2012-12-14 CN CN2012105444211A patent/CN103093004A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5428357A (en) * | 1993-05-28 | 1995-06-27 | Sensar Corporation | High speed data acquisition system and method |
| CN2491901Y (en) * | 2001-09-26 | 2002-05-15 | 郑肖惺 | General analog and digital data acquisition and control signal regulator |
| CN101340568A (en) * | 2007-07-02 | 2009-01-07 | 同方威视技术股份有限公司 | Data collecting system |
| CN102023808A (en) * | 2010-12-07 | 2011-04-20 | 北京理工大学 | Multi-channel synchronous data acquisition card |
| CN203232289U (en) * | 2012-12-14 | 2013-10-09 | 天津瑞能电气有限公司 | Medium range multinode acquisition apparatus based on 485 bus |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109799758A (en) * | 2019-01-29 | 2019-05-24 | 上海度普新能源科技有限公司 | A kind of CAN bus application system and the method for numbering serial for handling node |
| CN109799758B (en) * | 2019-01-29 | 2024-03-22 | 上海度普新能源科技有限公司 | CAN bus application system and numbering method of processing nodes |
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Application publication date: 20130508 |