CN203225651U - Control circuit for converter - Google Patents
Control circuit for converter Download PDFInfo
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- CN203225651U CN203225651U CN 201320205926 CN201320205926U CN203225651U CN 203225651 U CN203225651 U CN 203225651U CN 201320205926 CN201320205926 CN 201320205926 CN 201320205926 U CN201320205926 U CN 201320205926U CN 203225651 U CN203225651 U CN 203225651U
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Abstract
The utility model discloses a control circuit for a converter, comprising a diagonal square wave generator, a drive circuit, a slope compensation circuit, a signal superposition circuit, a current sampling circuit, a clamping circuit, a first amplifier, a second amplifier, a first MOS transistor, a second MOS transistor, an inductor, a capacitor, a first resistor, a second resistor, a third resistor and a fourth resistor. The first terminal of the inductor is a voltage input terminal; the second terminal of the inductor is respectively connected to the drain electrode of the second MOS transistor and the drain electrode of the first MOS transistor; and a signal output terminal of the drive circuit is respectively connected to the grid electrode of the second MOS transistor and the grid electrode of the first MOS transistor. The control circuit for the converter is low in cost and can directly control an interference source and eliminate the interference.
Description
Technical field
The utility model relates to a kind of control circuit, relates in particular to a kind of control circuit for converter.
Background technology
The braking measure of existing switch converters electromagnetic interference is closed with radiation, is cut off the route of transmission of electromagnetic interference from the misfortune of eliminating between interference source and the disturbed equipment mostly, as utilizes metal or the radiation of macromolecular material mask switch converter electromagnetic coupled; The electromagnetic radiation energy that utilizes resistor-type, dielectric type and magnetizing mediums type absorbing material that switch converters is produced is converted into other energy (mainly being heat energy) and dissipates; Utilize various filters or suppress the switch converters Conducted Electromagnetic Interference with high-power factory rectifier, and utilize ground connection, float, photoelectricity coupling, pcb board wiring technique reduce that electromagnetic pollution is propagated and emission.But their distinct disadvantage is to eliminate interference less than directly controlling interference source, has only increased hardware volume and cost, has bigger blindness.
Soft switch technique is attempted by reducing electric current, the voltage stress of power switch pipe, reach and reduce electric current, voltage high-frequency harmonic, to improve Electro Magnetic Compatibility, 1996, the researcher in CPES research center adopts Zero voltage transition and hard switching circuit that the conducted interference of two single-phase 400WPFC booster converter experimental models is compared experiment respectively, test result is unexpected, adopt soft switch transducer and the EMI difference between hard-switching converter of ZVT technology very little, if the resonant circuit of ZVT is improper even, can make EMI higher.In soft switch circuit topology, the electromagnetic interference of main switch element reduces, but auxiliary switch element is introduced new electromagnetic interference, becomes important interference source, is difficult to realize optimize when main topological sum is assisted topology.Because soft switch technique does not improve EMI yet on mechanism at all, actual effect is limited.
The utility model content
The purpose of this utility model provides a kind of cost low with regard to being in order to address the above problem, and directly controls interference source and eliminate the control circuit that is used for converter that disturbs.
In order to achieve the above object, the utility model has adopted following technical scheme:
A kind of control circuit for converter, comprise oblique square-wave generator, drive circuit, slope compensation circuit, superimposed signal circuit, current sampling circuit, clamp circuit, first amplifier, second amplifier, first metal-oxide-semiconductor, second metal-oxide-semiconductor, inductance, electric capacity, first resistance, second resistance, the 3rd resistance and the 4th resistance, first end of described inductance is voltage input end, second end of described inductance is connected with the drain electrode of described second metal-oxide-semiconductor and the drain electrode of described first metal-oxide-semiconductor respectively, the signal output part of described drive circuit is connected with the grid of described second metal-oxide-semiconductor and the grid of described first metal-oxide-semiconductor respectively, the signal input part of described drive circuit is connected with first signal output part of described oblique square-wave generator and the signal output part of described first amplifier respectively, the secondary signal output of described oblique square-wave generator is connected with the signal input part of described slope compensation circuit, the signal output part of described slope compensation circuit is connected with first signal port of described superimposed signal circuit and first signal port of described clamp circuit respectively, the secondary signal port of described clamp circuit is connected with described first amplifier's inverting input, the 3rd signal port of described clamp circuit is connected with the signal output part of described second amplifier, the input in the same way of described first amplifier is connected with the secondary signal port of described superimposed signal circuit, the 3rd signal port of described superimposed signal circuit is connected with first signal port of described current sampling circuit, the secondary signal port of described current sampling circuit is connected with the source electrode of described first metal-oxide-semiconductor, the 3rd signal port of described current sampling circuit is connected with first end of described the 4th resistance, the in-phase input end of described second amplifier is connected with external circuits, described second amplifier's inverting input is connected with first end of described first resistance and first end of described second resistance respectively, second end of described first resistance respectively with the source electrode of described second metal-oxide-semiconductor, first end of described electric capacity is connected with first end of described the 3rd resistance, first end of described the 3rd resistance is voltage output end, second end of described the 3rd resistance, second end of described electric capacity, second end of described second resistance and second end of described the 4th resistance be ground connection respectively.
The beneficial effects of the utility model are:
The cost of a kind of control circuit for converter of the utility model is low, and directly controls interference source and eliminate and disturb.
Description of drawings
Fig. 1 is the circuit diagram of a kind of control circuit for converter of the utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing:
As shown in Figure 1, a kind of control circuit for converter of the utility model, it is characterized in that: comprise oblique square-wave generator, drive circuit, slope compensation circuit, superimposed signal circuit, current sampling circuit, clamp circuit, the first amplifier IC1, the second amplifier IC2, the first metal-oxide-semiconductor M1, the second metal-oxide-semiconductor M2, inductance L, capacitor C, first resistance R 1, second resistance R 2, the 3rd resistance R 3 and the 4th resistance R 4, first end of inductance L is voltage input end, second end of inductance L is connected with the drain electrode of the second metal-oxide-semiconductor M2 and the drain electrode of the first metal-oxide-semiconductor M1 respectively, the signal output part of drive circuit is connected with the grid of the second metal-oxide-semiconductor M2 and the grid of the first metal-oxide-semiconductor M1 respectively, the signal input part of drive circuit is connected with first signal output part of oblique square-wave generator and the signal output part of the first amplifier IC1 respectively, tiltedly the secondary signal output of square-wave generator is connected with the signal input part of slope compensation circuit, the signal output part of slope compensation circuit is connected with first signal port of superimposed signal circuit and first signal port of clamp circuit respectively, the secondary signal port of clamp circuit is connected with the inverting input of the first amplifier IC1, the 3rd signal port of clamp circuit is connected with the signal output part of the second amplifier IC2, the input in the same way of the first amplifier IC1 is connected with the secondary signal port of superimposed signal circuit, the 3rd signal port of superimposed signal circuit is connected with first signal port of current sampling circuit, the secondary signal port of current sampling circuit is connected with the source electrode of the first metal-oxide-semiconductor M1, the 3rd signal port of current sampling circuit is connected with first end of the 4th resistance R 4, the in-phase input end of the second amplifier IC2 is connected with external circuits, the inverting input of the second amplifier IC2 is connected with first end of first resistance R 1 and first end of second resistance R 2 respectively, second end of first resistance R 1 respectively with the source electrode of the second metal-oxide-semiconductor M2, first end of capacitor C is connected with first end of the 3rd resistance R 3, first end of the 3rd resistance R 3 is voltage output end, second end of the 3rd resistance R 3, second end of capacitor C, second end of second end of second resistance R 2 and the 4th resistance R 4 is ground connection respectively.
Claims (1)
1. control circuit that is used for converter, it is characterized in that: comprise oblique square-wave generator, drive circuit, slope compensation circuit, superimposed signal circuit, current sampling circuit, clamp circuit, first amplifier, second amplifier, first metal-oxide-semiconductor, second metal-oxide-semiconductor, inductance, electric capacity, first resistance, second resistance, the 3rd resistance and the 4th resistance, first end of described inductance is voltage input end, second end of described inductance is connected with the drain electrode of described second metal-oxide-semiconductor and the drain electrode of described first metal-oxide-semiconductor respectively, the signal output part of described drive circuit is connected with the grid of described second metal-oxide-semiconductor and the grid of described first metal-oxide-semiconductor respectively, the signal input part of described drive circuit is connected with first signal output part of described oblique square-wave generator and the signal output part of described first amplifier respectively, the secondary signal output of described oblique square-wave generator is connected with the signal input part of described slope compensation circuit, the signal output part of described slope compensation circuit is connected with first signal port of described superimposed signal circuit and first signal port of described clamp circuit respectively, the secondary signal port of described clamp circuit is connected with described first amplifier's inverting input, the 3rd signal port of described clamp circuit is connected with the signal output part of described second amplifier, the input in the same way of described first amplifier is connected with the secondary signal port of described superimposed signal circuit, the 3rd signal port of described superimposed signal circuit is connected with first signal port of described current sampling circuit, the secondary signal port of described current sampling circuit is connected with the source electrode of described first metal-oxide-semiconductor, the 3rd signal port of described current sampling circuit is connected with first end of described the 4th resistance, the in-phase input end of described second amplifier is connected with external circuits, described second amplifier's inverting input is connected with first end of described first resistance and first end of described second resistance respectively, second end of described first resistance respectively with the source electrode of described second metal-oxide-semiconductor, first end of described electric capacity is connected with first end of described the 3rd resistance, first end of described the 3rd resistance is voltage output end, second end of described the 3rd resistance, second end of described electric capacity, second end of described second resistance and second end of described the 4th resistance be ground connection respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320205926 CN203225651U (en) | 2013-04-23 | 2013-04-23 | Control circuit for converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320205926 CN203225651U (en) | 2013-04-23 | 2013-04-23 | Control circuit for converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203225651U true CN203225651U (en) | 2013-10-02 |
Family
ID=49252641
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320205926 Expired - Fee Related CN203225651U (en) | 2013-04-23 | 2013-04-23 | Control circuit for converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203225651U (en) |
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2013
- 2013-04-23 CN CN 201320205926 patent/CN203225651U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20131002 Termination date: 20140423 |