CN203217562U - External equipment and heterogeneous equipment transmission system - Google Patents
External equipment and heterogeneous equipment transmission system Download PDFInfo
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- CN203217562U CN203217562U CN 201320118016 CN201320118016U CN203217562U CN 203217562 U CN203217562 U CN 203217562U CN 201320118016 CN201320118016 CN 201320118016 CN 201320118016 U CN201320118016 U CN 201320118016U CN 203217562 U CN203217562 U CN 203217562U
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Abstract
The utility model discloses an external equipment and heterogeneous equipment transmission system which is characterized by being connected with PCI-E equipment through a USB3.0 interface. The external equipment comprises a USB3.0 interface, a first control module and a microcontroller, wherein the USB3.0 interface is connected to a host; the USB3.0 interface comprises multiple first pins and multiple second pins; the first control module is connected to the second pins of the USB3.0 interface; the first control module receives an operating signal from the host; the microcontroller is coupled to the first pins of the USB3.0 interface and the first control module; the microcontroller receives an identification request through the first pins; the microcontroller generates an identification signal according to the identification request and transmits the identification signal to the first control module, so that the external equipment can be normally operated under an accurate clock rate.
Description
[technical field]
The transmission system of a kind of external equipment and heterogeneous equipment is particularly to a kind of USB3.0 of seeing through and connects the external equipment of PCI-E and the transmission system of heterogeneous equipment.
[background technology]
Along with the fast development of integrated circuit, make that the volume of computing machine can be compact and reach arithmetic capability faster.For small-size computer, the main frame volume inside will limit to some extent.Therefore small-size computer can not provide the expansion of interface card.So, will seeing through external mode if will increase other equipment newly, expands by small-size computer.Generally speaking, universal serial bus (Universal Serial Bus is called for short USB) is the item interface of very ripe external equipment.The characteristics of USB are to support hot plug (Hot-Plug) and plug and play (Plug-and-Play).And the USB3.0 interface also can be compatible to old-fashioned USB2.0 and USB1.1 device.
Along with transmitting demand in a large number and fast, make USB also develop into the third edition (hereinafter to be referred as USB3.0).The transmission speed of USB3.0 is increased to 5G (Giga bps).So USB3.0 can provide transmission speed more fast.Therefore there is manufacturer to propose other transmission interfaces are converted to the USB3.0 interface.The interface that other heterogeneous equipment can see through USB3.0 is connected in host side, makes the interface of single kind reach the connection of number of different types equipment.Because the kind of other transmission interfaces is different from the USB3.0 interface, be to be referred to as heterogeneous equipment in this manual therefore.A kind of " the outer welding system with USB3.0 and PCI-E interface " (hereinafter to be referred as the M375925 case) proposed in the Republic of China patent No. M375925 case.The connecting line that the M375925 case allows have the peripheral equipment linkage interface device of (Peripheral Component Interconnect Express is hereinafter to be referred as PCI-E) see through USB3.0 is connected with computer.
The M375925 case is adjusted the transmission connecting-leg in the USB3.0 joint, makes the electronic installation of PCI-E can be connected in the USB3.0 interface by the joint of USB3.0.Though such mode can realize being connected of PCI-E device and USB3.0.But the M375925 case is directly joined the differential voltage pin (D+, D-) of USB3.0 and the reference clock pulse pin (REFCLK+, REFCLK-) of PCI-E.Because the signal that clock pulse pin and differential voltage pin transmit is also inequality, the PCI-E device also can't be obtained corresponding clock pulse.So under the situation of no correct clock pulse, the PCI-E device is carried out the operation result that corresponding operation will make a mistake.Therefore, the M375925 case there is no two kinds of agreement operations under different clock pulses of actual solution.
[summary of the invention]
The utility model provides a kind of transmission system of heterogeneous equipment, it is characterized in that according to the equipment that connects and selects the host-host protocol of corresponding kind.The transmission system of heterogeneous equipment of the present utility model comprises PCI-E equipment and host side.PCI-E equipment has first interface, microcontroller and the first control module, and microcontroller is coupled to the first control module, and first interface has a plurality of first pins and a plurality of second pin; Host side is connected in PCI-E equipment, and host side has second interface and the second control module, and the second interface correspondence is arranged at first interface of PCI-E equipment; Wherein, when PCI-E equipment is connected in host side, the second control module sees through first pin and is coupled to microcontroller, the second control module sees through second pin and is coupled to the first control module, the second control module sees through first pin and drives microcontroller, make microcontroller send recognition signal to the first control module, the second control module sees through second pin to the first control module transmit operation signal.The utility model proposes a kind of external equipment in addition, it is characterized in that seeing through the USB3.0 interface and connects PCI-E equipment.
External equipment of the present utility model comprises USB3.0 interface, first control module and the microcontroller.The USB3.0 interface is connected in host side, and the USB3.0 interface has a plurality of first pin positions and a plurality of crus secundas position; The first control module is connected in the crus secunda position of USB3.0 interface, and the first control module receives the operation signal that comes from host side; Microcontroller is coupled to the first pin position and the first control module of USB3.0 interface, and microcontroller sees through the first pin position and receives the identification requirement, and microcontroller requires to produce recognition signal according to identification, and recognition signal is sent to the first control module.
The transmission system of external equipment of the present utility model and heterogeneous equipment can provide PCI-E equipment required correct clock pulse of when operation, so the purpose of the realization hot plug that the utility model can be complete.The utility model can be connected outside the USB3.0 equipment by the USB3.0 interface, also can connect PCI-E equipment, so can reach the purpose of saving the space.Relevant characteristics and implementation of the present utility model cooperate graphicly to be described in detail as follows as most preferred embodiment now.
[description of drawings]
The 1st figure is Organization Chart of the present utility model.
The 2nd figure is the pin position configuration schematic diagram of first interface of the present utility model.
The 3rd figure is operation workflow synoptic diagram of the present utility model.
The 4th figure is another kind of operation workflow synoptic diagram of the present utility model.
[embodiment]
Please refer to shown in the 1st figure, it is Organization Chart of the present utility model.The transmission system 100 of heterogeneous equipment of the present utility model comprises PCI-E equipment 110 and host side 120.PCI-E equipment 110 has first interface 111, microcontroller 112 (Micro Control Unit is called for short MCU) and the first control module 113 (PCI-EHost).Microcontroller 112 is coupled to first interface 111 and the first control module 113.Can write relevent information and the driver of PCI-E equipment 110 in the microcontroller 112.First interface 111 comprises a plurality of first pins 114 and second pin 115.For realizing compatible purpose downwards, so comprised USB2.0 pin and USB3.0 pin in the USB3.0 interface simultaneously.Be defined as first pin 114 at this each pin with the USB2.0 in first interface 111, each pin of USB3.0 is defined as second pin 115.First pin 114 is coupled to microcontroller 112 and host side 120.Second pin 115 is coupled to the first control module 113 and host side 120.What first interface 111 adopted is the USB3.0 host-host protocol.First interface 111 can adopt USB A type (USB A type) or USB Type B (USB B type).
The pin configuration of adopting in first interface 111 of the present utility model please cooperate shown in the 2nd figure shown in please refer to hereinafter, and it is the pin position configuration schematic diagram of first interface of the present utility model.First branch connecting pin is first pin 114, connects the electric power pin (VBus) of USB2.0 and the electric power pin (Vcc) of PCI-E.Second branch connecting pin is first pin 114, connects the differential voltage pin (D-) of USB2.0 and the differential voltage pin (D-) of USB2.0.The 3rd branch connecting pin is first pin 114, connects the differential voltage pin (D+) of USB2.0.The 4th branch connecting pin is first pin 114, connects the ground connection pin (GND) of USB2.0 and the ground connection pin (GND) of PCI-E.
The 5th branch connecting pin is second pin 115, connects the reception pin (RX-) of USB3.0 and the PERn pin (PCI Express Receive Negative signal) of PCI-E.The 6th branch connecting pin is second pin 115, connects the reception pin (RX+) of USB3.0 and the PERp pin (PCI Express Receive Positive signal) of PCI-E.The 7th branch connecting pin is second pin 115, connects the ground connection pin of USB3.0 and the ground connection pin of PCI-E.The 8th branch connecting pin is second pin 115, connects the transmission connecting-leg (TX-) of USB3.0 and the PETn pin (PCI Express Transmit Negative signal) of PCI-E.The 9th branch connecting pin is second pin 115, connects the transmission connecting-leg (TX+) of USB3.0 and the PETp pin (PCI Express Transmit Positive signal) of PCI-E.
For clearly demonstrating the sequence of operations of the utility model in start process, please cooperate shown in the 3rd figure, it is operation workflow synoptic diagram of the present utility model.The transmission method of heterogeneous equipment of the present utility model may further comprise the steps:
Step S310: second interface that extension facility is connected in host side;
Step S320:BIOS judges that the kind of extension facility is USB3.0 equipment or PCI-E equipment;
Step S330: if extension facility is USB3.0 equipment, operated by the USB3.0 equipment of BIOS;
Step S340: if extension facility is PCI-E equipment, first pin that is seen through first interface by BIOS drives the microcontroller of PCI-E equipment and produces recognition signal;
Step S350:BIOS sees through a plurality of second pin transmission operation signals of first interface to the first control module of PCI-E equipment;
Step S360: recognition signal is sent to the first control module; And
Step S370: the first control module is operated accordingly according to recognition signal and operation signal.
Be equipment before the difference identification and the equipment after the identification, when this will connect and the device definition of not identification be extension facility.The mode that extension facility is seen through cable or joint is connected in host side 120.Because host side 120 is in the open state, therefore can be responsible for the role of the second control module 122 by BIOS.
BIOS can confirm the kind of extension facility through the mode of timing and inquiry unit information.After BIOS was sending the identification requirement, BIOS can wait for the response of microcontroller 112.Owing to put down in writing the relevent information of this PCI-E equipment 110 or USB3.0 equipment in the microcontroller 112, so microcontroller 112 is received the identification requirement and can be produced corresponding response signal.If through after the preset period of time, BIOS receives the response signal of microcontroller 112, and then BIOS will identify PCI-E equipment 110.If do not receive the response signal yet through after the preset period of time, BIOS will be considered as USB3.0 equipment to the equipment that second interface 121 connects.If USB3.0 equipment, then BIOS can connect through program originally.
If the extension facility that connects is PCI-E equipment 110, then the BIOS microcontroller 112 that sees through first pin 114 of first interface 111 and drive PCI-E equipment 110 is in order to produce recognition signal.Wherein, the kind of recognition signal comprises replacement signal (Reset), wakes signal (Wakeup) and sleep signal (Sleep) up.And the recognition signal that microcontroller 112 produces system cooperates the control of PCI-E equipment 110, so PCI-E equipment 110 can cooperate correct sequential when executable operations.And BIOS sees through a plurality of second pin, 115 transmission operation signals of first interface 111 to the first control module 113 of PCI-E equipment 110.Execution sequence for step S350 and S360 is not only to be confined to this, these steps can be carried out or exchange sequence simultaneously for this area person yet.
The utility model is except in the aforesaid start process, and it is in service also can be applied in operating system.When operating system is moved, because BIOS will can not carry out management and control to peripheral hardware.So when operating system is moved, be the role who is served as the second control module 122 by operating system.Please refer to shown in the 4th figure, it is another kind of operation workflow synoptic diagram of the present utility model.This enforcement aspect may further comprise the steps:
Step S410: second interface that extension facility is connected in host side;
Step S420: operating system judges that the kind of extension facility is USB3.0 equipment or PCI-E equipment;
Step S430: if extension facility is USB3.0 equipment, by operating system USB3.0 equipment is operated;
Step S440: if extension facility is PCI-E equipment, first pin that is seen through first interface by operating system drives the microcontroller of PCI-E equipment and produces recognition signal;
Step S450: operating system sees through a plurality of second pin transmission operation signals of first interface to the first control module of PCI-E equipment;
Step S460: recognition signal is sent to the first control module; And
Step S470: the first control module is operated accordingly according to recognition signal and operation signal.
Because operating system therefore will be with operating system as the second control module 122 after finishing start for the tangible control power of the hardware of host side 120.When the operation system detects second interface 121 when having device to insert, operating system will be called relevant interrupt routine.May be with the difference of authorship system kind for described interrupt routine, and different implementation is arranged.
When being connected in host side 120 operating systems, extension facility can will recognize the microcontroller 112 that requires to be sent to PCI-E equipment 110 through first pin 114.If extension facility is received the identification requirement, then microcontroller 112 will return a response message and give host side 120.Operating system is after receiving response message, and operating system can be recognized the kind of extension facility according to response message, and calls relevant interruption processing and carry out this equipment connection.Windows workspace system (Windows OS) with Microsoft (Microsoft) is example, the windows workspace system can the calling system management interrupt (System Management Interrupt is called for short SMI) or driver (Driver) as the identification of PCI-E equipment 110 be connected.
Next, drive the microcontroller 112 of PCI-E equipment 110 and produce recognition signal by first pin 114 of operating system through first interface 111.And the recognition signal that microcontroller 112 produces system cooperates the control of PCI-E equipment 110, so PCI-E equipment 110 can cooperate correct sequential when executable operations.And operating system sees through a plurality of second pin, 115 transmission operation signals of first interface 111 to the first control module 113 of PCI-E equipment 110.Execution sequence for step S450 and S460 is not only to be confined to this, these steps can be carried out or exchange sequence simultaneously for this area person yet.
Required correct clock pulse when the transmission system 100 of external equipment of the present utility model and heterogeneous equipment can provide PCI-E equipment 110 operation, so the purpose of the realization hot plug that the utility model can be complete.The utility model can be connected outside the USB3.0 equipment by the USB3.0 interface, also can connect PCI-E equipment 110.So can reach outside the purpose of saving the space, the utility model has also been taken into account the purpose of practicality.
Though the utility model discloses as above with aforementioned preferred embodiment; so it is not in order to limit the utility model; anyly have the knack of alike skill person; in the spirit and scope that do not break away from the utility model; when can doing a little change and retouching, so the scope of patent protection of the utility model must be looked the appended claim person of defining of this instructions and is as the criterion.
Claims (8)
1. the transmission system of a heterogeneous equipment is characterized in that according to the equipment that connects and selects the host-host protocol of corresponding kind, and the transmission system of this heterogeneous equipment comprises:
One PCI-E equipment has one first interface, a microcontroller and one first control module, and this microcontroller is coupled to this first control module, and this first interface has a plurality of first pins and a plurality of second pin; And
One host side is connected in this PCI-E equipment, and this host side has one second interface and one second control module, and this second interface correspondence is arranged at this first interface of this PCI-E equipment;
Wherein, when this PCI-E equipment is connected in this host side, this second control module sees through this first pin and is coupled to this microcontroller, this second control module sees through this second pin and is coupled to this first control module, this second control module sees through those first pins and drives this microcontroller, this microcontroller sends a recognition signal to this first control module, and this second control module sees through this second pin and sends an operation signal to this first control module.
2. as the transmission system of the heterogeneous equipment as described in the request 1, it is characterized in that the pin position of this second interface is arranged as: first branch connecting pin be this first pin, the electric power pin of connection USB2.0 and the electric power pin of PCI-E; Second branch connecting pin is this first pin, connects the differential voltage pin D-of USB2.0 and the differential voltage pin D-of USB2.0; The 3rd branch connecting pin is this first pin, connects the differential voltage pin D+ of USB2.0; The 4th branch connecting pin is this first pin, connects the ground connection pin of USB2.0 and the ground connection pin of PCI-E; The 5th branch connecting pin is this second pin, connects the reception pin RX-of USB3.0 and the PERn pin of PCI-E; The 6th branch connecting pin is this second pin, connects the reception pin RX+ of USB3.0 and the PERp pin of PCI-E; The 7th branch connecting pin is this second pin, connects the ground connection pin of USB3.0 and the ground connection pin of PCI-E; The 8th branch connecting pin is this second pin, connects the transmission connecting-leg TX-of USB3.0 and the PETn pin of PCI-E; The 9th branch connecting pin is this second pin, connects the transmission connecting-leg TX+ of USB3.0 and the PETp pin of PCI-E.
3. as the transmission system of the heterogeneous equipment as described in the request 1, it is characterized in that this second control module is a BIOS or an operating system.
4. as the transmission system of the heterogeneous equipment as described in the request 3, it is characterized in that this host side in start process, the kind that this BIOS detects the equipment that this second interface connects is USB3.0 equipment or this PCI-E equipment.
5. as the transmission system of the heterogeneous equipment as described in the request 4, it is characterized in that the equipment that this BIOS connects to this USB3.0 interface sends an identification requirement, and receive that equipment that this USB3.0 interface connects returns one respond signal.
6. as the transmission system of the heterogeneous equipment as described in the request 3, it is characterized in that this host side in this operating system operation, the kind that this operating system is detected the equipment that this second interface connects is USB3.0 equipment or this PCI-E equipment.
7. as the transmission system of the heterogeneous equipment as described in the request 6, it is characterized in that the equipment that this operating system connects to this USB3.0 interface sends an identification requirement, and receive that equipment that this USB3.0 interface connects returns one respond signal.
8. an external equipment is characterized in that seeing through the USB3.0 interface and connects PCI-E equipment, and this external equipment comprises:
One USB3.0 interface is connected in a host side, and this USB3.0 interface has a plurality of first pin positions and a plurality of crus secundas position;
One first controls module, is connected in those crus secunda positions of this USB3.0 interface, and this first control module receives an operation signal that comes from this host side; And
One microcontroller, be coupled to those first pin positions and this first control module of this USB3.0 interface, this microcontroller sees through those first pin positions and receives an identification requirement, and this microcontroller requires to produce a recognition signal according to this identification, and this recognition signal is sent to this first control module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320118016 CN203217562U (en) | 2013-03-14 | 2013-03-14 | External equipment and heterogeneous equipment transmission system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201320118016 CN203217562U (en) | 2013-03-14 | 2013-03-14 | External equipment and heterogeneous equipment transmission system |
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| CN203217562U true CN203217562U (en) | 2013-09-25 |
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| CN 201320118016 Expired - Lifetime CN203217562U (en) | 2013-03-14 | 2013-03-14 | External equipment and heterogeneous equipment transmission system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112768978A (en) * | 2019-11-05 | 2021-05-07 | 沈晓萱 | Connector capable of reducing signal interference |
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2013
- 2013-03-14 CN CN 201320118016 patent/CN203217562U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112768978A (en) * | 2019-11-05 | 2021-05-07 | 沈晓萱 | Connector capable of reducing signal interference |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130925 |