CN203192366U

CN203192366U - SDVO and VGA conversion device based on FPGA

Info

Publication number: CN203192366U
Application number: CN 201320023678
Authority: CN
Inventors: 刘升; 刘波
Original assignee: XI'AN KEYWAY TECHNOLOGY CO LTD
Current assignee: XI'AN KEYWAY TECHNOLOGY CO LTD
Priority date: 2013-01-17
Filing date: 2013-01-17
Publication date: 2013-09-11
Anticipated expiration: 2023-01-17

Abstract

A SDVO and VGA conversion device based on FPGA comprises inputted SDVO, FPGA and an output VGA display in sequence; the FPGA comprises digital signals HSY and VSY portion; and the FPGA is also connected with an external video DAC chip. The SDVO and VGA conversion device based on FPGA has a simple hardware circuit, is high in reliability, concise in software code, and high in execution efficiency.

Description

A kind of SDVO and VGA conversion equipment based on FPGA

Technical field

The utility model relates to a kind of SDVO based on FPGA and VGA conversion equipment.Be specifically related to a kind ofly finish SDVO and VGA display interface Data Format Transform by FPGA.

Background technology

SDVO is a kind of video interface standard of Intel's exploitation, and full name is the output of Serial Digital Video Output(serial digital video).The SDVO interface is integrated on the X86 series CPU, and the regular display interface is the VGA interface, needs in actual applications to realize that by bridging chip SDVO to the VGA interface conversion, could connect display.

Summary of the invention

The utility model is a kind of SDVO based on FPGA and VGA conversion equipment, and this device is resolved the SDVO data by FPGA, then data-switching is become the VGA signal, realizes interface conversion.

Have that hardware circuit is simple, reliability is high, software code is terse, carry out the efficient advantages of higher.

The technical solution of the utility model is:

A kind of based on the SDVO of FPGA and the device of VGA interface conversion, its special character is that this device comprises successively:

SDVO, FPGA and the outputting VGA display of input;

Described FPGA comprises by logic realization with the frequency divider of SDVO clock signal frequency division, convert the serial data of SDVO to parallel data by logic realization, decode again, the digital signal HSY that resolving and produce the VGA display needs also is connected outside video DAC chip with VSY part, described FPGA, described FPGA is according to decoding SDVO data, the video DAC chip that control is outside produces the simulating signal that the display driver interface needs.

The resistance of above-mentioned VGA display external impedance coupling.

A kind of based on the SDVO of FPGA and the implementation method of VGA interface conversion, this method comprises:

1) at first, FPGA is by detecting the VGA signal, and identification equipment is set up communication by SDVO interface and CPU then, is configured; The inner high speed serialization controller of realizing of FPGA, internal register obtains the EDID information of display by the SDVO operational code, and the computing of FPGA monitor display sends to CPU; Described high speed serialization controller refers to 1.0Gbps serialization controller at least;

2) after VGA interface and SDVO interface were shaken hands success, FPGA resolved the SDVO data; The SDVO data-signal comprises 1 couple of differential clock signal CLK and 3 couples of differential data signals R/G/B, and input signal is 10 serial data, and transfer rate is 1-2Gbits/s, and the input clock rate signal is 1/10 of signal rate;

3) FPGA produces the required digital controlled signal of VGA interface according to SDVO protocol conversion data layout; The 10 bit serial data sync that FPGA will import convert 10 bit parallel data to; The inner realization of FPGA decoded, and 10 bit parallel data is mapped to 8 vision signal R/G/B and synchronous control signal Hsync/ Vsync;

4) FPGA controls outside DAC and produces the required simulating signal of VGA interface, by impact damper output synchronizing signal; FPGA finishes after the decoding, directly realizes the RGB conversion by external video digital to analog converter DAC, driving display, and synchronous control signal Hsync/ Vsync drives the VGA display through inner impact damper output;

5) in order to obtain good display effect, need carry out impedance matching to the signal of video A/D converter output; 75 Ohmages are adopted in impedance matching; The signal of converter output and synchronizing signal adopt two-stage Π shape LC wave filter, and filter inductance and electric capacity can be selected according to the realization circuit, but filter inductance value and capacitance should be suitable, in order to avoid influence characteristics of signals.

Above-mentioned with FPGA realization Video Controller function, parsing SDVO data, simulation VGA signal, sequential.

Advantage of the present utility model is:

The hardware circuit simple and stable, peripheral circuit is few, and instruction operation is fast.

Because fpga chip integrated level height, pin compatibility is good, so it is few and stable not need to add the change-over circuit hardware circuit; Parallel work-flow, execution speed is fast; FPGA chooses flexibly, reduces bridging chip.

Description of drawings

Fig. 1 realizes hardware block diagram for the utility model;

Fig. 2 is the utility model filtering circuit.

Embodiment

Referring to Fig. 1 and Fig. 2,

The utility model is:

Referring to Fig. 1

1, at first, the VGA interface is shaken hands FPGA after the success of shaking hands by FPGA through data transmission and SDVO

Resolve the SDVO data, digital model is changed into simulating signal and the synchronous control signal of VGA.

Referring to Fig. 2,

2, secondly, simulating signal and synchronizing signal filtering are handled, be connected to display device.

Characteristics of the present utility model are:

FPGA chooses flexibly, reduces bridging chip.

Claims

1. SDVO and VGA interface switching device based on a FPGA is characterized in that this device comprises successively:

SDVO, FPGA and the outputting VGA display of input;

Described FPGA comprises that digital signal HSY also is connected outside video DAC chip with VSY part, described FPGA.

2. according to claim 1 described SDVO and VGA interface switching device based on FPGA, it is characterized in that: the resistance of described VGA display external impedance coupling.