CN203191887U - Multi-channel bus converter board card based on field programmable gate array (FPGA) - Google Patents
Multi-channel bus converter board card based on field programmable gate array (FPGA) Download PDFInfo
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- CN203191887U CN203191887U CN 201320170401 CN201320170401U CN203191887U CN 203191887 U CN203191887 U CN 203191887U CN 201320170401 CN201320170401 CN 201320170401 CN 201320170401 U CN201320170401 U CN 201320170401U CN 203191887 U CN203191887 U CN 203191887U
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- fpga
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- bus converter
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- 238000000034 method Methods 0.000 abstract 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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Abstract
The utility model provides a multi-channel bus converter board card based on a field programmable gate array (FPGA). The multi-channel bus converter board card based on the FPGA structurally comprises a printed circuit board, wherein the printed circuit board is provided with FPGA chips, a program counter high (PCH) chip, back board connectors and quad small form-factor pluggable (QSFP) connectors, the FPGA chips can process data, the back board connectors and the QSFP connectors can be connected with a high-speed bus which is arranged on a counting board, 2-4 FPGA chips are arranged, 2-6 back board connectors are arranged, and 6-12 QSFP connectors are arranged. Compared with the prior art, the multi-channel bus converter board card based on the FPGA has the advantages of reasonable design, simple structure and convenient use and the like, can support conversion of central processing unit (CPU) multi-channel high-speed buses, supports high-speed interfaces of the FPGA reach up to 11.Gb/sGTH, achieves the design of multi-channel Intel high-speed bus converters, and has excellent promotion and use value.
Description
Technical field
The utility model relates to field of computer technology, specifically a kind of simple in structure, based on the multiple bus converter integrated circuit board of FPGA.
Background technology
The converter board card structure of prior art is comparatively single, generally is provided with back panel connector and other common connecting interface, and its structure is not supported the conversion of CPU multipath high-speed bus, does not support the FPGA high-speed interface simultaneously yet, and usable range is subjected to certain limitation.
Summary of the invention
Technical assignment of the present utility model is to solve the deficiencies in the prior art, provide a kind of simple in structure, based on the multiple bus converter integrated circuit board of FPGA.
The technical solution of the utility model realizes in the following manner, this a kind of multiple bus converter integrated circuit board based on FPGA, its structure comprises printed circuit board, described printed circuit board is provided with fpga chip, the PCH chip that can carry out data and handle, back panel connector and the QSFP connector that can connect CPU high-speed bus on the calculating plate, described fpga chip is provided with 2～4, back panel connector is provided with 2～6, and the QSFP connector is provided with 6～12.
In this technical scheme, the QPI signal is connected to the GTX interface of fpga chip by back panel connector, and the GTH interface is connected on the change-over panel by the QSFP signal again then.PCH on the integrated circuit board communicates by letter with CPU by DMI simultaneously, and the PCIE of CPU is connected on PCIE expansion draw-in groove and the network chip, realizes the IO function of integrated circuit board.
As preferably, described fpga chip is provided with 2, and back panel connector is provided with 4, and the QSFP connector is provided with 12.
In sum, the beneficial effect that compared with prior art produces of the utility model is:
A kind of multiple bus converter board jig based on FPGA of the present utility model has characteristics such as simple in structure, easy to use, novel, can support the conversion of CPU multipath high-speed bus, support FPGA up to 11.Gb/s GTH high-speed interface, realize multichannel Intel high-speed bus converter design, thereby have good value for applications.
Description of drawings
Accompanying drawing 1 is structural representation block diagram of the present utility model.
Mark in the accompanying drawing is represented respectively:
1, printed circuit board, 2, fpga chip, 3, back panel connector, 4, the PCH chip, 5, the QSFP connector.
Embodiment
Below in conjunction with accompanying drawing a kind of multiple bus converter integrated circuit board based on FPGA of the present utility model is done following detailed description the in detail.
As shown in Figure 1, this a kind of multiple bus converter integrated circuit board based on FPGA, its structure comprises printed circuit board 1, described printed circuit board 1 is provided with fpga chip 2, the PCH chip 4 that can carry out data and handle, back panel connector 3 and the QSFP connector 5 that can connect CPU high-speed bus on the calculating plate, described fpga chip 2 is provided with 2～4, back panel connector 3 is provided with 2～6, and QSFP connector 5 is provided with 6～12.
Described fpga chip 2 is provided with 2, and back panel connector 3 is provided with 4, and QSFP connector 5 is provided with 6.
Described back panel connector 3 adopts the Xcede connector, this connector is responsible for connecting the high-speed bus of CPU on the calculating plate to integrated circuit board, the high speed signal that calculates CPU on the plate can be connected to FPGA GTX high-speed interface on integrated circuit board, processing through fpga chip is connected to the QSFP connector by FPGA GTH high-speed interface again and connects at last on other interfaces.
Except the described technical characterictic of instructions, be the known technology of those skilled in the art.
Claims (2)
1. multiple bus converter integrated circuit board based on FPGA, it is characterized in that: its structure comprises printed circuit board, described printed circuit board is provided with fpga chip, the PCH chip that can carry out data and handle, back panel connector and the QSFP connector that can connect CPU high-speed bus on the calculating plate, described fpga chip is provided with 2～4, back panel connector is provided with 2～6, and the QSFP connector is provided with 6～12.
2. a kind of multiple bus converter integrated circuit board based on FPGA according to claim 1, it is characterized in that: described fpga chip is provided with 2, and back panel connector is provided with 4, and the QSFP connector is provided with 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320170401 CN203191887U (en) | 2013-04-08 | 2013-04-08 | Multi-channel bus converter board card based on field programmable gate array (FPGA) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320170401 CN203191887U (en) | 2013-04-08 | 2013-04-08 | Multi-channel bus converter board card based on field programmable gate array (FPGA) |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203191887U true CN203191887U (en) | 2013-09-11 |
Family
ID=49108734
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201320170401 Expired - Fee Related CN203191887U (en) | 2013-04-08 | 2013-04-08 | Multi-channel bus converter board card based on field programmable gate array (FPGA) |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203191887U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105553888A (en) * | 2015-12-18 | 2016-05-04 | 山东海量信息技术研究院 | PCI Express switch hardware design scheme capable of flexibly expanding port number |
| CN105553886A (en) * | 2015-12-25 | 2016-05-04 | 山东海量信息技术研究院 | PCIE switch capable of flexibly extending port number |
| CN106844269A (en) * | 2017-02-28 | 2017-06-13 | 郑州云海信息技术有限公司 | A kind of multipath server system of Purley platforms |
-
2013
- 2013-04-08 CN CN 201320170401 patent/CN203191887U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105553888A (en) * | 2015-12-18 | 2016-05-04 | 山东海量信息技术研究院 | PCI Express switch hardware design scheme capable of flexibly expanding port number |
| CN105553886A (en) * | 2015-12-25 | 2016-05-04 | 山东海量信息技术研究院 | PCIE switch capable of flexibly extending port number |
| CN106844269A (en) * | 2017-02-28 | 2017-06-13 | 郑州云海信息技术有限公司 | A kind of multipath server system of Purley platforms |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130911 Termination date: 20150408 |
|
| EXPY | Termination of patent right or utility model |