CN203180899U - On-board antenna transmitter adopting field effect power tube - Google Patents
On-board antenna transmitter adopting field effect power tube Download PDFInfo
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- CN203180899U CN203180899U CN 201320126290 CN201320126290U CN203180899U CN 203180899 U CN203180899 U CN 203180899U CN 201320126290 CN201320126290 CN 201320126290 CN 201320126290 U CN201320126290 U CN 201320126290U CN 203180899 U CN203180899 U CN 203180899U
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Abstract
The utility model discloses an on-board antenna transmitter adopting a field effect power tube comprising a transformer, a three-terminal voltage stabilizer, a first diode, a second diode, a time base integrated chip, a first NOT gate, a second NOT gate, a third NOT gate, a piezoelectric ceramic chip, a three-terminal line joint, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a button switch, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first inductor, a second inductor, a field effect transistor, and an antenna. The on-board antenna transmitter uses the field effect transistor as a core element, the circuit structure is simple, and less elements are required, therefore the on-board antenna transmitter has advantages of low costs, small size, strong signal, strong anti-interference ability, and abilities of reducing power consumption, facilitating popularization, and having no excluded directions during indoor use.
Description
Technical field
The utility model relates to a kind of airborne antenna transmitter, relates in particular to a kind of airborne antenna transmitter that adopts the fet power pipe.
Background technology
Microwave signal signal transmitter circuit structure complexity of the prior art, adopt integrated chip more, cause therefore that cost is higher, volume is big, and the power consumption height, be unfavorable for promoting.
The utility model content
The purpose of this utility model provides a kind of airborne antenna transmitter that adopts the fet power pipe with regard to being in order to address the above problem.
The utility model is achieved through the following technical solutions above-mentioned purpose:
The utility model comprises transformer, three terminal regulator, first diode, second diode, the time basis set become chip, first not gate to the, three not gates, piezoelectric ceramic piece, the three-terminal line joint, first electric capacity to the, eight electric capacity, push-button switch, first resistance to the, five resistance, first inductance, second inductance, field effect transistor and antenna, elementary and the AC power of described transformer is connected, first end of described transformer secondary output is connected with the positive pole of described first diode, second end of described transformer secondary output is connected with the positive pole of described second diode, the tap of described transformer secondary output is connected with first end of described the 7th electric capacity and first end of described the 8th electric capacity simultaneously, the negative pole while of described first diode and the negative pole of described second diode, second end of described the 7th electric capacity, second end of described second electric capacity, the middle-end of described three-terminal line joint plug, first end of described the 3rd electric capacity and the input of described three terminal regulator are connected, connect by described push-button switch between first end of described three-terminal line joint plug and second end, the negative pole of described three terminal regulator is connected with second end of described the 3rd electric capacity and first end of described the 4th electric capacity simultaneously, the output while of described three terminal regulator and second end of described the 4th electric capacity, the control end of described first not gate is connected with the positive pole of described time-base integrated circuit, the first input end of described first not gate is connected with first end of described first electric capacity and first end of described second electric capacity simultaneously, second input while of described first not gate and second end of described first electric capacity, first end of described piezoelectric ceramic piece is connected with first end of described first resistance, the output while of described first not gate and second end of described first resistance, two inputs of first end of described second resistance and described second not gate are connected, second end of described second resistance is connected with second end of described piezoelectric ceramic piece and second end of described second electric capacity simultaneously, the output of described second not gate is connected with the input of described time-base integrated circuit, basis set becomes the output of chip to be connected with two inputs of described the 3rd not gate when described, the output of described the 3rd not gate is connected with first end of described the 4th resistance, basis set becomes the control end of chip to be connected with first end of described three-terminal line terminal fitting and first end of described the 3rd resistance simultaneously when described, second end while of described three-terminal line joint and first end of described the 5th electric capacity, first end of described first inductance is connected with first end of described the 6th electric capacity, the middle-end of described three-terminal line joint is connected with second end of described the 5th electric capacity and first end of described second inductance simultaneously, second end of described first inductance is connected with described antenna with second end of described the 6th electric capacity simultaneously, second end of described second inductance is connected with the drain electrode of described field effect transistor, the source electrode of described field effect transistor is connected with first end of described the 5th resistance, and the grid of described field effect transistor is connected with second end of described the 5th resistance and second end of described the 4th resistance simultaneously.Described second electric capacity and described the 6th electric capacity are variable capacitance.
The beneficial effects of the utility model are:
It is core parts that the utility model mainly adopts field effect transistor, and circuit structure is simple, adopts element less, therefore, with low cost, volume is little, can reduce power consumption, signal is strong, the directivity of not removing when indoor use, antijamming capability are also stronger, are conducive to promote.
Description of drawings
Fig. 1 is circuit structure schematic diagram of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing:
As shown in Figure 1: the utility model comprises transformer T, three terminal regulator IC3, the first diode VD1, the second diode VD2, the time basis set become chip IC 2, the first not gate IC1-1 to the, three not gate IC1-3, piezoelectric ceramic piece XT, three-terminal line joint PL, first capacitor C, 1 to the 8th capacitor C 8, push-button switch ST, first resistance R, 1 to the 5th resistance R 5, first inductance L 1, second inductance L 2, field effect transistor VT1 and antenna TX, elementary and the AC power of transformer T is connected, first end of T level of transformer is connected with the positive pole of the first diode VD1, second end of T level of transformer is connected with the positive pole of the second diode VD2, the tap of T level of transformer is connected with first end of the 7th capacitor C 7 and first end of the 8th capacitor C 8 simultaneously, the negative pole while of the first diode VD1 and the negative pole of the second diode VD2, second end of the 7th capacitor C 7, second end of second capacitor C 2, the middle-end of three-terminal line joint PL plug, first end of the 3rd capacitor C 3 is connected with the input of three terminal regulator IC3, connect by push-button switch ST between first end of three-terminal line joint PL plug and second end, the negative pole of three terminal regulator IC3 is connected with second end of the 3rd capacitor C 3 and first end of the 4th capacitor C 4 simultaneously, the output while of three terminal regulator IC3 and second end of the 4th capacitor C 4, the control end of the first not gate IC1-1 is connected with the positive pole of time-base integrated circuit IC2, the first input end of the first not gate IC1-1 is connected with first end of first capacitor C 1 and first end of second capacitor C 2 simultaneously, second input while of the first not gate IC1-1 and second end of first capacitor C 1, first end of piezoelectric ceramic piece XT is connected with first end of first resistance R 1, the output while of the first not gate IC1-1 and second end of first resistance R 1, two inputs of first end of second resistance R 2 and the second not gate IC1-2 are connected, second end of second resistance R 2 is connected with second end of piezoelectric ceramic piece XT and second end of second capacitor C 2 simultaneously, the output of the second not gate IC1-2 is connected with the input of time-base integrated circuit IC2, the time basis set become the output of chip IC 2 to be connected with two inputs of the 3rd not gate IC1-3, the output of the 3rd not gate IC1-3 is connected with first end of the 4th resistance R 4, the time basis set become the control end of chip IC 2 to be connected with first end of three-terminal line joint PL socket and first end of the 3rd resistance R 3 simultaneously, second end while of three-terminal line joint PL and first end of the 5th capacitor C 5, first end of first inductance L 1 is connected with first end of the 6th capacitor C 6, the middle-end of three-terminal line joint PL is connected with second end of the 5th capacitor C 5 and first end of second inductance L 2 simultaneously, second end of first inductance L 1 is connected with antenna TX with second end of the 6th capacitor C 6 simultaneously, second end of second inductance L 2 is connected with the drain electrode of field effect transistor VT1, the source electrode of field effect transistor VT1 is connected with first end of the 5th resistance R 5, and the grid of field effect transistor VT1 is connected with second end of the 5th resistance R 5 and second end of the 4th resistance R 4 simultaneously.Second capacitor C 2 and the 6th capacitor C 6 are variable capacitance.
Claims (2)
1. airborne antenna transmitter that adopts the fet power pipe, it is characterized in that: comprise transformer, three terminal regulator, first diode, second diode, the time basis set become chip, first not gate to the, three not gates, piezoelectric ceramic piece, the three-terminal line joint, first electric capacity to the, eight electric capacity, push-button switch, first resistance to the, five resistance, first inductance, second inductance, field effect transistor and antenna, elementary and the AC power of described transformer is connected, first end of described transformer secondary output is connected with the positive pole of described first diode, second end of described transformer secondary output is connected with the positive pole of described second diode, the tap of described transformer secondary output is connected with first end of described the 7th electric capacity and first end of described the 8th electric capacity simultaneously, the negative pole while of described first diode and the negative pole of described second diode, second end of described the 7th electric capacity, second end of described second electric capacity, the middle-end of described three-terminal line joint plug, first end of described the 3rd electric capacity and the input of described three terminal regulator are connected, connect by described push-button switch between first end of described three-terminal line joint plug and second end, the negative pole of described three terminal regulator is connected with second end of described the 3rd electric capacity and first end of described the 4th electric capacity simultaneously, the output while of described three terminal regulator and second end of described the 4th electric capacity, the control end of described first not gate is connected with the positive pole of described time-base integrated circuit, the first input end of described first not gate is connected with first end of described first electric capacity and first end of described second electric capacity simultaneously, second input while of described first not gate and second end of described first electric capacity, first end of described piezoelectric ceramic piece is connected with first end of described first resistance, the output while of described first not gate and second end of described first resistance, two inputs of first end of described second resistance and described second not gate are connected, second end of described second resistance is connected with second end of described piezoelectric ceramic piece and second end of described second electric capacity simultaneously, the output of described second not gate is connected with the input of described time-base integrated circuit, basis set becomes the output of chip to be connected with two inputs of described the 3rd not gate when described, the output of described the 3rd not gate is connected with first end of described the 4th resistance, basis set becomes the control end of chip to be connected with first end of described three-terminal line terminal fitting and first end of described the 3rd resistance simultaneously when described, second end while of described three-terminal line joint and first end of described the 5th electric capacity, first end of described first inductance is connected with first end of described the 6th electric capacity, the middle-end of described three-terminal line joint is connected with second end of described the 5th electric capacity and first end of described second inductance simultaneously, second end of described first inductance is connected with described antenna with second end of described the 6th electric capacity simultaneously, second end of described second inductance is connected with the drain electrode of described field effect transistor, the source electrode of described field effect transistor is connected with first end of described the 5th resistance, and the grid of described field effect transistor is connected with second end of described the 5th resistance and second end of described the 4th resistance simultaneously.
2. the airborne antenna transmitter of employing fet power pipe according to claim 1, it is characterized in that: described second electric capacity and described the 6th electric capacity are variable capacitance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201320126290 CN203180899U (en) | 2013-03-20 | 2013-03-20 | On-board antenna transmitter adopting field effect power tube |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 201320126290 CN203180899U (en) | 2013-03-20 | 2013-03-20 | On-board antenna transmitter adopting field effect power tube |
Publications (1)
Publication Number | Publication Date |
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CN203180899U true CN203180899U (en) | 2013-09-04 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN 201320126290 Expired - Fee Related CN203180899U (en) | 2013-03-20 | 2013-03-20 | On-board antenna transmitter adopting field effect power tube |
Country Status (1)
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CN (1) | CN203180899U (en) |
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2013
- 2013-03-20 CN CN 201320126290 patent/CN203180899U/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130904 Termination date: 20140320 |