CN203149960U - Pulse sequence control circuit for teaching purpose - Google Patents
Pulse sequence control circuit for teaching purpose Download PDFInfo
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- CN203149960U CN203149960U CN 201320094011 CN201320094011U CN203149960U CN 203149960 U CN203149960 U CN 203149960U CN 201320094011 CN201320094011 CN 201320094011 CN 201320094011 U CN201320094011 U CN 201320094011U CN 203149960 U CN203149960 U CN 203149960U
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Abstract
The utility model discloses a pulse sequence control circuit for teaching purpose and belongs to the technical field of electronics, which comprises a pulse generating circuit, a sequence control circuit, a counter circuit and a decoding display circuit. The pulse generating circuit and the sequence control circuit are electrically connected. The sequence control circuit is connected with the counter circuit. The counter circuit is electrically connected with the decoding display circuit. According to the technical scheme of the utility model, due to the adoption of the pulse sequence control circuit, typical components and typical circuits in the field of digital circuits can be combined together for teaching purpose, so that the requirements on the current teaching mode can be satisfied. In this way, students can better master the connection relationship of typical circuits in the field of digital circuits and the creativity of the students is cultivated. Meanwhile, the interest of students in leaning digital circuits can be improved, so that the teaching effect is also improved.
Description
Technical field
The utility model relates to a kind of pulse control circuit, specifically is a kind of teaching pulse sequence control circuit, belongs to electronic technology field.
Background technology
At present, most digital circuit teaching material all is to write according to the order of chapters and sections, almost be independently between each chapters and sections, can not carry out combination to the typical components and parts in the digital circuit and typical circuit, such result is that the knowledge point that the student acquires is independently, the student can not be merged the knowledge of acquiring, and lacks originality.
Summary of the invention
Problem at above-mentioned prior art existence, the utility model provides a kind of teaching pulse sequence control circuit, by typical components and parts and typical circuit in the digital circuit are combined instruction, satisfied current teaching pattern, make the student grasp annexation between the digital circuit typical circuit, cultivate students'creative, strengthened the learning interest of student to digital circuit, improved teaching efficiency.
To achieve these goals, the technical solution adopted in the utility model is: a kind of teaching pulse sequence control circuit, comprise pulse-generating circuit, sequencing circuit, counter circuit and decoding display circuit, described pulse-generating circuit and sequencing circuit are electrically connected, sequencing circuit sum counter circuit connects, and counter circuit and decoding display circuit are electrically connected.
Further, pulse-generating circuit comprises timer NE555, resistance R 11, resistance R 12, potentiometer RP, capacitor C 1 and electrochemical capacitor C2, the pin 7 of timer NE555 is parallel between resistance R 11 and the resistance R 12, the pin two of timer NE555 and pin 6 parallel connections, be connected between potentiometer RP and the electrochemical capacitor C2, the pin 5 of timer NE555 and capacitor C 1 series connection ground connection, the pin 4 of timer NE555 and pin 8 in parallel external+5V power supplys, the pin one ground connection of timer NE555.
Further, sequencing circuit comprises that chip and gauge tap S2 form, described chip by four independently Sheffer stroke gate CD4011 form, comprise integrated chip IC2A, integrated chip IC2B, integrated chip IC2C and integrated chip IC2D, the pin one of integrated chip IC2A and pin two also connect the pin 3 of timer NE555, the pin 3 of integrated chip IC2A is connected with the pin 6 of integrated chip IC2B and the pin one 3 of integrated chip IC2D respectively, the pin 5 of integrated chip IC2B is connected with the pin 9 of integrated chip IC2C, the pin 8 of integrated chip IC2C is connected with gauge tap S2 with pin 9 backs in parallel, and the pin one 2 of integrated chip IC2D is connected with the pin one 0 of integrated chip IC2C.
Further, counter circuit is made up of counter chip CD40192 and gauge tap S1, the pin one 1 of counter chip CD40192, pin one 5, pin one, pin 9 and pin one 0 connect+the 5V power supply, the pin one 4 of counter chip CD40192 is connected with gauge tap S1, the pin 5 of counter chip CD40192 is connected with the pin one 1 of integrated chip IC2D, and the pin 4 of counter chip CD40192 is connected with the pin 4 of integrated chip IC2B.
Further, the decoding display circuit is by code translator CD4028, resistor group R and light emitting diode group LED form, the pin one 0 of code translator CD4028, pin one 3, pin one 2 and pin one 1 respectively with the pin 3 of counter chip CD40192, pin two, pin 6 and 7 corresponding connections of pin, the pin 3 of code translator CD4028 is connected with the positive pole of light emitting diode LED1 with resistance R 1 series connection back, light emitting diode LED1 minus earth, the pin one 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED2 with resistance R 2 series connection backs, light emitting diode LED2 minus earth, the pin two of code translator CD4028 is connected with the positive pole of light emitting diode LED3 with resistance R 3 series connection backs, light emitting diode LED3 minus earth, the pin one 5 of code translator CD4028 is connected with the positive pole of light emitting diode LED4 with resistance R 4 series connection backs, light emitting diode LED4 minus earth, the pin one of code translator CD4028 is connected with the positive pole of light emitting diode LED5 with resistance R 5 series connection backs, light emitting diode LED5 minus earth, the pin 6 of code translator CD4028 is connected with the positive pole of light emitting diode LED6 with resistance R 6 series connection backs, light emitting diode LED6 minus earth, the pin 7 of code translator CD4028 is connected with the positive pole of light emitting diode LED7 with resistance R 7 series connection backs, light emitting diode LED7 minus earth, the pin 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED8 with resistance R 8 series connection backs, light emitting diode LED8 minus earth, the pin 9 of code translator CD4028 is connected with the positive pole of light emitting diode LED9 with resistance R 9 series connection backs, light emitting diode LED9 minus earth, the pin 5 of code translator CD4028 is connected light emitting diode LED10 minus earth with resistance R 10 series connection backs with the positive pole of light emitting diode LED10.
The beneficial effects of the utility model are: by typical components and parts and typical circuit in the digital circuit are combined instruction, satisfied current teaching pattern, make the student grasp annexation between the digital circuit typical circuit, cultivated students'creative, strengthen the learning interest of student to digital circuit, improved teaching efficiency.
Description of drawings
Fig. 1 is circuit theory diagrams of the present utility model.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing.
As shown in Figure 1, a kind of teaching pulse sequence control circuit, comprise pulse-generating circuit, sequencing circuit, counter circuit and decoding display circuit, described pulse-generating circuit and sequencing circuit are electrically connected, sequencing circuit sum counter circuit connects, and counter circuit and decoding display circuit are electrically connected.
Pulse-generating circuit comprises timer NE555, resistance R 11, resistance R 12, potentiometer RP, capacitor C 1 and electrochemical capacitor C2, the pin 7 of timer NE555 is parallel between resistance R 11 and the resistance R 12, the pin two of timer NE555 and pin 6 parallel connections, be connected between potentiometer RP and the electrochemical capacitor C2, the pin 5 of timer NE555 and capacitor C 1 series connection ground connection, the pin 4 of timer NE555 and pin 8 in parallel external+5V power supplys, the pin one ground connection of timer NE555.
Sequencing circuit comprises that chip and gauge tap S2 form, described chip by four independently Sheffer stroke gate CD4011 form, comprise integrated chip IC2A, integrated chip IC2B, integrated chip IC2C and integrated chip IC2D, the pin one of integrated chip IC2A and pin two also connect the pin 3 of timer NE555, the pin 3 of integrated chip IC2A is connected with the pin 6 of integrated chip IC2B and the pin one 3 of integrated chip IC2D respectively, the pin 5 of integrated chip IC2B is connected with the pin 9 of integrated chip IC2C, the pin 8 of integrated chip IC2C is connected with gauge tap S2 with pin 9 backs in parallel, and the pin one 2 of integrated chip IC2D is connected with the pin one 0 of integrated chip IC2C.
Counter circuit is made up of counter chip CD40192 and gauge tap S1, the pin one 1 of counter chip CD40192, pin one 5, pin one, pin 9 and pin one 0 connect+the 5V power supply, the pin one 4 of counter chip CD40192 is connected with gauge tap S1, the pin 5 of counter chip CD40192 is connected with the pin one 1 of integrated chip IC2D, and the pin 4 of counter chip CD40192 is connected with the pin 4 of integrated chip IC2B.
The decoding display circuit is by code translator CD4028, resistor group R and light emitting diode group LED form, the pin one 0 of code translator CD4028, pin one 3, pin one 2 and pin one 1 respectively with the pin 3 of counter chip CD40192, pin two, pin 6 and 7 corresponding connections of pin, the pin 3 of code translator CD4028 is connected with the positive pole of light emitting diode LED1 with resistance R 1 series connection back, light emitting diode LED1 minus earth, the pin one 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED2 with resistance R 2 series connection backs, light emitting diode LED2 minus earth, the pin two of code translator CD4028 is connected with the positive pole of light emitting diode LED3 with resistance R 3 series connection backs, light emitting diode LED3 minus earth, the pin one 5 of code translator CD4028 is connected with the positive pole of light emitting diode LED4 with resistance R 4 series connection backs, light emitting diode LED4 minus earth, the pin one of code translator CD4028 is connected with the positive pole of light emitting diode LED5 with resistance R 5 series connection backs, light emitting diode LED5 minus earth, the pin 6 of code translator CD4028 is connected with the positive pole of light emitting diode LED6 with resistance R 6 series connection backs, light emitting diode LED6 minus earth, the pin 7 of code translator CD4028 is connected with the positive pole of light emitting diode LED7 with resistance R 7 series connection backs, light emitting diode LED7 minus earth, the pin 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED8 with resistance R 8 series connection backs, light emitting diode LED8 minus earth, the pin 9 of code translator CD4028 is connected with the positive pole of light emitting diode LED9 with resistance R 9 series connection backs, light emitting diode LED9 minus earth, the pin 5 of code translator CD4028 is connected light emitting diode LED10 minus earth with resistance R 10 series connection backs with the positive pole of light emitting diode LED10.
The course of work: when connecting power supply, pulse by pulse-generating circuit output certain frequency, sequencing circuit is received this pulse and is handled, when gauge tap S2 connection+5V power supply, according to the characteristic of Sheffer stroke gate as can be known, the pin one 1 of the output terminal of whole sequencing circuit is 1, the output high level, the pin 4 of the output terminal of whole sequencing circuit is CP, make sequencing circuit use as down counter, when gauge tap S1 ground connection connects, pin one 4 zero clearings of counter chip CD40192, all light emitting diodes all do not work, when gauge tap S1 connect+during the 5V power supply, counter chip CD40192 realizes tally function, makes light emitting diode from left to right luminous successively.
When gauge tap S2 ground connection connects, according to the characteristic of Sheffer stroke gate as can be known, the pin one 1 of the output terminal of whole sequencing circuit is CP, the pin 4 of the output terminal of whole sequencing circuit is 1, make sequencing circuit use as up counter, when gauge tap S1 ground connection connects, pin one 4 zero clearings of counter chip CD40192, all light emitting diodes all do not work, when gauge tap S1 connect+during the 5V power supply, counter chip CD40192 realizes tally function, makes light emitting diode luminous successively from right to left, realizes sequential control.
Claims (5)
1. teaching pulse sequence control circuit, it is characterized in that, comprise pulse-generating circuit, sequencing circuit, counter circuit and decoding display circuit, described pulse-generating circuit and sequencing circuit are electrically connected, sequencing circuit sum counter circuit connects, and counter circuit and decoding display circuit are electrically connected.
2. a kind of teaching pulse sequence control circuit according to claim 1, it is characterized in that, described pulse-generating circuit comprises timer NE555, resistance R 11, resistance R 12, potentiometer RP, capacitor C 1 and electrochemical capacitor C2, the pin 7 of timer NE555 is parallel between resistance R 11 and the resistance R 12, the pin two of timer NE555 and pin 6 parallel connections, be connected between potentiometer RP and the electrochemical capacitor C2, the pin 5 of timer NE555 and capacitor C 1 series connection ground connection, the pin 4 of timer NE555 and pin 8 in parallel external+5V power supplys, the pin one ground connection of timer NE555.
3. a kind of teaching pulse sequence control circuit according to claim 2, it is characterized in that, described sequencing circuit comprises that chip and gauge tap S2 form, described chip by four independently Sheffer stroke gate CD4011 form, comprise integrated chip IC2A, integrated chip IC2B, integrated chip IC2C and integrated chip IC2D, the pin one of integrated chip IC2A and pin two also connect the pin 3 of timer NE555, the pin 3 of integrated chip IC2A is connected with the pin 6 of integrated chip IC2B and the pin one 3 of integrated chip IC2D respectively, the pin 5 of integrated chip IC2B is connected with the pin 9 of integrated chip IC2C, the pin 8 of integrated chip IC2C is connected with gauge tap S2 with pin 9 backs in parallel, and the pin one 2 of integrated chip IC2D is connected with the pin one 0 of integrated chip IC2C.
4. a kind of teaching pulse sequence control circuit according to claim 3, it is characterized in that, described counter circuit is made up of counter chip CD40192 and gauge tap S1, the pin one 1 of counter chip CD40192, pin one 5, pin one, pin 9 and pin one 0 connect+the 5V power supply, the pin one 4 of counter chip CD40192 is connected with gauge tap S1, the pin 5 of counter chip CD40192 is connected with the pin one 1 of integrated chip IC2D, and the pin 4 of counter chip CD40192 is connected with the pin 4 of integrated chip IC2B.
5. a kind of teaching pulse sequence control circuit according to claim 4, it is characterized in that, described decoding display circuit is by code translator CD4028, resistor group R and light emitting diode group LED form, the pin one 0 of code translator CD4028, pin one 3, pin one 2 and pin one 1 respectively with the pin 3 of counter chip CD40192, pin two, pin 6 and 7 corresponding connections of pin, the pin 3 of code translator CD4028 is connected with the positive pole of light emitting diode LED1 with resistance R 1 series connection back, light emitting diode LED1 minus earth, the pin one 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED2 with resistance R 2 series connection backs, light emitting diode LED2 minus earth, the pin two of code translator CD4028 is connected with the positive pole of light emitting diode LED3 with resistance R 3 series connection backs, light emitting diode LED3 minus earth, the pin one 5 of code translator CD4028 is connected with the positive pole of light emitting diode LED4 with resistance R 4 series connection backs, light emitting diode LED4 minus earth, the pin one of code translator CD4028 is connected with the positive pole of light emitting diode LED5 with resistance R 5 series connection backs, light emitting diode LED5 minus earth, the pin 6 of code translator CD4028 is connected with the positive pole of light emitting diode LED6 with resistance R 6 series connection backs, light emitting diode LED6 minus earth, the pin 7 of code translator CD4028 is connected with the positive pole of light emitting diode LED7 with resistance R 7 series connection backs, light emitting diode LED7 minus earth, the pin 4 of code translator CD4028 is connected with the positive pole of light emitting diode LED8 with resistance R 8 series connection backs, light emitting diode LED8 minus earth, the pin 9 of code translator CD4028 is connected with the positive pole of light emitting diode LED9 with resistance R 9 series connection backs, light emitting diode LED9 minus earth, the pin 5 of code translator CD4028 is connected light emitting diode LED10 minus earth with resistance R 10 series connection backs with the positive pole of light emitting diode LED10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320094011 CN203149960U (en) | 2013-02-28 | 2013-02-28 | Pulse sequence control circuit for teaching purpose |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320094011 CN203149960U (en) | 2013-02-28 | 2013-02-28 | Pulse sequence control circuit for teaching purpose |
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| CN203149960U true CN203149960U (en) | 2013-08-21 |
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| CN 201320094011 Expired - Fee Related CN203149960U (en) | 2013-02-28 | 2013-02-28 | Pulse sequence control circuit for teaching purpose |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106373521A (en) * | 2016-11-07 | 2017-02-01 | 四川唯诺家私有限公司 | Multi-functional screen |
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2013
- 2013-02-28 CN CN 201320094011 patent/CN203149960U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106373521A (en) * | 2016-11-07 | 2017-02-01 | 四川唯诺家私有限公司 | Multi-functional screen |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130821 Termination date: 20140228 |