CN203085134U - Scanning driver of active organic electroluminescent display device - Google Patents
Scanning driver of active organic electroluminescent display device Download PDFInfo
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- CN203085134U CN203085134U CN2012207051119U CN201220705111U CN203085134U CN 203085134 U CN203085134 U CN 203085134U CN 2012207051119 U CN2012207051119 U CN 2012207051119U CN 201220705111 U CN201220705111 U CN 201220705111U CN 203085134 U CN203085134 U CN 203085134U
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Abstract
The utility model discloses a scanning driver of an active organic electroluminescent display device. The driver comprises the following components: a first-grade scanning driving circuit, a second-grade scanning driving circuit, a third-grade driving circuit and a fourth-grade scanning driving circuit. Each grade of scanning driving circuit comprises an input end VIN, three time sequence signal input ends, two output ends and three power ends. The input signal of the first-grade scanning driving circuit is provided from periphery. The output signal COUT(N) of each later grade of driving circuit is the input signal VIN(N+1) of a next grade of driving circuit. The scanning driver provided by the utility model only requires thin-film transistors of a same transmission type and prevents the traditional structures such as NOT gate and NOR gate. The scanning driver of the active organic electroluminescent display device ensures full-amplitude output of the signal and satisfies driving requirement of the display device. The driver adopts the time sequence control signal in a manner of three assembly lines and adopts a manner that output is fed back to an input loop for restraining leakage current, so that the circuit operates more stably and the signal is output in a full-amplitude manner.
Description
Technical field
The utility model relates to the turntable driving technology of light emitting diode indicator, relates in particular to the scan drive circuit of active organic electroluminescent display.
Background technology
(Organic Light Emitting Diode, OLED) display is the display technique of future generation that has very much development potentiality to Organic Light Emitting Diode.Peripheral integrated drive electronics on the AMOLED display screen comprises data driving chip and line driving chip, and traditional AMOLED driving circuit needs the special driving chip, by COG technology, chip is pressed in drives image element circuit on the glass substrate.People such as Arokia Nathan have proposed amorphous silicon hydride TFT circuit and can be integrated in driving OLED on glass and the plastics, reduce the cost of manufacture of display screen greatly, and OLED pixelated array equivalent model and parasitic parameter have been analyzed, the feasibility of proof scheme has been started TFT and has been integrated in the beginning on the glass back plate.The capable integrated drive electronics that thin film transistor (TFT) is made replaces special line driving chip, also become backboard TFT technology Recent study focus, its advantage is: at first, capable integrated drive electronics of TFT and image element circuit are produced on same an array, reasonably layout can be avoided track lengths to differ and cause the different time-delay of array, influences display effect; Secondly, can save substrate area, reduce processing step, reduce cost, be applied in the small size display screen, can realize narrow frame, meet people's aesthetic requirement.
The thin film transistor (TFT) of making on the glass substrate, transport-type is single, full N type or full P type pipe, adopt the logical circuit of the pipe formation traditional structure of single transport-type, some inevitable problems can occur, as the not gate of single tube formation, rejection gate etc., output signal can not realize full swing; When such not gate and rejection gate work, the TFT of diode connection often opens, and can cause extra power consumption; Adopt not gate, circuit structures such as rejection gate need be considered the channel resistance ratio of device during design, and output signal depends on some problems such as ratio of channel resistance, when therefore designing line-scanning drive circuit, is necessary to avoid adopting traditional structure.
The utility model content
The shortcoming that the purpose of this utility model is to overcome prior art provides a kind of and can make the circuit active organic electroluminescent scanning of a display driver of steady operation, the output of signal full swing more with not enough.
Another purpose of the present utility model is to provide a kind of driving method based on above-mentioned scanner driver.
In order to reach the above-mentioned first utility model purpose, the utility model by the following technical solutions:
The scanner driver of the utility model active organic electroluminescent display, comprise first order scan drive circuit, second level scan drive circuit, third level scan drive circuit and fourth stage scan drive circuit, every grade of scan drive circuit comprises an input end VIN, three clock signal input ends, two output terminals and three power ends, described two output terminals are respectively the first output terminal COUT and the second output terminal OUT, described three power ends are respectively the first power end VDD, second source end VSS, with the 3rd power end VSSL, the input signal of described first order scan drive circuit is provided by the periphery, after this be the input signal VIN (N+1) of next stage element circuit the output signal COUT(N of each grade element circuit), output signal OUT (N) is the sweep signal of the capable pel array of N.
Preferably, three of first order scan drive circuit clock signal input ends connect the first sequential control line, the second sequential control line and the 3rd sequential control line respectively in order; Three sequential control lines constitute the drive pattern of streamline form, and the first sequential control line saltus step at first becomes high level, keeps a burst length; Come to the next pulse time, the first sequential control line saltus step becomes low level, and the second sequential control line saltus step becomes high level, keeps a burst length; The 3rd pulse arrives, and the second sequential control line saltus step becomes low level, and the 3rd sequential control line saltus step becomes high level, keeps a burst length; The next burst length, to get back to 1 saltus step of sequential control line and become high level, the cycle of a signal is three burst lengths.
Preferably, the output signal COUT (1) that first order scan drive circuit produces when the 3rd sequential control line saltus step becomes high level, be the input signal VIN (2) of second level scan drive circuit, the order that the signal input part of described second level scan drive circuit connects the sequential control line is: 3,1,2; The order that the signal input part of third level scan drive circuit connects the sequential control line is: 2,3,1; The order that the signal input part of fourth stage scan drive circuit connects the sequential control line is: 1,2,3.
Preferably, every grade of scan drive circuit comprises the first transistor ~ the tenth two-transistor, the first transistor source electrode connects the drain electrode and the 11 transistorized source electrode of transistor seconds, grid connects second clock control line, drain electrode connects the output signal of one-level scan drive circuit, is the input signal cable of this grade; The transistor seconds grid connects second clock control line, and source electrode connects the 3rd transistor drain, the 7th brilliant transistor and the 9th transistorized grid, and the end of the first memory capacitance C1; The 3rd transistor source connects first negative power line, and grid connects the 4th transistor source, the 5th transistor drain, the 8th transistor and the tenth transistorized grid, and the end of the second memory capacitance C2; The 4th transistor drain connects positive power line, and grid connects first sequential control line; The 5th transistor gate connects the input signal of this grade, and source electrode connects the source electrode of the 6th transistor drain and the tenth two-transistor; The 6th transistorized source electrode connects second negative power line, and grid connects the input signal cable of this grade; The 7th transistor drain connects the 3rd sequential control line, and source electrode connects the grid of the 8th transistor drain, the 11 transistor and the tenth two-transistor and the other end of the first memory capacitance C1; The 8th transistorized source electrode connects second negative power line.
Preferably, described the 7th transistor and the 8th transistor constitute an output-stage circuit of line-scanning drive circuit, for next stage provides input signal.
Preferably, described the 9th transistor and the tenth transistor constitute the line-scanning drive circuit output circuit, connect pel array, drive image element circuit.
Preferably, the drain electrode of described the 11 transistor and the tenth two-transistor connects the 3rd sequential control line, constitutes the loop that output feeds back to input stage.
Preferably, the transistor that is adopted in every grade of scan drive circuit is the thin film transistor (TFT) of N type.
Utility model utility model utility model
The utility model has following advantage and effect with respect to prior art:
1, scanner driver of the present utility model only needs a kind of thin film transistor (TFT) of transport-type, avoided adopting traditional not gate, structures such as rejection gate are guaranteed the output of signal full swing, satisfy the driving demand of display, this driver adopts the timing control signal of three pipeline systems, a positive power line, two negative power lines adopt output to feed back to the mode that input circuit suppresses leakage current, make circuit steady operation more, the output of signal full swing.
Description of drawings
Fig. 1 is the signal schematic diagram of the scanner driver of active organic electroluminescent display of the present utility model;
Fig. 2 is the sequential chart of Fig. 1;
Fig. 3 is the unit scan driving circuit schematic diagram of active organic electroluminescent display of the present utility model;
Fig. 4 a and Fig. 4 b are the other two kinds of implementations of unit scan driving circuit of the present utility model;
The sequential chart of Fig. 5 Fig. 3.
Embodiment
Below in conjunction with embodiment and accompanying drawing the utility model is described in further detail, but embodiment of the present utility model is not limited thereto.
Embodiment
As shown in Figure 1, described scanner driver comprises: first order scan drive circuit 11, second level scan drive circuit 12, third level scan drive circuit 13 and fourth stage scan drive circuit 14, every grade scan drive circuit has comprised an input end VIN, three clock signal input ends 1,2,3, two output terminal COUT, OUT, three power end VDD, VSS, VSSL.The input signal of the scan drive circuit of the first order is provided by the periphery, after this output signal COUT(N of each grade element circuit) be the input signal VIN (N+1) of next stage element circuit, output signal OUT (N) is the sweep signal of the capable pel array of N.
As shown in Figure 2, three clock signal input ends 1,2,3 of first order scan drive circuit 11 connect three sequential control lines 1,2,3 respectively in order, three sequential control lines constitute the drive pattern of streamline form, first sequential control line 1 saltus step at first becomes high level, keeps a burst length; Come to the next pulse time, 1 saltus step of the first sequential control line becomes low level, and 2 saltus steps of the second sequential control line become high level, keep a burst length; The 3rd pulse arrives, and 2 saltus steps of the second sequential control line become low level, and 3 saltus steps of the 3rd sequential control line become high level, keep a burst length; The next burst length, to get back to 1 saltus step of the first sequential control line and become high level, the cycle of a signal is three burst lengths.
The output signal COUT (1) that first order scan drive circuit 11 produces when 3 saltus steps of sequential control line become high level, be the input signal VIN (2) of next stage unit scan driver 12, so the order that scan drive circuit 12 signal input parts in the second level connect the sequential control line is: 3,1,2; The order that third level scan drive circuit 13 signal input parts connect the sequential control line is: 2,3,1; The order that fourth stage scan drive circuit 14 signal input parts connect the sequential control line is: 1,2,3.
With reference to Fig. 3, every grade of scan drive circuit concrete structure is described below:
The first transistor source electrode connects the drain electrode and the 11 transistorized source electrode of transistor seconds, and grid connects second clock control line, and drain electrode connects the output signal of one-level scan drive circuit, is the input signal cable of this grade; The transistor seconds grid connects second clock control line, and source electrode connects the 3rd transistor drain and the 7th brilliant and the 9th transistorized grid, and the end of memory capacitance C1; The 3rd transistor source connects first negative power line, and grid connects the 4th transistor source, the 5th transistor drain and the 8th and the tenth transistorized grid, and the end of memory capacitance C2; The 4th transistor drain connects positive power line, and grid connects first sequential control line; The 5th transistor gate connects the input signal of this grade, and source electrode connects the source electrode of the 6th transistor drain and the tenth two-transistor; The 6th transistorized source electrode connects second negative power line, and grid connects the input signal cable of this grade; The 7th transistor drain connects the 3rd sequential control line, and source electrode connects the grid of the 8th transistor drain, the 11 and the tenth two-transistor and the other end of memory capacitance C1; The 8th transistorized source electrode connects second negative power line.
The the described the 7th and the 8th transistor constitutes an output-stage circuit of line-scanning drive circuit, for next stage provides input signal.
The 9th transistor drain connects the 3rd sequential control line and the 11 transistor drain, and source electrode connects the tenth transistor drain; The tenth transistorized source electrode connects first negative power line.
The the described the 9th and the tenth transistor constitutes the line-scanning drive circuit output circuit, connects pel array, drives image element circuit.
The described the 11 and the drain electrode of the tenth two-transistor connect the 3rd sequential control line, constitute the loop that output feeds back to input stage.
The transistor that the said units scan drive circuit is adopted is the thin film transistor (TFT) of N type.
The driving method of the unit scan driving circuit of above-mentioned active organic electroluminescent display comprises the following steps:
As shown in Figure 5, first sequential control line traffic control the 4th transistorized on off state, second sequential control line traffic control first and second transistorized on off state, the 3rd sequential control line connects output stage the 6th and the 8th transistor drain, and output drive signal is provided.
First sequential control line is high level, second and the 3rd sequential control line is low level, input signal is a low level, the 4th transistor turns, positive supply charges to VDD to the A point, and charge storage makes the 8th transistor, the tenth transistor and the 3rd transistor turns at storage capacitors C2, B point current potential is discharged to VSS, turn-offs the 7th and the 9th transistor; First, second, the 5th and the 6th transistor turn-offs; COUT of output stage (N) and OUT (N) are output as respectively: the first negative level VSSL and the second negative level VSS.
Described process is called the initial phase of horizontal drive circuit.
Second sequential control line is high level, first and the 3rd sequential control line are low level, and input signal is a high level, first, second transistor turns, input signal is stored in the end B point place of the first memory capacitance C1, makes the 7th and the 9th transistor turns; First sequential control line turn-offs the 4th transistor, input signal is with the 5th and the 6th transistor turns, be stored in the electric charge of the first memory capacitance C2, be discharged to the second negative level VSSL by the 5th and six transistors, make the 3rd, the 8th and the tenth transistor turn-off, output stage signal COUT (N) and OUT (N) output and the 3rd corresponding low level of signal control line.
Described process is called the signal write phase of horizontal drive circuit.
The 3rd sequential control line is high level, first and second sequential control lines are low level, input signal is a low level, first sequential control line continues the 4th transistor is turn-offed, second, third, the 5th and the 6th transistor turn-offs, the the 7th and the 8th transistor keeps conducting, and output signal COUT (N) and OUT (N) are along with the variation of the 3rd clock signal, and saltus step becomes high level.
Described process is a horizontal drive circuit signal output stage.
The signal COUT (N) of above-mentioned output stage output is the input signal VIN (N+1) of next stage scan drive circuit.
As Fig. 4 (a) and Fig. 4 (b), be other two kinds of implementations of the foregoing description, Fig. 4 (a) has increased transistor AND gate the 3rd transistor series, and output feedback signal links to each other with series connection node, has suppressed the leakage current in this loop.
Fig. 4 (b) has removed the 3rd transistor, and the electric charge that is stored on the C1 is directly released from first and second transistors, and circuit can steady operation.
The foregoing description is the utility model preferred implementation; but embodiment of the present utility model is not restricted to the described embodiments; other any do not deviate from change, the modification done under spirit of the present utility model and the principle, substitutes, combination, simplify; all should be the substitute mode of equivalence, be included within the protection domain of the present utility model.
Claims (8)
1. the scanner driver of an active organic electroluminescent display, it is characterized in that, comprise first order scan drive circuit, second level scan drive circuit, third level scan drive circuit and fourth stage scan drive circuit, every grade of scan drive circuit comprises an input end VIN, three clock signal input ends, two output terminals and three power ends, described two output terminals are respectively the first output terminal COUT and the second output terminal OUT, described three power ends are respectively the first power end VDD, second source end VSS, with the 3rd power end VSSL, the input signal of described first order scan drive circuit is provided by the periphery, after this be the input signal VIN (N+1) of next stage element circuit the output signal COUT(N of each grade element circuit), output signal OUT (N) is the sweep signal of the capable pel array of N.
2. the scanner driver of active organic electroluminescent display according to claim 1, it is characterized in that three clock signal input ends of first order scan drive circuit connect the first sequential control line, the second sequential control line and the 3rd sequential control line respectively in order; Three sequential control lines constitute the drive pattern of streamline form, and the first sequential control line saltus step at first becomes high level, keeps a burst length; Come to the next pulse time, the first sequential control line saltus step becomes low level, and the second sequential control line saltus step becomes high level, keeps a burst length; The 3rd pulse arrives, and the second sequential control line saltus step becomes low level, and the 3rd sequential control line saltus step becomes high level, keeps a burst length; The next burst length, to get back to 1 saltus step of sequential control line and become high level, the cycle of a signal is three burst lengths.
3. the scanner driver of active organic electroluminescent display according to claim 2, it is characterized in that, the output signal COUT (1) that first order scan drive circuit produces when the 3rd sequential control line saltus step becomes high level, be the input signal VIN (2) of second level scan drive circuit, the order that the signal input part of described second level scan drive circuit connects the sequential control line is: 3,1,2; The order that the signal input part of third level scan drive circuit connects the sequential control line is: 2,3,1; The order that the signal input part of fourth stage scan drive circuit connects the sequential control line is: 1,2,3.
4. the scanner driver of active organic electroluminescent display according to claim 1, it is characterized in that, every grade of scan drive circuit comprises the first transistor ~ the tenth two-transistor, the first transistor source electrode connects the drain electrode and the 11 transistorized source electrode of transistor seconds, grid connects second clock control line, drain electrode connects the output signal of one-level scan drive circuit, is the input signal cable of this grade; The transistor seconds grid connects second clock control line, and source electrode connects the 3rd transistor drain, the 7th transistor and the 9th transistorized grid, and the end of the first memory capacitance C1; The 3rd transistor source connects first negative power line, and grid connects the 4th transistor source, the 5th transistor drain, the 8th transistor and the tenth transistorized grid, and the end of the second memory capacitance C2; The 4th transistor drain connects positive power line, and grid connects first sequential control line; The 5th transistor gate connects the input signal of this grade, and source electrode connects the source electrode of the 6th transistor drain and the tenth two-transistor; The 6th transistorized source electrode connects second negative power line, and grid connects the input signal cable of this grade; The 7th transistor drain connects the 3rd sequential control line, and source electrode connects the grid of the 8th transistor drain, the 11 transistor and the tenth two-transistor and the other end of the first memory capacitance C1; The 8th transistorized source electrode connects second negative power line.
5. the scanner driver of active organic electroluminescent display according to claim 4 is characterized in that, described the 7th transistor and the 8th transistor constitute an output-stage circuit of line-scanning drive circuit, for next stage provides input signal.
6. the scanner driver of active organic electroluminescent display according to claim 4 is characterized in that, described the 9th transistor and the tenth transistor constitute the line-scanning drive circuit output circuit, connects pel array, drives image element circuit.
7. the scanner driver of active organic electroluminescent display according to claim 4 is characterized in that, the drain electrode of described the 11 transistor and the tenth two-transistor connects the 3rd sequential control line, constitutes the loop that output feeds back to input stage.
8. the scanner driver of active organic electroluminescent display according to claim 4 is characterized in that, the transistor that is adopted in every grade of scan drive circuit is the thin film transistor (TFT) of N type.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012207051119U CN203085134U (en) | 2012-12-18 | 2012-12-18 | Scanning driver of active organic electroluminescent display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012207051119U CN203085134U (en) | 2012-12-18 | 2012-12-18 | Scanning driver of active organic electroluminescent display device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103065584A (en) * | 2012-12-18 | 2013-04-24 | 华南理工大学 | Power source organic electroluminescence scanning drive device and drive method thereof |
| CN104008717A (en) * | 2014-05-19 | 2014-08-27 | 华南理工大学 | Grid drive circuit of flat-panel display and low-power-consumption output module thereof |
| CN111326103A (en) * | 2019-10-05 | 2020-06-23 | 友达光电股份有限公司 | Pixel circuit and display device |
-
2012
- 2012-12-18 CN CN2012207051119U patent/CN203085134U/en not_active Withdrawn - After Issue
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103065584A (en) * | 2012-12-18 | 2013-04-24 | 华南理工大学 | Power source organic electroluminescence scanning drive device and drive method thereof |
| CN103065584B (en) * | 2012-12-18 | 2015-06-03 | 华南理工大学 | Power source organic electroluminescence scanning drive device and drive method thereof |
| CN104008717A (en) * | 2014-05-19 | 2014-08-27 | 华南理工大学 | Grid drive circuit of flat-panel display and low-power-consumption output module thereof |
| CN104008717B (en) * | 2014-05-19 | 2016-05-04 | 华南理工大学 | The gate driver circuit of flat-panel monitor and low-power consumption output module thereof |
| CN111326103A (en) * | 2019-10-05 | 2020-06-23 | 友达光电股份有限公司 | Pixel circuit and display device |
| CN111326103B (en) * | 2019-10-05 | 2021-08-20 | 友达光电股份有限公司 | Pixel circuit and display device |
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Granted publication date: 20130724 Effective date of abandoning: 20150603 |
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