CN203085031U - Fifth-order Chua's hyperchaotic circuit - Google Patents

Fifth-order Chua's hyperchaotic circuit Download PDF

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Publication number
CN203085031U
CN203085031U CN 201220674534 CN201220674534U CN203085031U CN 203085031 U CN203085031 U CN 203085031U CN 201220674534 CN201220674534 CN 201220674534 CN 201220674534 U CN201220674534 U CN 201220674534U CN 203085031 U CN203085031 U CN 203085031U
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China
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resistance
output terminal
connect
phase
inverting input
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Withdrawn - After Issue
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CN 201220674534
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Chinese (zh)
Inventor
杜琳
张新国
张兴芹
崔红霞
李娅
马章勤
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SHANDONG FOREIGN LANGUAGES VOCATIONAL COLLEGE
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SHANDONG FOREIGN LANGUAGES VOCATIONAL COLLEGE
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Abstract

The utility model discloses a fifth-order Chua's hyperchaotic circuit. A first operational amplifier A1, a second operational amplifier A2,, a third operational amplifier A3, a fourth operational amplifier A4, and a fifth operational amplifier A5 can be used to form a linear phase-reversing integrator, and output ends are respectively chaotic signal output ends X1, X2, X3, X4, X5. A seventh operational amplifier A7 can be used to form a linear phase-reversing amplifier, and a sixth operational amplifier A6 can be used to form a non-linear phase-reversing amplitude-limiting amplifier. An output of a phase-reversing integrator A1 is respectively connected with the amplifier A6 and the integrator A2. An output of a phase-reversing integrator A2 is respectively connected with the integrator A1 and the amplifier A7. An output of the phase-reversing integrator A3 is respectively connected with the integrator A2 and the integrator A4. An output of the phase-reversing integrator A4 is connected with the integrator A5, and an output of the phase-reversing integrator A5 is connected with an inverter A7. An output of the phase-reversing amplitude limiter A6 is connected with the phase-reversing integrator A1. An output of the phase-reversing amplifier A7 is connected with a phase-reversing integrator A3. The fifth-order Chua's hyperchaotic circuit is a hyperchaotic circuit, and can be used to output various waveforms, phase diagrams, and chaotic evolution curves of the fifth-order Chua's hyperchaotic circuit, and the hyperchaotic secret communication system can be formed.

Description

A kind of five rank Cai Shi hyperchaos circuit
Technical field
The utility model belongs to non-linear circuit, often claims chaos circuit, is specifically related to a kind of five rank Cai Shi hyperchaos circuit.
Background technology
Cai's circuit is the typical nonlinear circuit, it is the three-order chaos circuit, the three-order chaos circuit can not be realized hyperchaos, hyperchaos is the high-order chaos, existing high-order Cai Shi chaos circuit technology does not all reach the optimal design index, can not realize that high-order Cai Shi chaos circuit design optimization is the deficiency of existing Cai Shi chaos circuit technology.
The utility model content
The purpose of this utility model is the deficiency that addresses the above problem, and a kind of five rank Cai Shi hyperchaos circuit are provided, and only has seven operational amplifiers and a plurality of resistance and electric capacity to constitute, and can export a kind of five rank Cai Shi hyperchaos circuit signals of grace.
The technical scheme that its technical matters that solves the utility model adopts is: a kind of five rank Cai Shi hyperchaos circuit, constitute by seven operational amplifiers and a plurality of resistance and electric capacity, and it is characterized in that: described seven operational amplifiers, wherein: the first operational amplifier (A 1) inverting input and the 3rd resistance (R 3), the 4th resistance (R 4) connect, in-phase input end ground connection is connected the first electric capacity (C of parallel connection between inverting input and the output terminal 1) and the 5th resistance (R 5), the output terminal and the first resistance (R 1), the 6th resistance (R 6) connect, output terminal is X 1Output terminal; Second operational amplifier (the A 2) inverting input and the 6th resistance (R 6), the 7th resistance (R 7) connect, in-phase input end ground connection is connected the second electric capacity (C of parallel connection between inverting input and the output terminal 2) and the 8th resistance (R 8), output terminal and the 4th resistance (R 4), the 9th resistance (R 9) connect, output terminal is X 2Output terminal; The 3rd operational amplifier (A 3) inverting input and the 12 resistance (R 12) connect, in-phase input end ground connection is connected the 3rd electric capacity (C between inverting input and the output terminal 3), output terminal and the 7th resistance (R 7), the 13 resistance (R 13) connect, output terminal is X 3Output terminal; Four-operational amplifier (A 4) inverting input and the 13 resistance (R 13) connect, in-phase input end ground connection is connected the 4th electric capacity (C of parallel connection between inverting input and the output terminal 4) and the 14 resistance (R 14), output terminal and the 15 resistance (R 15) connect, output terminal is X 4Output terminal; The 5th operational amplifier (A 5) inverting input and the 15 resistance (R 15) connect, in-phase input end ground connection is connected the 5th electric capacity (C of parallel connection between inverting input and the output terminal 5) and the 16 resistance (R 16), output terminal and the tenth resistance (R 10) connect, output terminal is X 5Output terminal; The 6th operational amplifier (A 6) inverting input and the first resistance (R 1) connect, in-phase input end ground connection is connected the second resistance (R between inverting input and the output terminal 2), output terminal and the 3rd resistance (R 3) connect; The 7th operational amplifier (A 7) inverting input and the 9th resistance (R 9), the tenth resistance (R 10) connect, in-phase input end ground connection is connected the 11 resistance (R between inverting input and the output terminal 11), output terminal and the 12 resistance (R 12) connect.
Described the 3rd resistance (R 3) be variable resistor, can observe the various curves of the chaos differentiation of five rank Cai Shi hyperchaos circuit.
The beneficial effects of the utility model are: can export X 1, X 2, X 3, X 4, X 5Five chaos waveform signals and X 1-X 2, X 1-X 3, X 1-X 4, X 1-X 5, X 2-X 3, X 2-X 4, X 2-X 5, X 3-X 4, X 3-X 5, X 4-X 5Ten chaos phasors; Can on oscillograph, show above-mentioned various chaotic signal; By some specific electrical resistance the 17 resistance (R for example 17) by after the variable resistor replacement, can change the chaotic characteristic of the above various chaotic signal, can on oscillograph, show the various curves that five rank cai's circuit hyperchaoses develop, can also carry out other various experiments of five rank cai's circuit hyperchaoses.The utility model is applicable to university's chaos education of science, experimental teaching and demonstration, scientific popularization experimental demonstration etc.
Description of drawings
Fig. 1 is five rank Cai Shi hyperchaos circuit theory diagrams.
Fig. 2 is five rank Cai Shi hyperchaos circuit X 1Output waveform figure.
Fig. 3 is five rank Cai Shi hyperchaos circuit X 2Output waveform figure.
Fig. 4 is five rank Cai Shi hyperchaos circuit X 3Output waveform figure.
Fig. 5 is five rank Cai Shi hyperchaos circuit X 4Output waveform figure.
Fig. 6 is five rank Cai Shi hyperchaos circuit X 5Output waveform figure.
Fig. 7 is five rank Cai Shi hyperchaos circuit X 1-X 2The output phasor.
Fig. 8 is five rank Cai Shi hyperchaos circuit X 1-X 3The output phasor.
Fig. 9 is five rank Cai Shi hyperchaos circuit X 1-X 4The output phasor.
Figure 10 is five rank Cai Shi hyperchaos circuit X 1-X 5The output phasor.
Figure 11 is five rank Cai Shi hyperchaos circuit X 2-X 3The output phasor.
Figure 12 is five rank Cai Shi hyperchaos circuit X 2-X 4The output phasor.
Figure 13 is five rank Cai Shi hyperchaos circuit X 2-X 5The output phasor.
Figure 14 is five rank Cai Shi hyperchaos circuit X 3-X 4The output phasor.
Figure 15 is five rank Cai Shi hyperchaos circuit X 3-X 5The output phasor.
Figure 16 is five rank Cai Shi hyperchaos circuit X 4-X 5The output phasor.
Embodiment
With reference to accompanying drawing 1, the utility model embodiment is made of seven operational amplifiers and a plurality of resistance and electric capacity, it is characterized in that: described seven operational amplifiers, wherein: first operational amplifier A 1Inverting input and the 3rd resistance R 3, the 4th resistance R 4Connect, in-phase input end ground connection is connected first capacitor C of parallel connection between inverting input and the output terminal 1With the 5th resistance R 5, the output terminal and first resistance R 1, the 6th resistance R 6Connect, output terminal is X 1Output terminal; Second operational amplifier A 2Inverting input and the 6th resistance R 6, the 7th resistance R 7Connect, in-phase input end ground connection is connected second capacitor C of parallel connection between inverting input and the output terminal 2With the 8th resistance R 8, output terminal and the 4th resistance R 4, the 9th resistance R 9Connect, output terminal is X 2Output terminal; The 3rd operational amplifier A 3Inverting input and the 12 resistance R 12Connect, in-phase input end ground connection is connected the 3rd capacitor C between inverting input and the output terminal 3, output terminal and the 7th resistance R 7, the 13 resistance R 13Connect, output terminal is X 3Output terminal; Four-operational amplifier A 4Inverting input and the 13 resistance R 13Connect, in-phase input end ground connection is connected the 4th capacitor C of parallel connection between inverting input and the output terminal 4With the 14 resistance R 14, output terminal and the 15 resistance R 15Connect, output terminal is X 4Output terminal; The 5th operational amplifier A 5Inverting input and the 15 resistance R 15Connect, in-phase input end ground connection is connected the 5th capacitor C of parallel connection between inverting input and the output terminal 5With the 16 resistance R 16, output terminal and the tenth resistance R 10Connect, output terminal is X 5Output terminal; The 6th operational amplifier A 6The inverting input and first resistance R 1Connect, in-phase input end ground connection is connected second resistance R between inverting input and the output terminal 2, output terminal and the 3rd resistance R 3Connect; The 7th operational amplifier A 7Inverting input and the 9th resistance R 9, the tenth resistance R 10Connect, in-phase input end ground connection is connected the 11 resistance R between inverting input and the output terminal 11, output terminal and the 12 resistance R 12Connect.
With X among Fig. 1 1Output terminal, X 2Output terminal, X 3Output terminal, X 4Output terminal and X 5Output terminal is connected to oscilloscope signal input end or the relevant interface of computing machine, can show X 1, X 2, X 3, X 4With X 5Oscillogram, X 1The output terminal waveform as shown in Figure 2, X 2The output terminal waveform as shown in Figure 3, X 3The output terminal waveform as shown in Figure 4, X 4The output terminal waveform as shown in Figure 5, X 5The output terminal waveform uses oscillographic phasor mode to observe X as shown in Figure 6 1-X 2Output terminal phasor signal as shown in Figure 7, X 1-X 3Output terminal phasor signal as shown in Figure 8, X 1-X 4Output terminal phasor signal as shown in Figure 9, X 1-X 5Output terminal phasor signal as shown in figure 10, X 2-X 3Output terminal phasor signal as shown in figure 11, X 2-X 4Output terminal phasor signal as shown in figure 12, X 2-X 5Output terminal phasor signal as shown in figure 13, X 3-X 4Output terminal phasor signal is X as shown in figure 14 3-X 5Output terminal phasor signal as shown in figure 15, X , 4-X 5Output terminal phasor signal as shown in figure 16.To Figure 16, proved validity of the present utility model by Fig. 2.If the 3rd resistance R 3Replace by variable resistor, continuously change resistance value, can observe the various curves that chaos develops, two identical circuit through suitably connecting, can be carried out the various experiments such as synchronous of rank, five rank cai's circuit hyperchaos.
The component parameter of the utility model embodiment is as follows: A 1, A 2, A 3, A 4, A 5, A 6, A 7Model is TL082, R 1=R 8=R 9=R 11=R 13=R 14=R 15=10k Ω, R 2=R 10=56k Ω, R 4=R 12=5.1k Ω, R 5=3.9k Ω, R 6=2k Ω, R 7=1.36k Ω (variable resistor), R 16=910k Ω, R 3=14k Ω (variable resistor), C 1=C 2=C 3=C 4=C 5=0.01 μ F.

Claims (2)

1. rank Cai Shi hyperchaos circuit is made of seven operational amplifiers and a plurality of resistance and electric capacity, it is characterized in that: described seven operational amplifiers, wherein: the first operational amplifier (A 1) inverting input and the 3rd resistance (R 3), the 4th resistance (R 4) connect, in-phase input end ground connection is connected the first electric capacity (C of parallel connection between inverting input and the output terminal 1) and the 5th resistance (R 5), the output terminal and the first resistance (R 1), the 6th resistance (R 6) connect, output terminal is X 1Output terminal; Second operational amplifier (the A 2) inverting input and the 6th resistance (R 6), the 7th resistance (R 7) connect, in-phase input end ground connection is connected the second electric capacity (C of parallel connection between inverting input and the output terminal 2) and the 8th resistance (R 8), output terminal and the 4th resistance (R 4), the 9th resistance (R 9) connect, output terminal is X 2Output terminal; The 3rd operational amplifier (A 3) inverting input and the 12 resistance (R 12) connect, in-phase input end ground connection is connected the 3rd electric capacity (C between inverting input and the output terminal 3), output terminal and the 7th resistance (R 7), the 13 resistance (R 13) connect, output terminal is X 3Output terminal; Four-operational amplifier (A 4) inverting input and the 13 resistance (R 13) connect, in-phase input end ground connection is connected the 4th electric capacity (C of parallel connection between inverting input and the output terminal 4) and the 14 resistance (R 14), output terminal and the 15 resistance (R 15) connect, output terminal is the X4 output terminal; The 5th operational amplifier (A 5) inverting input and the 15 resistance (R 15) connect, in-phase input end ground connection is connected the 5th electric capacity (C of parallel connection between inverting input and the output terminal 5) and the 16 resistance (R 16), output terminal and the tenth resistance (R 10) connect, output terminal is the X5 output terminal; The 6th operational amplifier (A 6) inverting input and the first resistance (R 1) connect, in-phase input end ground connection is connected the second resistance (R between inverting input and the output terminal 2), output terminal and the 3rd resistance (R 3) connect; The 7th operational amplifier (A 7) inverting input and the 9th resistance (R 9), the tenth resistance (R 10) connect, in-phase input end ground connection is connected the 11 resistance (R between inverting input and the output terminal 11), output terminal and the 12 resistance (R 12) connect.
2. five rank Cai Shi hyperchaos circuit according to claim 1 is characterized in that: described the 3rd resistance (R 3) be variable resistor.
CN 201220674534 2012-12-07 2012-12-07 Fifth-order Chua's hyperchaotic circuit Withdrawn - After Issue CN203085031U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103021239A (en) * 2012-12-07 2013-04-03 山东外国语职业学院 Fifth-order tsai hyperchaotic circuit
CN103532696A (en) * 2013-10-17 2014-01-22 兰州大学 Jerk circuit capable of producing double-scroll chaotic attractor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103021239A (en) * 2012-12-07 2013-04-03 山东外国语职业学院 Fifth-order tsai hyperchaotic circuit
CN103532696A (en) * 2013-10-17 2014-01-22 兰州大学 Jerk circuit capable of producing double-scroll chaotic attractor

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Granted publication date: 20130724

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