CN203054026U - Protection circuit of input and output end of measuring instrument - Google Patents
Protection circuit of input and output end of measuring instrument Download PDFInfo
- Publication number
- CN203054026U CN203054026U CN 201220730257 CN201220730257U CN203054026U CN 203054026 U CN203054026 U CN 203054026U CN 201220730257 CN201220730257 CN 201220730257 CN 201220730257 U CN201220730257 U CN 201220730257U CN 203054026 U CN203054026 U CN 203054026U
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- diode
- operational amplifier
- output terminal
- resistance
- stabilivolt
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Abstract
The utility model relates to a protection circuit of an input and output end of a measuring instrument. A positive electrode end of a first diode is connected with a negative electrode end of a second diode. A positive electrode end of the second diode is connected with an output end of a first operational amplifier. A positive electrode end of a third diode is connected with a non-inverting input end of the first operational amplifier. A negative electrode end of the third diode is connected with a positive electrode end of a fourth diode. A negative electrode end of the fourth diode is connected with the output end of the first operational amplifier. A branch circuit which is formed by connecting two ends of a first compensation capacitor and a first resistor in parallel is connected between an anti-phase input end and the output end of the first operational amplifier. A negative electrode end of a fifth voltage stabilizer tube is connected with the output end of the first operational amplifier. A positive electrode end of the fifth voltage stabilizer tube is connected with a negative electrode end of the sixth voltage stabilizer tube. A positive electrode end of the sixth voltage stabilizer is connected with an output end of a second operational amplifier. The protection circuit overcomes defects that the input and output end protection circuit adopted by a conventional direct-current measuring instrument has heavy leakage current and a poor temperature characteristic.
Description
Technical field
The utility model relates to kind of the holding circuit of surveying instrument input/output terminal.
Background technology
In the impedance measurement field, have higher requirement for the measurement accuracy of instrument.The holding circuit that generally adopts is that high-end HV and LV are directly coupled together by stabilivolt at present; the leakage current of stabilivolt and its temperature characterisitic can directly act on test lead; cause apparatus measures result's deviation owing to the leakage current of instrument test terminal protecting circuit; it is the test performance of lowering apparatus; increase the client and detect the measured piece probability of errors, it is disconnected to produce erroneous judgement probably on automatic assembly line during sorted product.Therefore; high-end and low side in the apparatus measures input and output directly adds stabilivolt as holding circuit; the holding circuit of this structure exists very big leakage current and its temperature characterisitic very poor (directly depending on selected stabilivolt), thereby influences the accuracy of measurement of instrument.
Summary of the invention
At above-mentioned technical matters, the utility model provides a kind of holding circuit of surveying instrument input/output terminal, and it is big that the utility model can overcome the input and output terminal protecting circuit leakage current that adopts on the existing direct current measurement instrument, the defective of temperature characterisitic difference.
The technical scheme that realizes above-mentioned purpose is as follows:
The holding circuit of surveying instrument input/output terminal comprises first operational amplifier, second operational amplifier, first diode, second diode, the 3rd diode, the 4th diode, the 5th stabilivolt, the 6th stabilivolt, the 7th diode, the 8th diode, first building-out capacitor, first resistance, second building-out capacitor and the 4th resistance;
The cathode terminal of first diode is connected with the in-phase input end of first operational amplifier, and the anode tap of first diode is connected with the cathode terminal of second diode, and the anode tap of second diode is connected in the output terminal of first operational amplifier; The anode tap of the 3rd diode is connected with the in-phase input end of first operational amplifier, the cathode terminal of the 3rd diode is connected with the anode tap of the 4th diode, the cathode terminal of the 4th diode is connected in the output terminal of first operational amplifier, and the two ends of first building-out capacitor are connected between the first operational amplifier inverting input and the output terminal with the branch road of first resistance formation in parallel;
The cathode terminal of the 5th stabilivolt is connected with the output terminal of first operational amplifier, and the anode tap of the 5th stabilivolt is connected with the cathode terminal of the 6th stabilivolt, and the anode tap of the 6th stabilivolt is connected with the output terminal of second operational amplifier;
The cathode terminal of the 7th diode is connected with the output terminal of second operational amplifier, the anode tap of the 7th diode is connected with the in-phase input end of second operational amplifier, the anode tap of the 8th diode is connected with the output terminal of second operational amplifier, the cathode terminal of the 8th diode is connected with the in-phase input end of second operational amplifier, and the two ends of second building-out capacitor are connected between the second operational amplifier inverting input and the output terminal with the branch road of the 4th resistance formation in parallel.
Further, also comprise second resistance, the 3rd resistance, the 5th resistance and the 6th resistance, an end of second resistance is connected with the in-phase input end of first operational amplifier, and an end of the 3rd resistance is connected in the output terminal of first operational amplifier; One end of the 5th resistance is connected with the in-phase input end of second operational amplifier, and an end of the 6th resistance is connected in the output terminal of second operational amplifier.
Adopted such scheme, when instrument was normally measured, this circuit design had following characteristic:
The current potential of test lead (HV) and first operational amplifier output terminal equates, the current potential of test lead (LV) and second operational amplifier output terminal is equal; so first diode, second diode, the 3rd diode, the 4th diode, the 7th diode, the 8th diode; on almost do not have electric current to flow through; the leakage current of test lead (HV and LV) depends primarily on the input current of operational amplifier like this; the leakage current of this holding circuit can reach the nA level, even the pA level.Therefore; when test lead (HV and LV) when voltage jump occurring; the electric current of voltage follower circuit is flowed through and is protected diode to realize the effect of following of follow circuit and the discharge process of holding circuit, can effectively protect operational amplifier, improves the stability of circuit greatly.
In sum, the leakage current of stabilivolt is provided by operational amplifier, so the temperature characterisitic of stabilivolt leakage current no longer influences test lead (HV and LV), improves the temperature characterisitic of holding circuit.
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
Description of drawings
Fig. 1 is the electrical block diagram of the holding circuit of the utility model surveying instrument input/output terminal.
Embodiment
With reference to Fig. 1; the holding circuit of surveying instrument input/output terminal of the present utility model comprises the first operational amplifier U1A, the second operational amplifier U1B, the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the 5th stabilivolt D5, the 6th stabilivolt D6, the 7th diode D7, the 8th diode D7, the first building-out capacitor C1, first resistance R 1, second resistance R 2, the 3rd resistance R 3, the second building-out capacitor C2, the 4th resistance R 4, the 5th resistance R 5 and the 6th resistance R 6.
The cathode terminal of the first diode D1 is connected with the in-phase input end of the first operational amplifier U1A, and the anode tap of the first diode D1 is connected with the cathode terminal of second diode, and the anode tap of the second diode D2 is connected in the output terminal of the first operational amplifier U1A.The anode tap of the 3rd diode D3 is connected with the in-phase input end of the first operational amplifier U1A, and the cathode terminal of the 3rd diode D3 is connected with the anode tap of the 4th diode D4, and the cathode terminal of the 4th diode D4 is connected in the output terminal of the first operational amplifier U1A.The two ends of the first building-out capacitor C1 are connected between the first operational amplifier U1A inverting input and the output terminal with the branch road of first resistance R, 1 formation in parallel.One end of second resistance R 2 is connected with the in-phase input end of the first operational amplifier U1A, and an end of the 3rd resistance R 3 is connected in the output terminal of the first operational amplifier U1A.
The cathode terminal of the 5th stabilivolt D5 is connected with the output terminal of the first operational amplifier U1A, and the anode tap of the 5th stabilivolt D5 is connected with the cathode terminal of the 6th stabilivolt D6, and the anode tap of the 6th stabilivolt D6 is connected with the output terminal of the second operational amplifier U1B.
The cathode terminal of the seven or two utmost point D7 pipe is connected with the output terminal of the second operational amplifier U1B, and the anode tap of the 7th diode D7 is connected with the in-phase input end of the second operational amplifier U1B.The anode tap of the 8th diode D8 is connected with the output terminal of the second operational amplifier U1B, and the cathode terminal of the 8th diode D8 is connected with the in-phase input end of the second operational amplifier U1B.The two ends of the second building-out capacitor C2 are connected between the second operational amplifier U1B inverting input and the output terminal with the branch road of the 4th resistance R 4 formation in parallel.One end of the 5th resistance R 5 is connected with the in-phase input end of the second operational amplifier U1B, and an end of the 6th resistance R 6 is connected in the output terminal of the second operational amplifier U1B.
Principle of work of the present utility model is as follows:
When test lead HV and test lead LV both end voltage generation sudden change, (suppose that the LV current potential is constant and be zero potential):
When the current potential of test lead HV raises suddenly, immediate current can be realized voltage follow by the output terminal OUTA that test lead HV flows to the first operational amplifier U1A by the 3rd diode D3, the 4th diode D4, if the current potential of test lead HV is higher than the 5th stabilivolt D5, the 6th stabilivolt D6, then the voltage at test lead HV and test lead LV two ends is by the second diode D3, the 3rd diode D4, the 5th stabilivolt D5, the 5th stabilivolt D6 and the 8th diode D8 bleed off, and make it clamped stable voltage to the 5th stabilivolt D5, the 6th stabilivolt D6.
When the current potential of test lead HV reduces suddenly, immediate current can pass through the second diode D2, the first diode D1, output terminal OUTA by first operational amplifier flows to test lead HV realization voltage follow, if the current potential of test lead HV is lower than test lead LV, then the voltage at test lead HV and test lead LV two ends is by the diode second diode D7, the 6th stabilivolt D6, the 5th stabilivolt D5 and the second diode D2, the first diode D1 bleed off, and make the clamped current potential to test lead LV of current potential of test lead HV.
When HV and LV both end voltage are stablized (normal measurement state)
Under the voltage follower circuit effect of being formed by operational amplifier, resistance, building-out capacitor and protection diode; the current potential of the OUTA of test lead HV and first operational amplifier equates, the current potential of test lead LV and the second operational amplifier output terminal OUTB equates; in this case; the voltage at the first diode D1, the second diode D2, the 3rd diode D3, the 4th diode D4, the 7th diode D7, the 8th diode D8 two ends is zero, so there is not electric current to flow through.Have only the input current (for nA level even pA level) of the first operational amplifier U1A, the second operational amplifier U1B to have influence on test lead HV and LV.The leakage current of the 5th stabilivolt D5, the 6th stabilivolt D6 is provided by the first operational amplifier U1A, the second operational amplifier U1B fully, makes its leakage current and temperature characterisitic no longer influence the test performance of instrument.
Claims (2)
1. the holding circuit of surveying instrument input/output terminal, it is characterized in that, comprise first operational amplifier, second operational amplifier, first diode, second diode, the 3rd diode, the 4th diode, the 5th stabilivolt, the 6th stabilivolt, the 7th diode, the 8th diode, first building-out capacitor, first resistance, second building-out capacitor and the 4th resistance;
The cathode terminal of first diode is connected with the in-phase input end of first operational amplifier, and the anode tap of first diode is connected with the cathode terminal of second diode, and the anode tap of second diode is connected in the output terminal of first operational amplifier; The anode tap of the 3rd diode is connected with the in-phase input end of first operational amplifier, the cathode terminal of the 3rd diode is connected with the anode tap of the 4th diode, the cathode terminal of the 4th diode is connected in the output terminal of first operational amplifier, and the two ends of first building-out capacitor are connected between the first operational amplifier inverting input and the output terminal with the branch road of first resistance formation in parallel;
The cathode terminal of the 5th stabilivolt is connected with the output terminal of first operational amplifier, and the anode tap of the 5th stabilivolt is connected with the cathode terminal of the 6th stabilivolt, and the anode tap of the 6th stabilivolt is connected with the output terminal of second operational amplifier;
The cathode terminal of the 7th diode is connected with the output terminal of second operational amplifier, the anode tap of the 7th diode is connected with the in-phase input end of second operational amplifier, the anode tap of the 8th diode is connected with the output terminal of second operational amplifier, the cathode terminal of the 8th diode is connected with the in-phase input end of second operational amplifier, and the two ends of second building-out capacitor are connected between the second operational amplifier inverting input and the output terminal with the branch road of the 4th resistance formation in parallel.
2. the holding circuit of surveying instrument input/output terminal according to claim 1, it is characterized in that, also comprise second resistance, the 3rd resistance, the 5th resistance and the 6th resistance, one end of second resistance is connected with the in-phase input end of first operational amplifier, and an end of the 3rd resistance is connected in the output terminal of first operational amplifier; One end of the 5th resistance is connected with the in-phase input end of second operational amplifier, and an end of the 6th resistance is connected in the output terminal of second operational amplifier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220730257 CN203054026U (en) | 2012-12-26 | 2012-12-26 | Protection circuit of input and output end of measuring instrument |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220730257 CN203054026U (en) | 2012-12-26 | 2012-12-26 | Protection circuit of input and output end of measuring instrument |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203054026U true CN203054026U (en) | 2013-07-10 |
Family
ID=48736966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220730257 Expired - Lifetime CN203054026U (en) | 2012-12-26 | 2012-12-26 | Protection circuit of input and output end of measuring instrument |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203054026U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110967536A (en) * | 2018-10-01 | 2020-04-07 | 基思利仪器有限责任公司 | Source-measuring cell with protected drive circuit |
-
2012
- 2012-12-26 CN CN 201220730257 patent/CN203054026U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110967536A (en) * | 2018-10-01 | 2020-04-07 | 基思利仪器有限责任公司 | Source-measuring cell with protected drive circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130710 |