CN203026921U - Detection circuit for imbalance of parallel output current of inverters - Google Patents
Detection circuit for imbalance of parallel output current of inverters Download PDFInfo
- Publication number
- CN203026921U CN203026921U CN 201320021161 CN201320021161U CN203026921U CN 203026921 U CN203026921 U CN 203026921U CN 201320021161 CN201320021161 CN 201320021161 CN 201320021161 U CN201320021161 U CN 201320021161U CN 203026921 U CN203026921 U CN 203026921U
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- inverter
- thyristor
- current transformer
- inverters
- resistance
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Abstract
The utility model relates to a detection circuit for the imbalance of parallel output current of inverters. The detection circuit disclosed by the utility model comprises two groups of inverters, and each group of the inverter is of a full-bridge inverter constituted by four thyristors. The input positive ends of the inverters are connected with the thyristors through filter inductors, and the diagonal groups of the thyristors of the inverters alternately perform conduction work. Each group of the inverter is respectively connected with a current transformer in series for sampling the output current of the inverter. The parallel output of the two groups of the inverters is connected with a load. The current transformers are used for taking the output current of the inverters, and secondary sides of the transformers are connected with resistors in parallel for transforming the current to voltage. The A end of the secondary side of one current transformer is sequentially connected with the resistor, a two-way conduction voltage stabilizing tube, a two-way conduction optocoupler and the C end of the secondary side of the other current transformer in series, and the other ends, namely the B end and the D end of the secondary sides of the two current transformers are connected. The detection circuit disclosed by the utility model has the advantages of simple structure and convenience in mounting.
Description
Technical field
The utility model relates to the inverter parallel output circuit, is specifically related to the uneven testing circuit of a kind of inverter parallel output current.
Background technology
Inverter is that direct current is converted to alternating current, and its application is very extensive.In existing various power supplys, storage battery, dry cell, solar cell etc. are all DC power supply, when these power supplys of needs are powered to AC load, just need inverter circuit.In addition, speed regualtion of AC motor uses very extensive with power electronic equipments such as frequency converter, uninterrupted power supply, induction heating powers, and the core of its circuit is all inverter circuit.Its basic role is the DC power supply of intermediate DC circuit output to be converted to all adjustable AC power arbitrarily of frequency and voltage under the control of control circuit.Two groups of inverter parallel work by thyristor forms if output current is uneven, will cause the damage of thyristor, and then cause the damage of intermediate frequency power supply.
Summary of the invention
The purpose of this utility model is to detect the imbalance of inverter parallel output current, when the output current imbalance reaches the On current of optocoupler, and optocoupler conducting output, equipment protection is shut down, and has avoided the damage of thyristor, has reduced thyristor and has damaged the harm that brings.
For reaching above-mentioned purpose, the utility model comprises two groups of inverters, every group of full-bridge inverter that inverter is comprised of four thyristors.The anode of inverter input is connected with thyristor through filter inductance, the diagonal angle group thyristor conducting work in turn of inverter, and two groups of inverter parallel outputs connect load.
The 5th thyristor in mid point between the first thyristor in first group of inverter and the 3rd thyristor and second group of inverter is connected with the mid point between the 7th thyristor; Mid point between the second thyristor in first group of inverter and the 4th thyristor is connected with an end on the first current transformer former limit, mid point between the 6th thyristor in second group of inverter and the 8th thyristor is connected with an end on the second current transformer former limit, and the other end on the first current transformer former limit is connected with the other end on the second current transformer former limit.
One end of the first current transformer secondary is connected with an end of the first resistance, an end of the second resistance respectively; The other end of the first current transformer secondary is connected with the other end of the first resistance respectively; One end of the second current transformer secondary is connected with an end of the 3rd resistance; The other end of the second current transformer secondary is connected with the other end of the 3rd resistance; The other end of the 3rd resistance is connected with the other end of the first resistance; The other end of the second resistance is connected with the positive pole of two-way admittance voltage-stabiliser tube, and the negative pole of two-way admittance voltage-stabiliser tube is connected with an end on the former limit of two-way admittance optocoupler, and the other end on two-way admittance optocoupler former limit is connected with an end of the 3rd resistance.
The utility model compared with prior art has the following advantages: two groups of inverter parallel work; when if the inverter parallel output current is uneven; potential difference appears in two current transformer secondary A, 2 of C; when difference during greater than the on-state voltage drop of bi-directional voltage stabilizing pipe and two-way optocoupler; optocoupler begins conducting; optical coupling secondary edges output protection signal, equipment protection is shut down.Avoided the damage of thyristor, reduced thyristor and damaged the harm that brings.
Description of drawings
Fig. 1 is the utility model circuit diagram.
Embodiment
The utility model is described in further detail below in conjunction with accompanying drawing.
With reference to Fig. 1, the utility model comprises two groups of inverters 10, every group of full-bridge inverter that inverter 10 is comprised of four thyristors 2.The anode of inverter 10 inputs is connected with thyristor 2 through filter inductance 1, the diagonal angle group thyristor 2 conducting work in turn of inverter 10.
The mid point of one group of inverter 10 thyristor 2 (1), 2 (3) is connected with the mid point of another group inverter 10 thyristors 2 (5), 2 (7), the mid point of one group of inverter 10 thyristor 2 (2), 2 (4) is connected with the mid point of another group inverter 10 thyristors 2 (6), 2 (8), the mid point output of the mid point of thyristor 2 (2), 2 (4) and thyristor 2 (6), 2 (8) is series current instrument transformer 3 respectively, carries out the output current sampling of inverter 10.Two groups of inverter 10 outputs in parallel connect load (building-out capacitor 4 and induction furnace equivalent reactance 5).
During two groups of inverter output current balances, the voltage that the output of two current transformer secondary obtains through parallel resistance is with homophases frequently, and amplitude equates, 2 of A, C are without potential difference.When two groups of inverter output currents were uneven, potential difference appearred in A, 2 of C, and during greater than the on-state voltage drop of bi-directional voltage stabilizing pipe and two-way optocoupler, optocoupler begins conducting when difference, optical coupling secondary edges output protection signal, and equipment protection is shut down.
Claims (1)
1. the uneven testing circuit of inverter parallel output current, comprise two groups of inverters, it is characterized in that:
Every group of full-bridge inverter that inverter is comprised of four thyristors, the anode of inverter input is connected with thyristor through filter inductance, the diagonal angle group thyristor conducting work in turn of inverter, two groups of inverter parallel outputs connect load;
The 5th thyristor in mid point between the first thyristor in first group of inverter and the 3rd thyristor and second group of inverter is connected with the mid point between the 7th thyristor; Mid point between the second thyristor in first group of inverter and the 4th thyristor is connected with an end on the first current transformer former limit, mid point between the 6th thyristor in second group of inverter and the 8th thyristor is connected with an end on the second current transformer former limit, and the other end on the first current transformer former limit is connected with the other end on the second current transformer former limit;
One end of the first current transformer secondary is connected with an end of the first resistance, an end of the second resistance respectively; The other end of the first current transformer secondary is connected with the other end of the first resistance respectively; One end of the second current transformer secondary is connected with an end of the 3rd resistance; The other end of the second current transformer secondary is connected with the other end of the 3rd resistance; The other end of the 3rd resistance is connected with the other end of the first resistance; The other end of the second resistance is connected with the positive pole of two-way admittance voltage-stabiliser tube, and the negative pole of two-way admittance voltage-stabiliser tube is connected with an end on the former limit of two-way admittance optocoupler, and the other end on two-way admittance optocoupler former limit is connected with an end of the 3rd resistance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 201320021161 CN203026921U (en) | 2013-01-15 | 2013-01-15 | Detection circuit for imbalance of parallel output current of inverters |
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CN 201320021161 CN203026921U (en) | 2013-01-15 | 2013-01-15 | Detection circuit for imbalance of parallel output current of inverters |
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CN 201320021161 Expired - Lifetime CN203026921U (en) | 2013-01-15 | 2013-01-15 | Detection circuit for imbalance of parallel output current of inverters |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104539168A (en) * | 2014-12-17 | 2015-04-22 | 杭州四达电炉成套设备有限公司 | Inductance current stabilization power supply circuit |
CN112436831A (en) * | 2020-10-27 | 2021-03-02 | 深圳市盛弘电气股份有限公司 | Current equalizing circuit and method of thyristor alternating current switch parallel circuit |
-
2013
- 2013-01-15 CN CN 201320021161 patent/CN203026921U/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104539168A (en) * | 2014-12-17 | 2015-04-22 | 杭州四达电炉成套设备有限公司 | Inductance current stabilization power supply circuit |
CN112436831A (en) * | 2020-10-27 | 2021-03-02 | 深圳市盛弘电气股份有限公司 | Current equalizing circuit and method of thyristor alternating current switch parallel circuit |
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Granted publication date: 20130626 |
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CX01 | Expiry of patent term |