CN203015012U

CN203015012U - Wireless video surveillance device based on DSP and FPGA

Info

Publication number: CN203015012U
Application number: CN 201220585915
Authority: CN
Inventors: 郭峻因
Original assignee: CHENGDU JIANGFA TECHNOLOGY Co Ltd
Current assignee: CHENGDU JIANGFA TECHNOLOGY Co Ltd
Priority date: 2012-11-08
Filing date: 2012-11-08
Publication date: 2013-06-19
Anticipated expiration: 2022-11-08

Abstract

The utility model relates to the field of security technologies and provides a wireless video surveillance device based on a DSP and an FPGA. The device comprises a simulation camera, an A/D video input chip, an FPGA processing chip, a DSP processing chip, a first GPRS module, a second GPRS module, a surveillance display terminal and a I2C bus. The A/D video input chip, the FPGA processing chip, the DSP processing chip and the first GPRS module are connected in sequence. The second GPRS module is connected with the surveillance display terminal. Data exchange is carried out between the first GPRS module and the second GPRS module through a GPRS network. The DSP processing chip is connected with the A/D video input chip through the I2C bus and is connected with a JTAG interface, an SDAM, and a Flash. The FPGA processing chip is connected with an SRAM2 and an SRAM1.

Description

A kind of radio video monitoring device based on DSP and FPGA

Technical field

The utility model relates to technical field of security and protection, and a kind of radio video monitoring device based on DSP and FPGA is provided.

Background technology

Along with the development of science and technology and the raising of progress and people's material and cultural life, the degree of safety of people's living environment has had Secretary, thereby all kinds of security devices arise at the historic moment, at present at home and abroad on market, the video frequency collection card of most video monitoring safety-protection systems mainly contains two kinds: a kind of is analog video, and a kind of is digital video.The former technology maturation is widely used, and owing to being analog signal, is unfavorable for that therefore doing follow-up image/video processes, and is not inconsistent with the direction of national digital development; The latter is developed rapidly, and flexibility is high, owing to being digital signal, being very beneficial for doing all kinds of image/videos and processing, as motion detection, recognition of face, target following etc.The quality of video acquisition quality will directly affect the operation of whole system, be the precondition of carrying out follow-up Digital Image Processing.Therefore, high performance hardware device and high-quality algorithm must be arranged as the basis, real time video collection just becomes possibility.The utility model provides a kind of embedded video based on DSP+FPGA to gather structure.This structure has that volume is little, and cost is low, and is low in energy consumption, and speed is fast, and adaptable characteristics can be completed the collection of video, real-time Video processing, and the transmission of data.

Summary of the invention

The purpose of this utility model is to provide a kind of radio video monitoring device based on DSP and FPGA.

The utility model is by the following technical solutions to achieve these goals:

a kind of radio video monitoring device based on DSP and FPGA, it is characterized in that: comprise the simulation camera, A/D video input chip, the FPGA process chip, the DSP process chip, the one GPRS module, the 2nd GPRS module, the monitoring display terminal, described A/D video input chip, the FPGA process chip, the DSP process chip, the one GPRS sequence of modules connects, described the 2nd GPRS module connects the monitoring display terminal, a described GPRS module and the 2nd GPRS module are carried out exchanges data by GPRS network, also comprise the 12C bus, described DSP process chip connects A/D video input chip by the I2C bus, described DSP process chip is connected with jtag interface, SDAM, Flash, described FPGA process chip is connected with SRAM2, SRAM1.

In such scheme, it is TMS320VC5509A that described DSP process chip adopts model.

In such scheme, it is EPlC6Q240C8 that described FPGA process chip adopts model.

In such scheme, it is SAA7111A that described A/D video input chip adopts model.

Because the utility model adopts above technical scheme, so possess following beneficial effect:

The utility model provides a kind of embedded video monitoring system device based on DSP+FPGA.This system has that volume is little, and cost is low, and is low in energy consumption, and speed is fast, and adaptable characteristics can be completed the collection of video, real-time Video processing, and the transmission of data.

Description of drawings

Fig. 1 is the utility model system block diagram.

Embodiment

The utility model provides a kind of radio video monitoring device based on DSP and FPGA, comprising:

the simulation camera is used for gathering analog video signal, analog video signal sends A/D video input chip SAA7111A to, A/D video input chip SAA7111A with camera collection to analog video signal convert digital video signal to, then transmit the FPGA process chip, be used for image memory buffers SRAM1 memory and SRAM2 memory, described SRAM1 memory and SRAM2 memory all are connected with fpga chip EPlC6Q240C8, described SRAM1 and SRAM2, working method under its fpga chip EPlC6Q240C8 controls is, the first frame data exist in SRAM1, the second frame data exist in SRAM2, the 3rd frame data are restored in SRAM1, so circulation, two alternately storages of memory, be ping-pong structure communication, the DSP process chip connects the FPGA process chip, dsp chip TMS320VC5509A realizes, the real-time Transmission of data, each class interface, the disposition and management of peripheral hardware, dsp processor is connected with the SDRAM memory for data buffer storage, store the FLASH memory of user program and data, described SDRAM memory, the FLASH memory all is connected with dsp chip TMS320VC5509A, also comprise the I2C bus, be used for connecting USB interface and the RS232 interface that PC communicates, described I2C bus adopts chip PCF8584 as the 12C bus control unit, and SAA7111A carries out initialization to A/D video input chip, video information after described DSP process chip connection GPRS module will be processed is given the monitoring display terminal by wireless network and is shown.Jtag interface: and the serial communication between PC.

Claims

1. radio video monitoring device based on DSP and FPGA, it is characterized in that: comprise the simulation camera, A/D video input chip, the FPGA process chip, the DSP process chip, the one GPRS module, the 2nd GPRS module, the monitoring display terminal, described A/D video input chip, the FPGA process chip, the DSP process chip, the one GPRS sequence of modules connects, described the 2nd GPRS module connects the monitoring display terminal, a described GPRS module and the 2nd GPRS module are carried out exchanges data by GPRS network, also comprise the 12C bus, described DSP process chip connects A/D video input chip by the I2C bus, described DSP process chip is connected with jtag interface, SDAM, Flash, described FPGA process chip is connected with SRAM2, SRAM1.

2. a kind of radio video monitoring device based on DSP and FPGA according to claim 1 is characterized in that: it is TMS320VC5509A that described DSP process chip adopts model.

3. a kind of radio video monitoring device based on DSP and FPGA according to claim 1 is characterized in that: it is EPlC6Q240C8 that described FPGA process chip adopts model.

4. a kind of radio video monitoring device based on DSP and FPGA according to claim 1 is characterized in that: it is SAA7111A that described A/D video input chip adopts model.