CN203013700U - Light transmission packaging structure based on silicon substrate and glass seal cover - Google Patents
Light transmission packaging structure based on silicon substrate and glass seal cover Download PDFInfo
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- CN203013700U CN203013700U CN 201220739816 CN201220739816U CN203013700U CN 203013700 U CN203013700 U CN 203013700U CN 201220739816 CN201220739816 CN 201220739816 CN 201220739816 U CN201220739816 U CN 201220739816U CN 203013700 U CN203013700 U CN 203013700U
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- articulamentum
- silicon substrate
- printing opacity
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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Abstract
The utility model relates to a light transmission packaging structure based on a silicon substrate and a glass seal cover. The light transmission packaging structure based on the silicon substrate and the glass seal cover comprises the silicon substrate in which a packaging groove is concavely arranged, and an insulating supporting layer covers on the side walls and a part of bottom wall of the packaging groove and extends to and covers the surface of the silicon substrate outside the notch of the packaging groove; a first connecting layer is arranged on the insulating supporting layer, a second connecting layer is arranged on the first connecting layer, and an installing hole penetrates the insulating supporting layer, the first connecting layer and the second connecting layer; a light transmission chip is arranged in the installing hole and is electrically connected with the second connecting layer via a connecting line, the glass seal cover is arranged on the second connecting layer and is located right above the notch of the packaging groove, and a cavity used for light transmission is formed between the glass seal cover and the packaging groove below the glass seal cover; and connecting electrodes are arranged on and are electrically connected with the second connecting layer. The light transmission packaging structure based on the silicon substrate and the glass close cover of the utility model is compact in structure, reliable in packaging technology and wide in application range, and is safe and practical.
Description
Technical field
The utility model relates to a kind of printing opacity encapsulating structure, and especially a kind of printing opacity encapsulating structure based on silicon substrate and glass capping belongs to the technical field of semiconductor packages.
Background technology
At present, the sensor chip of printing opacity take ceramic substrate or substrate with pre-envelope resin as carrier, with sensor chip adhesion and routing, then is stained with high light transmittance ratio glass, then sensor encapsulation and reelability soft board adhesion in when encapsulation.But existing packaging ceramic substrate cost is high, and the substrate encapsulation structure that seals in advance resin is relatively poor, can not satisfy the requirement of modern semiconductors development.
Summary of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, and a kind of printing opacity encapsulating structure based on silicon substrate and glass capping is provided, its compact conformation, and packaging technology is reliable, and wide accommodation is safe and practical.
The technical scheme that provides according to the utility model, described printing opacity encapsulating structure based on silicon substrate and glass capping, comprise silicon substrate, be concaved with the encapsulation groove in described silicon substrate, the sidewall of described encapsulation groove and part diapire are coated with insulation support layer, and described insulation support layer extend to cover the surface of encapsulation groove notch outside silicon substrate; Insulation support layer is provided with the first articulamentum, described the first articulamentum is provided with the second articulamentum, the bottom in encapsulation groove center district is by forming installing hole between insulation support layer, the first articulamentum and the second articulamentum, and described installing hole connects insulation support layer, the first articulamentum and the second articulamentum; The printing opacity chip is installed in installing hole, and described printing opacity chip is electrically connected to the second articulamentum by connecting line; The second articulamentum is provided with glass capping, described glass capping be positioned at encapsulation groove notch directly over, be formed for the cavity of printing opacity between the encapsulation groove of glass capping and below; The second articulamentum is provided with the connecting electrode that is electrically connected to the second articulamentum.
Described printing opacity chip is installed in installing hole by the chip articulamentum, and is supported in surface of silicon corresponding to encapsulation groove bottom land.
Described connecting electrode is that metal connects spheric electrode or band electrode.
Described glass capping is provided with the connection projection, and described connection projection is provided with the capping articulamentum, and glass capping is connected and fixed by capping articulamentum and the second articulamentum.
Described printing opacity chip comprises image sensor, ambient light source sensor or light-emitting diode.
Advantage of the present utility model: the encapsulation groove is set in silicon substrate; in the encapsulation groove, insulation support layer, the first articulamentum and the second articulamentum are set; and be formed for installing the installing hole of printing opacity chip in groove in encapsulation; after the printing opacity chip is installed in installing hole; glass capping is fastened on the second articulamentum; the protection of realization to the printing opacity chip; cavity between glass capping and silicon substrate can be as the passage of light transmition simultaneously; to satisfy the job requirement of printing opacity chip; its compact conformation; packaging technology is reliable, and wide accommodation is safe and practical.
Description of drawings
Fig. 1 is structural representation of the present utility model.
Fig. 2 ~ Figure 26 is the cutaway view of the concrete implementing process step of the utility model, wherein:
Fig. 2 is the cutaway view of the utility model after obtaining mask layer on silicon substrate.
Fig. 3 is the cutaway view of the utility model after obtaining the first photoresist layer on silicon substrate.
Fig. 4 is the cutaway view after the utility model obtains first window.
Fig. 5 is the cutaway view after the utility model obtains Second Window.
Fig. 6 is the cutaway view after the utility model is removed the first photoresist layer.
Fig. 7 is the cutaway view the utility model obtains encapsulating groove in silicon substrate after.
Fig. 8 is the cutaway view after the utility model is removed mask layer.
Fig. 9 is the cutaway view after the utility model deposit obtains insulation support layer.
Figure 10 is the cutaway view of the utility model after obtaining the first articulamentum on insulation support layer.
Figure 11 be the utility model on the first articulamentum, the second photoresist layer is exposed and develop after cutaway view.
Figure 12 is the cutaway view of the utility model after obtaining the second articulamentum on the first articulamentum.
Figure 13 is that the utility model is removed the cutaway view after the second photoresist layer obtains the 3rd window.
Figure 14 is the cutaway view after the utility model obtains the four-light mouth.
Figure 15 is the cutaway view after the utility model obtains the 5th window.
Figure 16 is the cutaway view after the utility model is installed the printing opacity chip.
Figure 17 is the utility model printing opacity chip by connecting line and cutaway view after the second articulamentum is electrically connected to.
Figure 18 is the cutaway view of the utility model high light transmittance glass wafer.
Figure 19 is the cutaway view of the utility model after coating the 3rd photoresist layer and exposure imaging on the high light transmittance glass wafer.
To be the utility model carry out cutaway view after etching obtains connecting projection to the high light transmittance glass wafer to Figure 20.
Figure 21 is that the utility model is at the cutaway view that connects after obtaining the capping articulamentum on projection.
The cutaway view of Figure 22 after to be the utility model be connected and fixed high light transmittance glass wafer and silicon substrate.
Figure 23 is the cutaway view after the utility model cuts the high light transmittance glass wafer.
Figure 24 is the cutaway view after the utility model cuts silicon substrate.
Figure 25 is that the utility model forms the cutaway view of band electrode on the second articulamentum.
Figure 26 is that the utility model forms the cutaway view that metal connects sphere pole on the second articulamentum.
description of reference numerals: 1-silicon substrate, the 2-insulation support layer, 3-chip articulamentum, 4-the first articulamentum, 5-printing opacity chip, the 6-connecting line, 7-the second articulamentum, the 8-band electrode, the 9-glass capping, 10-capping articulamentum, the 11-installing hole, the 12-cavity, the 13-mask layer, 14-the first photoresist layer, the 15-first window, the 16-Second Window, 17-encapsulates groove, 18-the second photoresist layer, 19-the 3rd window, 20-four-light mouth, 21-the 5th window, 22-high light transmittance glass wafer, 23-the 3rd photoresist layer, 24-the 6th window, 25-connects projection, 26-the 7th window and 27-metal connect spheric electrode.
Embodiment
The utility model is described in further detail below in conjunction with concrete drawings and Examples.
As shown in Figure 1: in order to realize relieved package to printing opacity chip 5, the utility model comprises silicon substrate 1, be concaved with encapsulation groove 17 in described silicon substrate 1, the sidewall of described encapsulation groove 17 and part diapire are coated with insulation support layer 2, and described insulation support layer 2 extends the surface that covers encapsulation groove 17 notches outsides silicon substrates 1; Insulation support layer 2 is provided with the first articulamentum 4, described the first articulamentum 4 is provided with the second articulamentum 7, the bottom of encapsulation groove 17 centers forms installing hole 11 by insulation support layer 2, the first articulamentum 4 and 7 of the second articulamentums, and described installing hole 11 connects insulation support layer 2, the first articulamentum 4 and the second articulamentum 7; Printing opacity chip 5 is installed in installing hole 11, and described printing opacity chip 5 is electrically connected to the second articulamentum 7 by connecting line 6; The second articulamentum 7 is provided with glass capping 9, described glass capping 9 be positioned at encapsulation groove 17 notches directly over, 17 of the encapsulation grooves of glass capping 9 and below are formed for the cavity 12 of printing opacity; The second articulamentum 7 is provided with the connecting electrode that is electrically connected to the second articulamentum 7.
Particularly, described printing opacity chip 5 is installed in installing hole 11 by chip articulamentum 3, and is supported in encapsulation silicon substrate 1 surface corresponding to groove 17 bottom lands.Described connecting electrode is that metal connects spheric electrode 27 or band electrode 8.Described glass capping 9 is provided with and connects projection 25, and described connection projection 25 is provided with capping articulamentum 10, and glass capping 9 is connected and fixed by capping articulamentum 10 and the second articulamentum 7.Described printing opacity chip 5 comprises image sensor, ambient light source sensor or light-emitting diode.Printing opacity chip 5 is realized receiving extraneous light or the light transmission being gone out by cavity 12 and glass capping 9.
As shown in Fig. 2 ~ 26: above-mentioned printing opacity encapsulating structure can adopt following processing step to prepare, and described concrete preparation technology comprises the steps:
A, provide required silicon substrate 1, and at the surface deposition mask layer 13 of described silicon substrate 1, described mask layer 13 covers the surface of silicon substrates 1;
As shown in Figure 2, described mask layer 13 is silicon nitride layer, utilizes mask layer 13 to carry out etching to silicon substrate 1;
B, on described mask layer 13 coating the first photoresist layer 14, as shown in Figure 3, the surface of the first photoresist layer 14 mask film covering layers 13;
C, above-mentioned the first photoresist layer 14 is exposed and develops, obtain first window 15 on mask layer 13, regional exposed corresponding with first window 15 of mask layer 13;
As shown in Figure 4: after the first photoresist layer 14 is exposed and develops, obtain first window 15 on mask layer 13,, mask layer 13 is exposed by first window 15, and the position of first window 15 arranges as required, by the art personnel are known;
D, utilize 15 pairs of mask layers of above-mentioned first window 13 to carry out etching, the mask layer 13 that etching is corresponding with first window 15, and obtain Second Window 16 at silicon substrate 1;
As shown in Figure 5: due to regional exposed corresponding with first window 15 of mask layer 13, etching technics by routine, mask layer 13 in first window 15 is etched away, can reach Second Window 16, Second Window 16 extends downward the surface of silicon substrate 1 from the upper surface of the first photoresist layer 14;
E, above-mentioned the first photoresist layer 14 of removal; As shown in Figure 6, after obtaining Second Window 16, unwanted the first photoresist layer 14 in technique is removed;
F, utilize above-mentioned mask layer 13 and 16 pairs of silicon substrates of Second Window 1 to carry out etching, to obtain required encapsulation groove 17 in silicon substrate 1; As shown in Figure 7: utilize mask layer 13 as blocking, silicon substrate 1 is carried out etching, obtain encapsulating groove 17 in silicon substrate 1, the notch position of described encapsulation groove 17 is corresponding with Second Window 16;
G, the lip-deep mask layer 13 of removal silicon substrate 1; As shown in Figure 8, obtain encapsulating after groove 17 mask layer 13 is removed, to carry out follow-up required processing step;
H, at above-mentioned silicon substrate 1 surface deposition insulation support layer 2, described insulation support layer 2 covers the surface of the sidewall, diapire of encapsulation grooves 17 and encapsulation groove 17 notches outsides silicon substrates 1;
As shown in Figure 9: described insulation support layer 2 is silicon dioxide layer, utilizes silicon dioxide layer to realize the purpose of insulating supporting;
I, the first articulamentum 4 is set on above-mentioned insulation support layer 2;
As shown in figure 10: described the first articulamentum 4 is composite bed, the first articulamentum 4 comprises and sputters at the titanium coating on insulation support layer 2 and sputter at nickel metal layer on described titanium coating, because insulation support layer 2 is silicon dioxide layer, utilize titanium coating can realize with insulation support layer 2 between be connected, utilize nickel metal layer can realize with the second articulamentum 7 between be connected, the preparation technology of the first articulamentum 4 and lamination layer structure are the art to be known, for technological means and technological requirement by routine prepare.
J, on above-mentioned the first articulamentum 4 coating the second photoresist layer 18, and described the second photoresist layer 18 is exposed and develops, block required the first articulamentum 4 zones to utilize the second photoresist layer 18;
As shown in figure 11: after coating the second photoresist layer 18, the second photoresist layer 18 covers the surface of the first articulamentum 4, in order to access the second required articulamentum 7, the second photoresist layer 18 is exposed and develops, keep the second photoresist layer 18 that is positioned at encapsulation groove 17 centers;
K, on above-mentioned the first articulamentum 4, the second articulamentum 7 is set, described the second articulamentum 7 covers the surf zone of the first articulamentum 4 correspondences;
As shown in figure 12: described the second articulamentum 7 is similarly lamination layer structure, the second articulamentum comprises to be electroplated the nickel metal layer on the first articulamentum 4 and is plated on gold layer on described nickel metal layer, by nickel metal layer can realize with the first articulamentum 4 between be connected, utilize being connected between the realization of gold layer and outside and connecting electrode; The preparation technology of the second articulamentum 7 and composite construction are the art to be known, for technological means and technological requirement by routine prepare; In the utility model embodiment, the second articulamentum 7 covers not by on the first articulamentum 4 of the second photoresist layer 18 coverings.
The second photoresist layer 18 on l, removal the first articulamentum 4 is to obtain connecting the 3rd window 19 of the second articulamentum 7 in the bottom that encapsulates groove 17;
As shown in figure 13: after removing the second photoresist layer 18, obtain the 3rd window 19 at the regional location of the second photoresist layer 18 before, described the 3rd window 19 extends to the surface of the first articulamentum 4 from the upper surface of the second articulamentum 7, namely form the pore structure that connects the second articulamentum 7;
M, utilize above-mentioned the 3rd window 19 etching the first articulamentums 4, to obtain connecting the four-light mouth 20 of the first articulamentum 4 and the second articulamentum 7;
As shown in figure 14: corresponding consistent with the 3rd window 19 to the zone of the first articulamentum 4 etchings after utilizing 19 pairs of the first articulamentums 4 of the 3rd window to carry out etching, obtain four-light mouth 20 after etching away the first articulamentum 4;
N, utilize above-mentioned four-light mouth 20 etching insulation support layers 2, to obtain connecting the 5th window 21 of insulation support layer 2, the first articulamentum 4 and the second articulamentum 7 above silicon substrate 1;
As shown in figure 15, utilize 21 pairs of insulation support layers of four-light mouth 2 to carry out etching, after etching away in the insulation support layer 2 of four-light mouth 21 correspondences, form the surface that the 5th window 21, the five windows 21 extend to silicon substrate 1, also namely encapsulate the bottom of groove 17;
O, provide required printing opacity chip 5, and described printing opacity chip 5 is installed on the bottom of the 5th window 21, printing opacity chip 5 is supported on silicon substrate 1;
As shown in figure 16, after the above-mentioned technique of process, form installing hole 11 between the 5th window 21 and the first articulamentum 4, the second articulamentum 7 and insulation support layer 2, be that installing hole 11 is corresponding with the 5th window 21, printing opacity chip 5 is installed in installing hole 11 by chip articulamentum 3, and printing opacity chip 5 is realized and being fixedly connected with of silicon substrate 1 by chip articulamentum 3; Chip articulamentum 3 adopts conventional connecting material.
P, utilize connecting line 6 to be electrically connected to the second articulamentum 7 above-mentioned printing opacity chip 5; As shown in figure 17: printing opacity chip 5 is connected with the second articulamentum 7 by routing or bonding wire mode, after the second articulamentum 7 is electrically connected to, can pass through being connected of connecting electrode and external circuit on the second articulamentum 7 or the second articulamentum 7;
Q, provide high light transmittance glass wafer 22;
As shown in figure 18, described high light transmittance glass wafer 22 can adopt conventional capping glass;
R, on above-mentioned high light transmittance glass wafer 22 coating the 3rd photoresist layer 23, and described the 3rd photoresist layer 23 is exposed and develops, to obtain the 6th window 24 above high light transmittance glass wafer 22;
As shown in figure 19: coating the 3rd photoresist layer 23 on high light transmittance glass wafer 22 to realize that high light transmittance glass wafer 22 is carried out etching, forms the 6th window 24 between the surface of the 3rd photoresist layer 23 and high light transmittance glass wafer 22;
S, utilize 24 pairs of high light transmittance glass wafers of above-mentioned the 6th window 22 to carry out etching, and remove described the 3rd photoresist layer 23, to obtain being positioned at the connection projection 25 on high light transmittance glass wafer 22;
As shown in figure 20: adopt conventional lithographic technique means to carry out etching to high light transmittance glass wafer 22, remove the zone corresponding with the 6th window 24, after etching technics is completed, remove the 3rd photoresist layer 23, formation protrudes from the connection projection 25 on high light transmittance glass wafer 22, forms the 7th window 26 between the surface of connection projection 25 and high light transmittance glass wafer 22;
T, on above-mentioned connection projection 25 printing capping articulamentum 10; As shown in figure 21: described capping articulamentum 10 is formed on by printing and connects on projection 25, and capping articulamentum 10 adopts the connecting material of benzocyclobutene (Benzocyclobutene, BCB) to make;
U, utilize capping articulamentum 10 to be fastened on the second articulamentum 7 of above-mentioned silicon substrate 1 top above-mentioned high light transmittance glass wafer 22, capping articulamentum 10 is positioned at the outside of encapsulation groove 17 notches;
As shown in figure 22: in order to protect printing opacity chip 5, the high light transmittance glass wafer 22 after above-mentioned processing is fastened on the second articulamentum 7 by capping articulamentum 10;
V, above-mentioned high light transmittance glass wafer 22 is cut, with at the glass capping 9 that obtains on silicon substrate 1 being positioned at directly over encapsulation groove 17;
As shown in figure 23: according to the position of printing opacity chip 5, the excision encapsulation groove 17 unwanted high light transmittance glass wafers 22 in both sides, to realize obtaining the glass capping 9 of printing opacity chip 5 tops, namely glass capping 9 is for 22 cuttings obtain to the high light transmittance glass wafer;
W, above-mentioned silicon substrate 1 is carried out the cutting of required Silicon Wafer, to obtain required printing opacity encapsulating structure;
As shown in figure 24: in order to access the encapsulating structure of single printing opacity chip 5, need to cut silicon substrate 1, in the utility model embodiment, conventional semiconductor cutting technique all be adopted in the cutting of silicon substrate 1 and high light transmittance glass wafer 22;
X, make required connecting electrode on above-mentioned printing opacity encapsulating structure.
after 1 cutting is completed to silicon substrate, need to make connecting electrode on encapsulating structure, with being connected by connecting electrode and external circuit, in the utility model embodiment, difference according to concrete type of attachment, connecting electrode comprises that metal connects spheric electrode 27 or band electrode 8, wherein, Figure 25 shows the structure that band electrode 8 is set on the second articulamentum 7, Figure 26 shows metal connection spheric electrode 27 is set on the second articulamentum 7, when specific embodiment, metal connects the height of spheric electrode 27 higher than the height of glass capping 9, so that connecting spheric electrode 27 by metal is connected with the contact of external circuit, in the utility model embodiment, Figure 26 only shows the structure that metal connects spheric electrode 27 is set on the second articulamentum 7.In the utility model embodiment, the material of connecting electrode can adopt gold commonly used.
the utility model is at the interior encapsulation groove 17 that arranges of silicon substrate 1, the interior insulation support layer 2 that arranges of encapsulation groove 17, the first articulamentum 4 and the second articulamentum 7, and be formed for installing the installing hole 11 of printing opacity chip 5 in groove 17 in encapsulation, printing opacity chip 5 be installed on installing hole 11 interior after, glass capping 9 is fastened on the second articulamentum 7, the protection of realization to printing opacity chip 5, cavity 12 between glass capping 9 and silicon substrate 1 can be as the passage of light transmition simultaneously, to satisfy the job requirement of printing opacity chip 5, its compact conformation, packaging technology is reliable, wide accommodation, safe and practical.
Claims (5)
1. printing opacity encapsulating structure based on silicon substrate and glass capping, it is characterized in that: comprise silicon substrate (1), be concaved with encapsulation groove (17) in described silicon substrate (1), the sidewall of described encapsulation groove (17) and part diapire are coated with insulation support layer (2), and described insulation support layer (2) extends the surface that covers encapsulation groove (17) notch outside silicon substrate (1); Insulation support layer (2) is provided with the first articulamentum (4), described the first articulamentum (4) is provided with the second articulamentum (7), the bottom of encapsulation groove (17) center is by forming installing hole (11) between insulation support layer (2), the first articulamentum (4) and the second articulamentum (7), and described installing hole (11) connects insulation support layer (2), the first articulamentum (4) and the second articulamentum (7); Printing opacity chip (5) is installed in installing hole (11), and described printing opacity chip (5) is electrically connected to the second articulamentum (7) by connecting line (6); The second articulamentum (7) is provided with glass capping (9), described glass capping (9) be positioned at encapsulation groove (17) notch directly over, be formed for the cavity (12) of printing opacity between the encapsulation groove (17) of glass capping (9) and below; The second articulamentum (7) is provided with the connecting electrode that is electrically connected to the second articulamentum (7).
2. the printing opacity encapsulating structure based on silicon substrate and glass capping according to claim 1, it is characterized in that: described printing opacity chip (5) is installed in installing hole (11) by chip articulamentum (3), and is supported in encapsulation silicon substrate (1) surface corresponding to groove (17) bottom land.
3. the printing opacity encapsulating structure based on silicon substrate and glass capping according to claim 1 is characterized in that: described connecting electrode is that metal connects spheric electrode (27) or band electrode (8).
4. the printing opacity encapsulating structure based on silicon substrate and glass capping according to claim 1, it is characterized in that: described glass capping (9) is provided with and connects projection (25), described connection projection (25) is provided with capping articulamentum (10), and glass capping (9) is connected and fixed by capping articulamentum (10) and the second articulamentum (7).
5. the printing opacity encapsulating structure based on silicon substrate and glass capping according to claim 1, it is characterized in that: described printing opacity chip (5) comprises image sensor, ambient light source sensor or light-emitting diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220739816 CN203013700U (en) | 2012-12-28 | 2012-12-28 | Light transmission packaging structure based on silicon substrate and glass seal cover |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220739816 CN203013700U (en) | 2012-12-28 | 2012-12-28 | Light transmission packaging structure based on silicon substrate and glass seal cover |
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| Publication Number | Publication Date |
|---|---|
| CN203013700U true CN203013700U (en) | 2013-06-19 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220739816 Expired - Fee Related CN203013700U (en) | 2012-12-28 | 2012-12-28 | Light transmission packaging structure based on silicon substrate and glass seal cover |
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| CN (1) | CN203013700U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103021965A (en) * | 2012-12-28 | 2013-04-03 | 矽格微电子(无锡)有限公司 | Light-transmitting package structure and package method based on silicon substrate and glass gland |
-
2012
- 2012-12-28 CN CN 201220739816 patent/CN203013700U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103021965A (en) * | 2012-12-28 | 2013-04-03 | 矽格微电子(无锡)有限公司 | Light-transmitting package structure and package method based on silicon substrate and glass gland |
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| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130619 Termination date: 20151228 |
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| EXPY | Termination of patent right or utility model |