CN202998013U - Network signal processing circuit - Google Patents
Network signal processing circuit Download PDFInfo
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- CN202998013U CN202998013U CN 201220642668 CN201220642668U CN202998013U CN 202998013 U CN202998013 U CN 202998013U CN 201220642668 CN201220642668 CN 201220642668 CN 201220642668 U CN201220642668 U CN 201220642668U CN 202998013 U CN202998013 U CN 202998013U
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- network signal
- inductance
- treatment circuit
- signal treatment
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Abstract
The utility model discloses a network signal processing circuit provided with a first connecting terminal and a second connecting terminal. The network signal processing circuit comprises two first connecting points located in the first connecting terminal; two second connecting points located in the second connecting terminal; two capacitors, one ends of which are respectively connected in series with the two first connecting points; a common mode choke comprising two coils, one ends of which are respectively connected with the other ends of the two capacitors; and two inductors, wherein one ends of the two inductors are respectively connected the other ends of the two coils while the other ends of the two inductors are electrically connected to a grounding terminal, and the second connecting points are connected with the other ends of the two coils. The network signal processing circuit of the utility model employs the isolation capacitors to replace an isolation transformer in a conventional circuit, thereby eliminating the workload of manually winding coils in the manufacture process of the insulation transformer and being beneficial for the miniaturization of an overall circuit module.
Description
Technical field
The utility model relates to a kind of network signal treatment circuit, refers in particular to the network signal treatment circuit between a kind of RJ of being connected in electric connector and mainboard chip.
Background technology
Existing network signal treatment circuit for communicating by letter between RJ electric connector and mainboard chip generally comprises buffer circuit and filter circuit, for example the patent No. is the Chinese patent of CN200820034924.3, this patent has disclosed a kind of circuit of the RJ45 of being applied to connector, comprise a plurality of transmission channels, each transmission channel includes a transformer and a common mode choke, one side of transformer is connected to the first circuit, the opposite side of transformer is connected to the second circuit by common mode choke, and the common mode choke of each transmission channel is wound to same magnetic core.
Because above-mentioned buffer circuit is comprised of isolating transformer, and isolating transformer need in manufacturing process manual with coil winding to magnetic core, therefore in the situation that transmission channel is more, the isolating transformer quantity of using is also larger, need the workload of hand winding also can correspondingly to increase, thereby product material cost and production cost are higher.Simultaneously, use the isolating transformer of large quantity also can cause the volume of whole circuit module to increase, be unfavorable for the miniaturization of circuit module.
Therefore, be necessary to design a kind of new, to overcome the problems referred to above.
Summary of the invention
The purpose of this utility model is to provide a kind of network signal treatment circuit, and the workload that it can reduce hand winding is conducive to reduce costs and realizes the circuit module miniaturization.
In order to achieve the above object, the utility model adopts following technical scheme:
On the one hand, the utility model provides a kind of network signal treatment circuit, has one first link and one second link, comprising: 2 first contacts are positioned at described the first link; 2 second contacts are positioned at described the second link; Two electric capacity, an end of described two electric capacity are series at respectively described 2 first contacts; One common mode choke comprises two coil, and an end of described two coil is series at respectively the other end of described two electric capacity; Two inductance, an end of described two inductance is connected with the other end of described two coil respectively, and the other end of described two inductance is electrically connected to earth terminal; Described the second contact is connected with the other end of described two coil.
Further improvement as such scheme, described electric capacity, described inductance and described common mode choke are the SMD LED surface-mount device LED element, described the first link and described the second link be input/output terminal each other, described the first link and RJ electric connector are electrically connected, and described the second link and mainboard chip are electrically connected.
On the other hand, the utility model provides a kind of network signal treatment circuit, have one first link and one second link, and be connected in four groups of signal transmission passages between described the first link and the second link, each group signal transmission passage comprises: 2 first contacts are positioned at described the first link; 2 second contacts are positioned at described the second link; Two electric capacity, an end of described two electric capacity are series at respectively described 2 first contacts; One common mode choke comprises two coil, and an end of described two coil is series at respectively the other end of described two electric capacity; Two inductance, an end of described two inductance is connected with the other end of described two coil respectively, and the other end of described two inductance is connected to earth terminal; Described the second contact is connected with the other end of described two coil.
Further improvement as such scheme, described electric capacity, described inductance and described common mode choke are the SMD LED surface-mount device LED element, described the first link and described the second link be input/output terminal each other, described the first link and RJ electric connector are electrically connected, and described the second link and mainboard chip are electrically connected.
Compared with prior art, network signal treatment circuit of the present utility model adopts the isolating transformer in electric capacity replacement available circuit, when realizing the circuit high-pass filtering and suppressing common-mode noise, can save the workload of isolating transformer manual coiling in manufacturing process, and due to the volume of the capacitor element volume much smaller than transformer, thereby also be conducive to the miniaturization of whole circuit module.
[description of drawings]
Fig. 1 is the structured flowchart of the utility model network signal treatment circuit the first embodiment;
Fig. 2 is the circuit diagram of the utility model network signal treatment circuit the first embodiment;
Fig. 3 is the structured flowchart of the utility model network signal treatment circuit the second embodiment;
Fig. 4 is the circuit diagram of the utility model network signal treatment circuit the second embodiment.
[embodiment]
For ease of better understanding the purpose of this utility model, structure, feature and effect etc., existing the utility model is described in further detail with embodiment by reference to the accompanying drawings.
With reference to Fig. 1, be the structured flowchart of the utility model network signal treatment circuit the first embodiment.Described network signal treatment circuit is connected between RJ electric connector and mainboard chip, it comprises buffer circuit, filter circuit and match circuit, one end of wherein said buffer circuit and described RJ electric connector are electrically connected, one end of the other end and described filter circuit is electrically connected, the other end of described filter circuit is electrically connected with an end of described match circuit, the other end of described match circuit is electrically connected to mainboard chip, realizes processing and the transmission of signal between described RJ electric connector and described mainboard chip with this structure.
With reference to Fig. 2, be the physical circuit figure of the utility model network signal treatment circuit the first embodiment.Described network signal treatment circuit comprises one first link and one second link, and described the first link has 2 first contact TP9, TP10, and described the second link has 2 second contact TP1, TP2.Described the first link that described 2 first contact TP9, TP10 form is connected with outside electric connector, in the present embodiment, described the first link and RJ electric connector are electrically connected, described the second link that described 2 second contact TP1, TP2 form is connected with internal load, in the present embodiment, described the second link and described mainboard chip are electrically connected.
Please refer to Fig. 1 and Fig. 2, described buffer circuit is comprised of two capacitor C 1, C2, and the end of described two capacitor C 1, C2 is series at respectively described 2 first contact TP9, TP10.By a common mode choke L1 realization, described common mode choke L1 comprises the two coil that is wound in the same way same magnetic core to described filter circuit, and an end of described two coil is series at respectively the other end of described two capacitor C 1, C2.Described match circuit is comprised of two inductance L 11, L12, and the end of described two inductance L 11, L12 is connected with the other end of described two coil respectively, and the other end of described two inductance L 11, L12 is electrically connected to respectively earth terminal.Described 2 second contact TP1, TP2 are connected with the other end of the described two coil of described common mode choke L1, are namely relation in parallel between the described internal load at described two inductance L 11, L12 and described 2 second contact TP1, TP2 place.Can select as required to have described two inductance L 11, the L12 of corresponding inductance value, obtain maximum power to realize described internal load, realize the optimum Match between described network signal treatment circuit and described internal load.In the present embodiment, become easily simple for making welding, described capacitor C 1, C2, described inductance L 11, L12 and described common mode choke L1 all select the SMD LED surface-mount device LED element, with the convenient SMT welding processing procedure that uses, realize that the automation of whole circuit module is installed.
Described the first link and described the second link be input/output terminal each other.For example, when needs transferred to described mainboard chip with external signal, described the first link was input, and described the second link should be output mutually.At this moment, described 2 second contact TP1, TP2 can input a pair of differential signal in the place, described differential signal is by described 2 second contact TP1, TP2 flow through described two capacitor C 1, C2, described two capacitor C 1, C2 can isolate the low-frequency component in described differential signal at this moment, radio-frequency component can be passed through smoothly, and enter described common mode choke L1; Described common mode choke L1 can filter out the common-mode noise in described differential signal, and the differential mode composition can pass through smoothly; Then, owing to being connected with described two inductance L 11, L12 between the other end of the described two coil of described common mode choke L1 and earth terminal, therefore, the low-frequency component that is filtered in the described differential signal of common-mode noise can enter earth terminal via described two inductance L 11, L12, and remaining signal component enters described mainboard chip by described 2 second contact TP1, TP2.
Conversely, when the past outside transmission of described mainboard chip and transmission of signal, described the second link is input, and described the first link is output.At this moment, described mainboard chip send internal signal in low-frequency component connected to earth terminal by described two inductance L 11, L12 equally, the remaining described internal signal described common mode choke L1 that flows through, at this moment, common-mode noise in described internal signal equally can be by described common mode choke L1 filtering, then isolate out low-frequency component wherein via described two capacitor C 1, C2 again, finally enter described RJ electric connector and external circuit via described 2 first contact TP9, TP10.
With reference to Fig. 3 and Fig. 4, be the second embodiment of the utility model network signal treatment circuit.In the present embodiment, described network signal treatment circuit comprises one first link and one second link equally, and being connected in four groups of signal transmission passages between described the first link and described the second link, each described signal transmission passage is that the circuit in the first embodiment consists of.Described network signal treatment circuit is connected between RJ electric connector and mainboard chip, it comprises buffer circuit, filter circuit and match circuit, one end of wherein said buffer circuit and described RJ electric connector are electrically connected, one end of the other end and described filter circuit is electrically connected, the other end of described filter circuit is electrically connected with an end of described match circuit, the other end of described match circuit is electrically connected to described mainboard chip, realizes processing and the transmission of signal between described RJ electric connector and described mainboard chip with this structure.
With reference to Fig. 4, be the physical circuit figure of the utility model network signal treatment circuit the first embodiment.Described network signal treatment circuit comprises four groups of signal transmission passages.Wherein, first group of signal transmission passage comprises that 2 first contact TP9, TP10 are positioned at described the first link, and 2 second contact TP1, TP2 are positioned at described the second link.Described the first link that described 2 first contact TP9, TP10 form and RJ electric connector are electrically connected, and described the second link that described 2 second contact TP1, TP2 form and mainboard chip are electrically connected.Similarly, second, third, the 4th group of signal transmission passage comprise respectively described the first contact TP11-TP16, described the second contact TP3-TP8.
Please refer to Fig. 3 and Fig. 4, in a second embodiment, described buffer circuit is composed in series by capacitor C 1-C8 and each described the first contact TP9-TP16, and described filter circuit is comprised of common mode choke L1-L4, and described match circuit is comprised of inductance L 5-L12.
In each described signal transmission passage, the annexation of each described electric capacity, described common mode choke and described inductance is consistent with annexation in the first embodiment, and its operation principle is also identical, repeats no more herein.
Network signal treatment circuit of the present utility model, can be according to described electric capacity, described inductance or the described common mode choke of concrete use occasion and demand selection different parameters, and the transmission channel combination of selecting varying number, to realize the function of high-pass filtering and filtering common mode noise.
Compared with prior art, the utlity model has following beneficial effect:
1. realize because described buffer circuit adopts described electric capacity, thereby when realizing the circuit high-pass filtering and suppressing common-mode noise, can save the workload of isolating transformer manual coiling in manufacturing process, be conducive to reduce production costs.
2. and because described buffer circuit adopts described electric capacity realize, and therefore the volume of described capacitor element is conducive to the miniaturization of whole circuit module much smaller than the volume of transformer.
3. because described electric capacity, described inductance and described common mode choke adopt the SMD LED surface-mount device LED element, therefore can carry out SMT welding processing procedure, realize that the automation of whole circuit module is installed.
Above detailed description is only the explanation of the preferred embodiment of the utility model, and the scope of the claims of non-so limitation the utility model is so the equivalence techniques variation for it of all this creation of utilization specifications and diagramatic content institute all is contained in the scope of the claims of this creation.
Claims (10)
1. a network signal treatment circuit, have one first link and one second link, it is characterized in that, comprising:
2 first contacts are positioned at described the first link;
2 second contacts are positioned at described the second link;
Two electric capacity, an end of described two electric capacity are series at respectively described 2 first contacts;
One common mode choke comprises two coil, and an end of described two coil is series at respectively the other end of described two electric capacity;
Two inductance, an end of described two inductance is connected with the other end of described two coil respectively, and the other end of described two inductance is electrically connected to earth terminal;
Described the second contact is connected with the other end of described two coil.
2. network signal treatment circuit as claimed in claim 1, it is characterized in that: described electric capacity, described inductance and described common mode choke are the SMD LED surface-mount device LED element.
3. network signal treatment circuit as claimed in claim 1, it is characterized in that: described the first link and described the second link be input/output terminal each other.
4. network signal treatment circuit as claimed in claim 1, is characterized in that: described the first link and the electric connection of RJ electric connector.
5. network signal treatment circuit as claimed in claim 1, is characterized in that: described the second link and mainboard chip electric connection.
6. network signal treatment circuit is characterized in that: comprise one first link and one second link, and be connected in four groups of signal transmission passages between described the first link and described the second link, the described signal transmission passage of each group comprises:
2 first contacts are positioned at described the first link;
2 second contacts are positioned at described the second link;
Two electric capacity, an end of described two electric capacity are series at respectively described 2 first contacts;
One common mode choke comprises two coil, and an end of described two coil is series at respectively the other end of described two electric capacity;
Two inductance, an end of described two inductance is connected with the other end of described two coil respectively, and the other end of described two inductance is connected to earth terminal;
Described the second contact is connected with the other end of described two coil.
7. network signal treatment circuit as claimed in claim 6, it is characterized in that: described electric capacity, described inductance and described common mode choke are the SMD LED surface-mount device LED element.
8. network signal treatment circuit as claimed in claim 6, it is characterized in that: described the first link and described the second link be input/output terminal each other.
9. network signal treatment circuit as claimed in claim 6, is characterized in that: described the first link and the electric connection of RJ electric connector.
10. network signal treatment circuit as claimed in claim 6, is characterized in that: described the second link and mainboard chip electric connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220642668 CN202998013U (en) | 2012-11-29 | 2012-11-29 | Network signal processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220642668 CN202998013U (en) | 2012-11-29 | 2012-11-29 | Network signal processing circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202998013U true CN202998013U (en) | 2013-06-12 |
Family
ID=48569138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220642668 Expired - Lifetime CN202998013U (en) | 2012-11-29 | 2012-11-29 | Network signal processing circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202998013U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106849689A (en) * | 2017-01-13 | 2017-06-13 | 戴祁弘 | A kind of network transformer circuit |
-
2012
- 2012-11-29 CN CN 201220642668 patent/CN202998013U/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106849689A (en) * | 2017-01-13 | 2017-06-13 | 戴祁弘 | A kind of network transformer circuit |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130612 |
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| CX01 | Expiry of patent term |