CN202996288U - Digital voice bi-directional processing device - Google Patents
Digital voice bi-directional processing device Download PDFInfo
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- CN202996288U CN202996288U CN2012207215161U CN201220721516U CN202996288U CN 202996288 U CN202996288 U CN 202996288U CN 2012207215161 U CN2012207215161 U CN 2012207215161U CN 201220721516 U CN201220721516 U CN 201220721516U CN 202996288 U CN202996288 U CN 202996288U
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Abstract
The utility model provides a digital voice bi-directional processing device, which comprises a digital signal processing chip, a digital voice processing chip and an FPGA chip, wherein the digital signal processing chip is provided with a first synchronous serial port and a second synchronous serial port; the digital voice processing chip is provided with an encoding interface and a channel interface, 6 bi-directional signal lines of the encoding interface are connected with the first synchronous serial port, and 6 bi-directional signal lines of the channel interface are connected with the second synchronous serial port; and the FPGA chip is connected with the digital signal processing chip through a control signal line, a data transmitting and receiving line and an address signal line, and the FPGA chip is provided with a dual-port RAM space. The digital voice bi-direction processing device can transmit voice information as much as possible on limited communication bandwidth, and solves problems such as hardware realization of acoustic coding of digital voice and the like, thereby realizing direct acoustic coding of PCM voice signals with low cost conveniently.
Description
Technical field
The utility model relates to voice coding, compression/decompression processes and transmission technical field, and specifically, the utility model relates to a kind of digital speech bidirectional processing device.
Background technology
It is ingredient indispensable in modern communications that voice signal is processed, and more and more higher along with what communication quality was required, people require alap numeric code rate to obtain synthetic speech quality as much as possible.From the market status, the application market of low-bit-rate speech coding is very extensive: occasions as a lot of in voice system, digital mobile communication, secret communication, voice mail, videophone, IP phone, voice storage, teleconference, teleshopping etc. all need to use.
Voice compression technique is with the analog voice signal sampling, quantizes, encodes, and by various algorithms, the redundancy section in sound signal is removed.Due to the insensitivity of people's ear to sound, suitable lossy compression method is play impact not quite to audiovisual.The voice compression coding mode can be divided three classes: waveform coding, parameter coding and hybrid coding.At present, many international organizations also actively are devoted to formulate the compression standard of oneself.
The main striving direction of voice compression technique is how further to lower code rate and improve anti-interference, noise resisting ability.Present reasonable algorithm has Sine Transform Coding (STC), mixed excitation linear coding (MELPC) etc.Simultaneously, also to introduce new analytical technology, as nonlinear prediction, many precision time-frequency analysis technology, higher order statistical analytical technology etc.These technology more can fully be excavated human auditory system and the mechanism of perception such as shelter, and therefore, exploitation has high compression rate, the compression algorithm not a duck soup of high-quality voice signal is provided.
The PCM Speech Signal Compression is more low-rate signal transmission, usually to develop the voice compression algorithm of oneself or buy other company technique, the exploitation high compression rate also can provide the algorithm of high-quality voice that suitable technical difficulty is arranged, construction cycle is longer, and the processing mode of this technical field main flow is that analog-digital chip connects the mechanism that speech is processed at present, can not satisfy the requirement of the pcm stream of direct processing two-forty.
Summary of the invention
Technical problem to be solved in the utility model is to provide a kind of digital speech bidirectional processing device, can transmit voice messaging as much as possible on limited communication bandwidth, solve the problems such as hardware realization of digital speech acoustic code, convenient, realize the direct acoustic code of PCM voice signal cheaply.
For solving the problems of the technologies described above, the utility model provides a kind of digital speech bidirectional processing device, comprising:
Digital signal processing chip has the first synchronous serial interface and the second synchronous serial interface;
The digital speech processing chip has addressable port and channel interface, and described addressable port two-way totally 6 signal wires wherein are connected with described the first synchronous serial interface, and described channel interface two-way totally 6 signal wires wherein are connected with described the second synchronous serial interface;
Fpga chip is connected with described digital signal processing chip by control signal wire, data transmit-receive signal line and address signal line;
Wherein, described fpga chip has the dual port RAM space.
Alternatively, described digital speech processing chip is AMBE 2000 chips.
Alternatively, totally 6 signal wires of being connected with described the first synchronous serial interface of described addressable port are two-way coding send-receive clock line, the first receiving frame line synchro and the first transceiving data line.
Alternatively, totally 6 signal wires of being connected with described the second synchronous serial interface of described channel interface are two-way passage send-receive clock line, the second receiving frame line synchro and the second transceiving data line.
Alternatively, described first synchronous serial interface of described digital signal processing chip and described the second synchronous serial interface are respectively McBSP1 port and the McBSP2 port of the DSP of Texas Instrument family chip.
Alternatively, described digital speech processing chip, described digital signal processing chip and described fpga chip are encapsulated as a standalone module.
Compared with prior art, the utlity model has following advantage:
1. the utility model uses special-purpose digital speech processing chip (as AMBE 2000) to realize the more low rate compression of PCM voice signal;
2. the utility model directly is connected the digital speech processing chip alternately with digital signal processing (DSP) chip, has cancelled the conversion of digital signal and simulating signal;
3. in the utility model, digital voice is processed by dedicated channel, has solved the consistance of communicating by letter between communication requirement high speed ip voice terminal and other low-speed devices.
The utility model directly leads PCM-A or μ leads signal and carries out the high compression rate encoding and decoding speech, has realized the transmission of voice at low rate channel, perhaps coordinate have number, the equipment of words simultaneous interpretation function carries out multipath transmission.
Description of drawings
The above and other feature of the present utility model, character and advantage will become more obvious by the description below in conjunction with drawings and Examples, wherein:
Fig. 1 is the module frame chart of the digital speech bidirectional processing device connecting system of an embodiment of the utility model;
Fig. 2 is the inner structure block diagram of digital speech bidirectional processing device embodiment illustrated in fig. 1.
Embodiment
The utility model is described in further detail below in conjunction with specific embodiments and the drawings; set forth in the following description more details so that fully understand the utility model; but the utility model obviously can be implemented with the multiple alternate manner that is different from this description; those skilled in the art can be in the situation that do similar popularization, deduction without prejudice to the utility model intension according to practical situations, therefore should be with the content constraints of this specific embodiment protection domain of the present utility model.
Fig. 1 is the module frame chart of the digital speech bidirectional processing device connecting system of an embodiment of the utility model.As shown in Figure 1, this digital speech bidirectional processing device 100 is connected with central processing unit (CPU), and the transmission of carrying out data-signal and control signal is mutual.
Fig. 2 is the inner structure block diagram of digital speech bidirectional processing device embodiment illustrated in fig. 1.As shown in Figure 2, these digital speech bidirectional processing device 100 internal mains will comprise: digital speech processing chip 101, digital signal processing chip 102 and fpga chip 103.This digital signal processing chip 102 can be the DSP of Texas Instrument family chip, has the first synchronous serial interface 121 and the second synchronous serial interface 122.This first synchronous serial interface 121 is specially the McBSP1 port, and this second synchronous serial interface 122 is specially the McBSP2 port.Digital speech processing chip 101 can be AMBE 2000 chips, has addressable port 111 and channel interface 112.Addressable port 111 two-way totally 6 signal wires (comprising coding send-receive clock line, the first receiving frame line synchro and the first transceiving data line) wherein are connected with the first synchronous serial interface 121, and channel interface 112 two-way totally 6 signal wires (comprising passage send-receive clock line, the second receiving frame line synchro and the second transceiving data line) wherein are connected with the second synchronous serial interface 122.Fpga chip 103 comprises a twoport ram space 131, and this fpga chip 103 is connected with digital signal processing chip 102 by control signal wire, data transmit-receive signal line and address signal line respectively.
In the present embodiment, the workflow of this digital speech bidirectional processing device 100 can be described below:
In the time of this digital speech bidirectional processing device 100 work, be divided into the compression of digital voice and two parts of decompression of digital voice.when carrying out the digital voice compression, the high speed voice signal that this digital speech bidirectional processing device 100 is sent central processing unit no longer carries out digital-to-analogue/analog to digital conversion according to traditional using method with digital voice, then carries out digital voice and process, but first pass through fpga chip 103, after fpga chip 103 receives digital voice signal, put into own built-in dual port RAM space 131, digital signal processing (DSP) chip 102 by the judgement symbol position directly from dual port RAM space 131 interior reading out datas, dsp chip 102 will read data and carry out format conversion, send to the addressable port 111 of digital speech processing chip 101 (AMBE 2000) by the first synchronous serial interface 121, digital speech processing chip 101 arranges according to the preformat of dsp chip 102 data is compressed, then give back dsp chip 102 by channel interface 112, dsp chip 102 is the dual port RAM space 131 by fpga chip 103 again, the low rate digital voice data that compression is good is transmitted to outside central processing unit.And when carrying out the digital voice decompression, this digital voice bidirectional treating apparatus 100 is processed according to the process opposite with above-mentioned compression process, has just repeated no more at this.
The artificial circuit part of having forgone in digital speech bidirectional processing device of the present utility model has reduced between numeral, mimic channel and has disturbed, and with after system is connected, can be encapsulated as a standalone module.
Compared with prior art, innovative point of the present utility model can be described below:
1. the utility model uses special-purpose digital speech processing chip (as AMBE 2000) to realize the more low rate compression of PCM voice signal;
2. the utility model directly is connected the digital speech processing chip alternately with digital signal processing (DSP) chip, has cancelled the conversion of digital signal and simulating signal;
3. in the utility model, digital voice is processed by dedicated channel, has solved the consistance of communicating by letter between communication requirement high speed ip voice terminal and other low-speed devices.
The utility model directly leads PCM-A or μ leads signal and carries out the high compression rate encoding and decoding speech, has realized the transmission of voice at low rate channel, perhaps coordinate have number, the equipment of words simultaneous interpretation function carries out multipath transmission.
Although the utility model with preferred embodiment openly as above, it is not to limit the utility model, and any those skilled in the art can make possible change and modification within not breaking away from spirit and scope of the present utility model.Therefore, every content that does not break away from technical solutions of the utility model, according to technical spirit of the present utility model to any modification, equivalent variations and modification that above embodiment does, within all falling into the protection domain that the utility model claim defines.
Claims (6)
1. a digital speech bidirectional processing device, is characterized in that, comprising:
Digital signal processing chip (102) has the first synchronous serial interface (121) and the second synchronous serial interface (122);
Digital speech processing chip (101), have addressable port (111) and channel interface (112), described addressable port (111) two-way totally 6 signal wires wherein are connected with described the first synchronous serial interface (121), and described channel interface (112) two-way totally 6 signal wires wherein are connected with described the second synchronous serial interface (122);
Fpga chip (103) is connected with described digital signal processing chip (102) by control signal wire, data transmit-receive signal line and address signal line;
Wherein, described fpga chip (103) has dual port RAM space (131).
2. digital speech bidirectional processing device according to claim 1, is characterized in that, described digital speech processing chip (101) is AMBE 2000 chips.
3. digital speech bidirectional processing device according to claim 2, it is characterized in that, totally 6 signal wires that described addressable port (111) is connected with described the first synchronous serial interface (121) are two-way coding send-receive clock line, the first receiving frame line synchro and the first transceiving data line.
4. digital speech bidirectional processing device according to claim 2, it is characterized in that, totally 6 signal wires that described channel interface (112) is connected with described the second synchronous serial interface (122) are two-way passage send-receive clock line, the second receiving frame line synchro and the second transceiving data line.
5. digital speech bidirectional processing device according to claim 1, it is characterized in that, described first synchronous serial interface (121) of described digital signal processing chip (102) and described the second synchronous serial interface (122) are respectively McBSP1 port and the McBSP2 port of the DSP of Texas Instrument family chip.
6. digital speech bidirectional processing device according to claim 1, it is characterized in that, described digital speech processing chip (101), described digital signal processing chip (102) and described fpga chip (103) are encapsulated as a standalone module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207215161U CN202996288U (en) | 2012-12-24 | 2012-12-24 | Digital voice bi-directional processing device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207215161U CN202996288U (en) | 2012-12-24 | 2012-12-24 | Digital voice bi-directional processing device |
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| CN202996288U true CN202996288U (en) | 2013-06-12 |
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| CN2012207215161U Expired - Fee Related CN202996288U (en) | 2012-12-24 | 2012-12-24 | Digital voice bi-directional processing device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103714819A (en) * | 2013-11-18 | 2014-04-09 | 上海新干通通信设备有限公司 | Multifunctional speech encoding and decoding conversion device |
| CN104505098A (en) * | 2014-12-23 | 2015-04-08 | 天津光电通信技术有限公司 | AMBE (advanced multi-band excitation) speech compression circuit based on FPGA (field programmable gate array) |
| CN105094978A (en) * | 2014-05-15 | 2015-11-25 | 研祥智能科技股份有限公司 | Speech processing device and method |
-
2012
- 2012-12-24 CN CN2012207215161U patent/CN202996288U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103714819A (en) * | 2013-11-18 | 2014-04-09 | 上海新干通通信设备有限公司 | Multifunctional speech encoding and decoding conversion device |
| CN105094978A (en) * | 2014-05-15 | 2015-11-25 | 研祥智能科技股份有限公司 | Speech processing device and method |
| CN105094978B (en) * | 2014-05-15 | 2020-02-28 | 研祥智能科技股份有限公司 | Voice processing device and method |
| CN104505098A (en) * | 2014-12-23 | 2015-04-08 | 天津光电通信技术有限公司 | AMBE (advanced multi-band excitation) speech compression circuit based on FPGA (field programmable gate array) |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130612 Termination date: 20211224 |