CN202976631U - Single chip microcomputer experimental box - Google Patents
Single chip microcomputer experimental box Download PDFInfo
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- CN202976631U CN202976631U CN 201320002723 CN201320002723U CN202976631U CN 202976631 U CN202976631 U CN 202976631U CN 201320002723 CN201320002723 CN 201320002723 CN 201320002723 U CN201320002723 U CN 201320002723U CN 202976631 U CN202976631 U CN 202976631U
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Abstract
The utility model relates to a single chip microcomputer experimental box, and belongs to the technical field of teaching instruments. A design concept of separation of a main control plate and a bottom plate is used in the experimental box, different chip main boards can be replaced according to needs, and the experimental box supports AT 51 serial single chip microcomputers and mega 16 serial single chip microcomputers. The experimental box can be used for completing basic experiments, namely a light-emitting diode (LED) and four-digit digital tube display experiment, a 1602 liquid crystal and 12864 liquid crystal display experiment, an independent button and coding keyboard experiment, a buzzer and relay experiment, a serial port communication and perpetual calendar experiment, an ADC0832 data collecting and TLC5615 collecting experiment, an parallel port AD0809 experiment and 24C02 storage experiment. The experimental box can also be used for completing enhanced experiments, namely an infrared remote control communication experiment, a 16 * 16 LED dot matrix experiment, a direct-current motor driving experiment, a stepper motor drive experiment, a photosensitive sensor and thermosensitive sensor data collecting experiment, a secure digital memory (SD) card data storage experiment, and a PS/2 keyboard experiment.
Description
Technical field
The utility model relates to a kind of teaching experimental box, and especially a kind of MCS-51 series monolithic experimental box belongs to technical field of teaching instruments.
Background technology
the ratio of experimental teaching in teaching progressively increases, experimental teaching is to cultivate the student experimenting manipulative ability, experimental study ability and innovation ability, and thereby the knowledge of theory teaching is obtained rational knowledge grasp knowwhy by experiment, therefore experimental teaching content has comprised the checking type, comprehensive, designability and Making Innovation Experiments project, Chinese student's experimental design ability and innovation ability generally are short of at present, this and experimental teaching equipment and teaching method are contacted directly, can be by improving experimental teaching equipment and teaching method, progressively reach the purpose that improves student experimenting designed capacity and innovation ability.
Summary of the invention
The purpose of this utility model is can not solve preferably for existing singlechip experimental box the shortcoming that the student carries out designability and Making Innovation Experiments, propose a kind of follow-on singlechip experimental box, this experimental box not only has basic experiment content but also has been equipped with the experimental project of raising property.Adopt independently mentality of designing of experimental circuit, integrated and the detail programming of system needs the student to take action on one's own to test, and the activity of can learning by experimentation in the place of any permission, increased chance and content that student's experiment is started, made their experimental study ability, innovation ability be taken exercise and improve.
to achieve the above object, design a kind of singlechip experimental box, comprise main control board and bottom peripheral hardware plate, the structure that adopts main control board to separate with bottom peripheral hardware plate, bottom peripheral hardware plate comprises power circuit, can produce 12V, 5V, 3.3V power supply, the LED display circuit, digital pipe display circuit, the liquid crystal 1602 display circuit, liquid crystal 12864 display circuits, independent key circuit, the 4*4 matrix keyboard circuit, buzzer circuit, relay circuit, RS232 turns the TTL circuit, the ADC0809AD data acquisition circuit, the TLC5615 data acquisition circuit, the ADC0832 data acquisition circuit, the AT24C02 memory circuit, the DS1302 digital clock circuit, the Infrared remote controller receiving circuit, the 16*16 dot-matrix drive circuit, direct current motor drive circuit, stepper motor driving circuit, SD card memory circuit, the PS/2 keyboard circuit, separate between the each several part circuit, independent banana head jack is arranged.
Preferably, peg graft with double-row needle between described main control board and bottom peripheral hardware plate, it is the double-row needle composition of 2.54mm that double-row needle adopts 4 stripe pitch, and structure is firm, and has introduced 12V, 5V and 3.3V power supply on row's pin.
Preferably, described main control board is 51 master control borads, adopts STC series 51 chips, AT series 51 chips, MEGA family chip, and 51 master control borads comprise that 51 single-chip microcomputers, reset circuit, PL2303RS232 turn Transistor-Transistor Logic level change-over circuit, ISP download circuit; Wherein reset circuit is designed to two parts, and high level resets and low level resets, and controls by different buttons.
Preferably, also comprise perpetual calendar experimental circuit in red-letter day, formed by the integrated circuit of clock DS1302 on described bottom peripheral hardware plate, hummer, liquid crystal 1602 display circuit or liquid crystal 12864 display circuits.
Can also realize according to real-life needs design the circuit of certain function.Can form the timing bell-ringing experimental circuit by integrated circuit DS1302, relay, electric bell; Can form infrared decoding by liquid crystal display LCD1602 or LCD12864, infrared receiving circuit and show experimental circuit; Can form the intelligent carriage experimental circuit by dc micro-motor and accessory circuit; Can also be self-designed other circuit of student, the student pinpoints the problems, designs the scheme of dealing with problems by oneself, thereby takes exercise and improve it and test designed capacity and innovation ability.
Description of drawings
Below in conjunction with accompanying drawing, embodiment of the present utility model is described in further detail.
Fig. 1 is the novel master control borad schematic diagram of this experiment.
Fig. 2 is the novel 16*16 dot matrix schematic diagram of this experiment.
Fig. 3 is the novel PCF8591 schematic diagram of this experiment.
Fig. 4 is the novel digital pipe display circuit schematic diagram of this experiment.
Fig. 5 is the novel SD card schematic diagram of this experiment.
Fig. 6 is the novel DC motor control circuit schematic diagram of this experiment.
Fig. 7 is the novel serial port circuit schematic diagram of this experiment.
Fig. 8 is the novel clock circuit schematic diagram of this experiment.
Fig. 9 is 12864 novel liquid crystal display circuit schematic diagrams of this experiment.
Figure 10 is DC relay schematic diagram of the present utility model.
Figure 11 is stepping motor control circuit schematic diagram of the present utility model.
Figure 12 is the general frame of the present utility model.
Embodiment
in Fig. 1, AT89S52 is that the single-chip microcomputer socket can be installed singlechip chip, support AT series 51 chips and STC series 51 chips, 40 pin connect the 5V power supply, 20 pin meet GND, the EA pin connects the 5V power supply, 18, 19 pin connect crystal oscillating circuit, 9 pin connect reset circuit, other pins and H1, the H2 double-row needle connects, be connected with base plate by double-row needle, H3 is connected that the contact pin of reserving is connected with the floor with H4, PL2303 is that paster USB turns 232 chips, 1 pin is connected to microcontroller serial port RX end by resistance R 3, 4 pin connect the USB power supply, 5 pin connect the serial ports output terminal of single-chip microcomputer, 15, 16 pin are respectively by resistance R 6, R7 connects the FPDP of USB, 19, 20 pin connect the USB power supply, 17, 21, 24, 25 connect power supply ground, 27, 28 pin connect crystal oscillating circuit.Reset circuit is divided into two kinds can be by wire jumper setting a kind of mode wherein, a kind of high level reset circuit that is comprised of C3, R1, button, a kind of low-level reset circuit that is comprised of R2, button.
In Fig. 2, U7, U8 is 74HC164, wherein the U713 pin connects 1 pin and 2 pin of U8,3 pin of 3 pin of U7,4 pin, 5 pin, 6 pin, 10 pin, 11 pin, 12 pin, 13 pin and U8,4 pin, 5 pin, 6 pin, 10 pin, 11 pin, 12 pin, 13 pin connect respectively the base stage of triode B0 ~ B15 by a 4.7K resistance, the emission collection of B0 ~ B15 connects the 5V power supply, and collector meets respectively 8*8 dot matrix U9,9 pin of U10,14 pin 5 pin, 12 pin, 1 pin, 7 pin, 2 pin, 5 pin.Serial input connects 12 pin and 11 pin of 74HC595 chip U13, U14,13 pin 8 pin ground connection, 10 pin 16 pin connect the 5V power supply, 9 pin of U13 connect 14 pin of U14, and 15 pin of U13, U14,1 pin, 2 pin, 3 pin, 4 pin, 5 pin, 6 pin, 7 pin connect respectively 13 pin, 3 pin, 4 pin, 10 pin, 6 pin, 11 pin, 15 pin, 16 pin of 8*8 dot matrix U9, U10, U11, U12 by the resistance that connects 220 Europe.
In Fig. 3,16 pin, 14 pin of PCF8991 chip connect 5V voltage, and 13 pin and 12 pin ground connection connect 0.01uf capacitor C 13 between the 5V VDD-to-VSS.9 pin and 10 pin are serial input terminals of chip, on draw 10K resistance, connect input terminal.6,7,8 pin ground connection.AD input end 1 connects 3 pin of 10K potentiometer, and potentiometer 1 pin, 2 pin connect respectively VDD-to-VSS, can obtain a voltage input PCF8591 analog channel 1 that 0 ~ 5V is variable by adjusting potentiometer.Analog channel 2 connects the dividing potential drop of 10K photoresistance and 10K resistance, and the variation by light can obtain an aanalogvoltage.Analog channel 2 connects the dividing potential drop of 10K thermistor and 10K resistance, and the variation by temperature can obtain an aanalogvoltage.The output of PCF8591 digital-to-analogue connects 2 pin of SEL, 1 pin connecting resistance 470 and the light emitting diode of SEL, and 3 pin of SEL connect the analog input channel 4 of PDF8591, can select the output of digital-to-analogue output voltage sending and receiving optical diode or PCF8591 analog input by wire jumper.
In Fig. 4, U16, U17 are 12 pin, 9 pin, 8 pin, 6 pin that four common anode charactron bit lines are charactron, and U16, U17 bit line connect respectively the collector of triode Q19 ~ Q26.The emitting stage of Q19 ~ Q26 connects respectively the 5V power supply, and base stage meets 100 Europe resistance R 41 ~ R48, and another termination three or eight code translator U15 of resistance are output terminal 7 pin of 74LS138 ~ 15 pin.1 pin of U15,2 pin, 3 pin are the input pin of chip, and 6 pin, 16 pin connect the 5V power supply, 4 pin, 5 pin, 8 pin ground connection.11 pin of charactron U16, U17,7 pin, 4 pin, 2 pin, 1 pin, 10 pin, 5 pin, 3 pin parallel connections, the resistance that connects 220 Europe is connected to connection terminal.
In Fig. 5,4 pin of SDCard connect the 3.3V power supply, 6 pin, 3 pin ground connection, and meeting C10 between VDD-to-VSS is 0.01uf electric capacity.7 pin, 5 pin, 2 pin, 1 pin connect respectively 100 Europe resistance one ends, another termination connection terminal of resistance.
In Fig. 6, at first input terminal connects R49, two 2K resistance of R50, the base stage of another termination Q27NPN type triode 8050 of R49, the collector of Q27 connects 200 Europe resistance R 52, another termination positive-negative-positive triode 8550 of R52 is Q31, the emitter of Q31 connects the 5V power supply, and the collector of Q31 connects the collector of Q29, and the collector of Q31 is as output termination connection terminal.The base stage of another termination Q28 of R50, the collector of Q28 connects an end of 200 Europe resistance R 51, the collector of another termination Q32, the emitter of Q28 connects the base stage of Q29, the grounded emitter of Q29, the emitter of Q30 connects the collector of Q32, and the collector of Q30 connects connection terminal output.This circuit can be controlled rotating speed and the sense of rotation of direct current generator.
In Fig. 7, master chip employing Max3232 chip is realized the conversion between Transistor-Transistor Logic level and RS232 level.Connect 0.01uf capacitor C 1 between 1 pin of Max3232 and 3 pin, connect 0.01uf capacitor C 2 between 4 pin and 5 pin, 11 pin ground connection, 10 pin connect the transmitting terminal of Transistor-Transistor Logic level, and 9 pin connect the receiving end of Transistor-Transistor Logic level, and 16 pin connect the 5V power supply, connect 0.01uf capacitor C 3 between 16 pin and 2 pin, 15 pin connect 5 pin of DB9, and 7 pin connect 2 pin of DB9, and 8 pin connect 3 pin of DB9.
In Fig. 8, clock chip adopts DS1302, and 1 pin of DS1302 connects the 5V power supply, and 2 pin, 3 pin connect clock, and clock adopts the watch crystal of 32.768KHZ and capacitor C 6, C7 to form.The 4 pin ground connection of DS1302.5 pin, 6 pin, 7 pin are data-interface, draw the resistance of 10K on respectively, then are connected with the data connection terminal.The 5V power supply connects 8 pin of DS1302 by diode 4148 and resistance R 7, and 8 pin can be connected with standby power supply BT1 by wire jumper.
In Fig. 9, it is main devices that this circuit adopts 12864 liquid crystal with character library, 1 pin ground connection of 12864 liquid crystal, and 2 pin connect power supply by wire jumper, and 3 pin connect potentiometer, adjust the brightness of liquid crystal by the output voltage of adjusting potentiometer.4 pin ~ 17 pin are the control end of liquid crystal display, can connect the IO port of single-chip microcomputer, and 18 pin connect 10K resistance one end, 19 pin ground connection, and 20 pin connect the other end of 10K resistance.
In Figure 10, at first the input control end of relay connects 1K resistance R 40, another termination positive-negative-positive triode Q2(8550 of resistance), the grounded collector of triode, the emitter of triode connects an end of the coil of DC relay, another termination 5V power supply of relay coil.Diode on ice at relay coil two ends, the negative pole of diode is succeeded the 5V end of electric apparatus coil, and the positive pole of diode is succeeded the other end of electric apparatus coil.
In Figure 11, main control chip is ULN2003, and 1 pin of ULN2003,2 pin, 3 pin, 4 pin connect and draw 4.7K resistance, another termination power 5V of pull-up resistor.Input termination connection terminal connects 1 pin ~ 4 pin, and output terminal is 13 pin ~ 16 pin of ULN2003, connects the output terminal of connection terminal.
in Figure 12, what occupy plank left side has a RS232 circuit, the PS/2 keyboard circuit, SD card circuit, the direct current generator circuit, the stepper motor circuit, PCF8591 digital-to-analogue and analog to digital conversion circuit, buzzer circuit, occupy the power interface circuit that has of plank upside, the LED display circuit, the DS1302 clock circuit, digital pipe display circuit, the 24C02 memory circuit, what occupy the plank right side has 1602 liquid crystal and 12864 liquid crystal circuit, the ADC0832 circuit, the TLC5615 circuit, the HS0038 circuit, what occupy the plank downside has an ADC0809 circuit, independent key circuit, the 4*4 matrix keyboard circuit, 16*16 dot matrix circuit, what occupy the center is the master control borad circuit.
Claims (4)
1. singlechip experimental box, comprise main control board and bottom peripheral hardware plate, the structure that adopts main control board to separate with bottom peripheral hardware plate, bottom peripheral hardware plate comprises power circuit, can produce 12V, 5V, 3.3V power supply, the LED display circuit, digital pipe display circuit, the liquid crystal 1602 display circuit, liquid crystal 12864 display circuits, independent key circuit, the 4*4 matrix keyboard circuit, buzzer circuit, relay circuit, RS232 turns the TTL circuit, the ADC0809AD data acquisition circuit, the TLC5615 data acquisition circuit, the ADC0832 data acquisition circuit, the AT24C02 memory circuit, the DS1302 digital clock circuit, the Infrared remote controller receiving circuit, the 16*16 dot-matrix drive circuit, direct current motor drive circuit, stepper motor driving circuit, SD card memory circuit, the PS/2 keyboard circuit, separate between the each several part circuit, independent banana head jack is arranged.
2. singlechip experimental box according to claim 1, it is characterized in that, peg graft with double-row needle between described main control board and bottom peripheral hardware plate, it is the double-row needle composition of 2.54mm that double-row needle adopts 4 stripe pitch, and has introduced 12V, 5V and 3.3V power supply on row's pin.
3. singlechip experimental box according to claim 1, it is characterized in that, described main control board is 51 master control borads, adopt STC series 51 chips, AT series 51 chips, MEGA family chip, 51 master control borads comprise that 51 single-chip microcomputers, reset circuit, PL2303RS232 turn Transistor-Transistor Logic level change-over circuit, ISP download circuit; Wherein reset circuit is designed to two parts, and high level resets and low level resets, and controls by different buttons.
4. singlechip experimental box according to claim 1, is characterized in that, also comprises perpetual calendar experimental circuit in red-letter day, is comprised of the integrated circuit of clock DS1302 on described bottom peripheral hardware plate, hummer, liquid crystal 1602 display circuit or liquid crystal 12864 display circuits.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320002723 CN202976631U (en) | 2013-01-05 | 2013-01-05 | Single chip microcomputer experimental box |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320002723 CN202976631U (en) | 2013-01-05 | 2013-01-05 | Single chip microcomputer experimental box |
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| CN202976631U true CN202976631U (en) | 2013-06-05 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201320002723 Expired - Fee Related CN202976631U (en) | 2013-01-05 | 2013-01-05 | Single chip microcomputer experimental box |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104332125A (en) * | 2014-11-13 | 2015-02-04 | 梧州学院 | Nixie tube panel and key control circuit and control method thereof |
| CN105845003A (en) * | 2016-05-20 | 2016-08-10 | 深圳国泰安教育技术股份有限公司 | Modularized single-chip microcomputer experiment box |
| CN108387778A (en) * | 2018-01-25 | 2018-08-10 | 周元忠 | A kind of Multifunctional frequency counter integrated circuit chip |
| CN109464685A (en) * | 2019-01-23 | 2019-03-15 | 东莞明佳美电子有限公司 | A kind of Intelligent ultraviolet radiation disinfector |
| CN113129712A (en) * | 2021-03-16 | 2021-07-16 | 雷霆 | Logic training development board |
-
2013
- 2013-01-05 CN CN 201320002723 patent/CN202976631U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104332125A (en) * | 2014-11-13 | 2015-02-04 | 梧州学院 | Nixie tube panel and key control circuit and control method thereof |
| CN104332125B (en) * | 2014-11-13 | 2017-04-12 | 梧州学院 | Nixie tube panel and key control circuit and control method thereof |
| CN105845003A (en) * | 2016-05-20 | 2016-08-10 | 深圳国泰安教育技术股份有限公司 | Modularized single-chip microcomputer experiment box |
| CN108387778A (en) * | 2018-01-25 | 2018-08-10 | 周元忠 | A kind of Multifunctional frequency counter integrated circuit chip |
| CN109464685A (en) * | 2019-01-23 | 2019-03-15 | 东莞明佳美电子有限公司 | A kind of Intelligent ultraviolet radiation disinfector |
| CN113129712A (en) * | 2021-03-16 | 2021-07-16 | 雷霆 | Logic training development board |
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130605 Termination date: 20150105 |
|
| EXPY | Termination of patent right or utility model |