CN202975545U - Array substrate and three-dimensional (3D) display device - Google Patents
Array substrate and three-dimensional (3D) display device Download PDFInfo
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- CN202975545U CN202975545U CN2012206787159U CN201220678715U CN202975545U CN 202975545 U CN202975545 U CN 202975545U CN 2012206787159 U CN2012206787159 U CN 2012206787159U CN 201220678715 U CN201220678715 U CN 201220678715U CN 202975545 U CN202975545 U CN 202975545U
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Abstract
The utility model provides an array substrate and a three-dimensional (3D) display device, and belongs to the field of 3D display. The array substrate comprises a substrate and 2n lines of pixel units formed on the substrate in the array form, and further comprises gate lines corresponding to the 2n lines of pixel units in a one gate line-to-one line of pixel units correspondence. Each gate line is connected with grid electrodes in pixel units corresponding to the gate line, wherein the gate line corresponding to the 2k-1 line of pixel units receives grid electrode scanning signals according to a preset time period, or the gate line corresponding to the 2k line of pixel units receives the grid electrode scanning signals according to the preset time period, and the k is a natural number not smaller than 1 and not larger than n. The array substrate and the 3D display device can guarantee the charging time for pixel electrodes while the refresh rate of a display panel is improved, and 3D display is achieved.
Description
Technical field
The utility model relates to 3D and shows the field, refers to especially a kind of array base palte and 3D display device.
Background technology
Along with the development of display technique, the 3D display technique has become one of important technology of display device.Active-shutter 3D display technique is a kind of lower-cost 3D display mode that realizes, it is to realize 3D effect by the refresh rate that improves picture, and the quick switching of cooperation 3D glasses, make beholder's eyes can watch corresponding left-and right-eye images, and form the effect of stereopsis.
Due to the requirement of human eye for the continuous pictures reception, need to provide the picture of 60Hz at least for every eyes, therefore, the refreshing frequency of display device will reach 120Hz, correspondingly, the driving frequency of display device drive circuit also needs to bring up to 120Hz, and the duration of charging of each pixel electrode will reduce like this.In order to guarantee the charge rate of pixel electrode, the live width that often needs to increase the display device upper conductor can reduce the transmitance of display device like this to reduce the load of display device; And the product yield of the display device of high refreshing frequency is not high, thereby can cause the cost of product to raise.
The utility model content
The technical problems to be solved in the utility model is to provide a kind of array base palte and 3D display device, can guarantee the duration of charging of pixel electrode when improving the display device refreshing frequency, realizes that 3D shows.
For solving the problems of the technologies described above, embodiment of the present utility model provides technical scheme as follows:
On the one hand, a kind of array base palte is provided, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, the gate line of the capable pixel cell of corresponding 2k-1 receives the grid sweep signal according to preset time period, and wherein, k is not less than 1 natural number that is not more than n.
Further, in such scheme, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line receive successively the grid sweep signal in described preset time period; Corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line do not receive the grid sweep signal in described preset time period.
Further, in such scheme, the time span of described preset time period is 1/120s.
The utility model embodiment also provides a kind of 3D display device, comprises array base palte as above and driving circuit, and described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k-1.
Further, in such scheme, described 3D display device is liquid crystal display or OLED display.
The utility model embodiment also provides a kind of array base palte, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, the gate line of the capable pixel cell of corresponding 2k receives the grid sweep signal according to preset time period, wherein, k is not less than 1 natural number that is not more than n.
Further, in such scheme, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line receive successively the grid sweep signal in described preset time period; Corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line do not receive the grid sweep signal in described preset time period.
Further, in such scheme, the time span of described preset time period is 1/120s.
The utility model embodiment also provides a kind of 3D display device, comprises array base palte as above and driving circuit, and described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k.
Further, in such scheme, described 3D display device is liquid crystal display or OLED display.
Embodiment of the present utility model has following beneficial effect:
in such scheme, the gate line of array base palte receives the grid sweep signal according to preset time period, wherein, perhaps only have the gate line of odd-numbered line pixel cell to receive the grid sweep signal in preset time period, perhaps only have the gate line of even number line pixel cell to receive the grid sweep signal in preset time period, the technical solution of the utility model is in an image frame like this, only need to be to the gate charges of half pixel cell, can reduce the duration of charging of array base palte, can be when improving the display device refreshing frequency, guarantee the duration of charging of pixel electrode, realize that 3D shows.
Description of drawings
Fig. 1 is the schematic diagram of 3D display device when showing of the utility model embodiment one;
Fig. 2 is the schematic diagram of 3D display device when showing of the utility model embodiment two.
Embodiment
For technical matters, technical scheme and advantage that embodiment of the present utility model will be solved is clearer, be described in detail below in conjunction with the accompanying drawings and the specific embodiments.
Embodiment of the present utility model provides a kind of array base palte and 3D display device, can guarantee the duration of charging of pixel electrode when improving the display device refreshing frequency, realizes that 3D shows.
in the technical solution of the utility model, the gate line of array base palte receives the grid sweep signal according to preset time period, wherein, perhaps only have the gate line of odd-numbered line pixel cell to receive the grid sweep signal in preset time period, perhaps only have the gate line of even number line pixel cell to receive the grid sweep signal in preset time period, the technical solution of the utility model is in an image frame like this, only need to be to the gate charges of half pixel cell, can reduce the duration of charging of array base palte, can be when improving the display device refreshing frequency, guarantee the duration of charging of pixel electrode, realize that 3D shows.
Below in conjunction with accompanying drawing and specific embodiment, array base palte of the present utility model and 3D display device are described in detail:
Embodiment one
When the refreshing frequency of display device is 60Hz, suppose to be provided with on array base palte 1126 row pixel cells, line by line under driven sweep, the opening time of every row pixel cell is 1/(1126*60) s, be about 14.8us, in order to realize that 3D shows, the refreshing frequency of display device need to be brought up to 120Hz, the duration of charging of pixel electrode will reduce like this, in order to guarantee the charge rate of pixel electrode, in prior art, the live width that often needs to increase the array base palte upper conductor can reduce the transmitance of display device like this to reduce the load of display device; And the response time of the display device of high refreshing frequency is not enough, makes image quality relatively poor.
For fear of the problems referred to above, the present embodiment provides a kind of array base palte, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, and wherein, the gate line of the capable pixel cell of corresponding 2k-1 receives the grid sweep signal according to preset time period, wherein, k is not less than 1 natural number that is not more than n.
Further, in the present embodiment, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line receive successively the grid sweep signal in described preset time period; Corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line do not receive the grid sweep signal in described preset time period.
Further, in the present embodiment, the time span of described preset time period is 1/120s.
The present embodiment also provides a kind of 3D display device, comprises array base palte as above and driving circuit, and as shown in Figure 1, described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k-1.
Display device described in the present embodiment can be the display device such as liquid crystal display, LCD TV, OLED display, OLED TV, Electronic Paper, mobile phone or panel computer.
The driving method of above-mentioned 3D display device comprises:
Gate line to the capable pixel cell of described 2k-1 in described preset time period sends the gated sweep signal.
Particularly, in the change-over switch by active shutter glasses, when providing picture for beholder's left eye, gate driver circuit successively to the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line send the gated sweep signal, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line receive successively the grid sweep signal, realize the left eye picture disply; Gate driver circuit not to the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line send the gated sweep signal, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line do not receive the grid sweep signal, namely the pixel cell of even number line is shown as black.
Equally, in the change-over switch by active shutter glasses, when providing picture for beholder's right eye, gate driver circuit successively to the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line send the gated sweep signal, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line receive successively the grid sweep signal, realize the right eye picture disply; Gate driver circuit not to the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line send the gated sweep signal, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line do not receive the grid sweep signal, namely the pixel cell of even number line is shown as black.
In sum, in the process that the 3D of the present embodiment display device shows, gate driver circuit does not send the gated sweep signal all the time to the gate line of even number line pixel cell, and the even number line pixel cell is shown as black all the time.Simultaneously in said process, the data drive circuit of array base palte normally provides data-signal for the data line of pixel cell, but when the gate line of pixel cell does not receive the gated sweep signal, the thin film transistor (TFT) of pixel cell can not be opened, pixel cell will can not carry out picture disply, be shown as black.
By such scheme, the 3D display device can refresh picture 120 times in 1s, makes the refreshing frequency of 3D display device reach 120Hz.If be provided with 1126 row pixel cells on array base palte, line by line under driven sweep, the opening time of every row pixel cell is (1/120)/(1126/2) s, is about 14.8us, can find out, in order to realize that 3D shows, although the refreshing frequency of the 3D display device of the present embodiment has been brought up to 120Hz, is equivalent to the twice of original refreshing frequency, can also guarantee that pixel electrode has the sufficiently long duration of charging, make the picture response time long enough of display device, guarantee image quality.
The present embodiment only need to can reduce the duration of charging of 3D display device to the gate charges of half pixel cell in an image frame, can guarantee the duration of charging of pixel electrode when improving the display device refreshing frequency, realizes that 3D shows.In addition, when the odd-numbered line pixel cell carried out picture disply, the even number line pixel cell was shown as black, can alleviate the crosstalk phenomenon that 3D shows.
Embodiment two
When the refreshing frequency of display device is 60Hz, suppose to be provided with on array base palte 1126 row pixel cells, line by line under driven sweep, the opening time of every row pixel cell is 1/(1126*60) s, be about 14.8us, in order to realize that 3D shows, the refreshing frequency of display device need to be brought up to 120Hz, the duration of charging of pixel electrode will reduce like this, in order to guarantee the charge rate of pixel electrode, in prior art, the live width that often needs to increase the array base palte upper conductor can reduce the transmitance of display device like this to reduce the load of display device; And the response time of the display device of high refreshing frequency is not enough, makes image quality relatively poor.
For fear of the problems referred to above, the present embodiment provides a kind of array base palte, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, the gate line of the capable pixel cell of corresponding 2k receives the grid sweep signal according to preset time period, and wherein, k is not less than 1 natural number that is not more than n.
Further, in the present embodiment, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line receive successively the grid sweep signal in described preset time period; Corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line do not receive the grid sweep signal in described preset time period.
Further, in the present embodiment, the time span of described preset time period is 1/120s.
The present embodiment also provides a kind of 3D display device, comprises array base palte as above and driving circuit, and as shown in Figure 2, described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k.
Display device described in the present embodiment can be the display device such as liquid crystal display, LCD TV, OLED display, OLED TV, Electronic Paper, mobile phone or panel computer.
The driving method of above-mentioned 3D display device comprises:
Gate line to the capable pixel cell of described 2k in described preset time period sends the gated sweep signal.
Particularly, in the change-over switch by active shutter glasses, when providing picture for beholder's left eye, gate driver circuit successively to the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line send the gated sweep signal, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line receive successively the grid sweep signal, realize the left eye picture disply; Gate driver circuit not to the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line send the gated sweep signal, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line do not receive the grid sweep signal, namely the pixel cell of odd-numbered line is shown as black.
Equally, in the change-over switch by active shutter glasses, when providing picture for beholder's right eye, gate driver circuit successively to the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line send the gated sweep signal, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line receive successively the grid sweep signal, realize the right eye picture disply; Gate driver circuit not to the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line send the gated sweep signal, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line do not receive the grid sweep signal, namely the pixel cell of odd-numbered line is shown as black.
In sum, in the process that the 3D of the present embodiment display device shows, gate driver circuit does not send the gated sweep signal all the time to the gate line of odd-numbered line pixel cell, and the odd-numbered line pixel cell is shown as black all the time.Simultaneously in said process, the data drive circuit of array base palte normally provides data-signal for the data line of pixel cell, but when the gate line of pixel cell does not receive the gated sweep signal, the thin film transistor (TFT) of pixel cell can not be opened, pixel cell will can not carry out picture disply, be shown as black.
By such scheme, the 3D display device can refresh picture 120 times in 1s, makes the refreshing frequency of 3D display device reach 120Hz.If be provided with 1126 row pixel cells on array base palte, line by line under driven sweep, the opening time of every row pixel cell is (1/120)/(1126/2) s, is about 14.8us, can find out, in order to realize that 3D shows, although the refreshing frequency of the 3D display device of the present embodiment has been brought up to 120Hz, is equivalent to the twice of original refreshing frequency, can also guarantee that pixel electrode has the sufficiently long duration of charging, make the picture response time long enough of display device, guarantee image quality.
The present embodiment only need to can reduce the duration of charging of 3D display device to the gate charges of half pixel cell in an image frame, can guarantee the duration of charging of pixel electrode when improving the display device refreshing frequency, realizes that 3D shows.In addition, when the even number line pixel cell carried out picture disply, the odd-numbered line pixel cell was shown as black, can alleviate the crosstalk phenomenon that 3D shows.
The above is preferred implementation of the present utility model; should be understood that; for those skilled in the art; under the prerequisite that does not break away from principle described in the utility model; can also make some improvements and modifications, these improvements and modifications also should be considered as protection domain of the present utility model.
Claims (10)
1. array base palte, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, it is characterized in that, the gate line of the capable pixel cell of corresponding 2k-1 receives the grid sweep signal according to preset time period, and wherein, k is not less than 1 natural number that is not more than n.
2. array base palte according to claim 1, is characterized in that, corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line receive successively the grid sweep signal in described preset time period; Corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line do not receive the grid sweep signal in described preset time period.
3. array base palte according to claim 1, is characterized in that, the time span of described preset time period is 1/120s.
4. a 3D display device, is characterized in that, comprises array base palte as described in any one in claim 1-3 and driving circuit, and described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k-1.
5. 3D display device as claimed in claim 4, is characterized in that, described 3D display device is liquid crystal display or OLED display.
6. array base palte, comprise substrate, be formed at the capable pixel cell of 2n on described substrate with matrix form, described array base palte also comprises the gate line of corresponding every row pixel cell, the grid of the thin film transistor (TFT) in every gate line and corresponding pixel cell is connected, it is characterized in that, the gate line of the capable pixel cell of corresponding 2k receives the grid sweep signal according to preset time period, and wherein, k is not less than 1 natural number that is not more than n.
7. array base palte according to claim 6, is characterized in that, corresponding the 2nd row, the 4th row ..., 2k is capable ..., the capable pixel cell of 2n gate line receive successively the grid sweep signal in described preset time period; Corresponding the 1st row, the 3rd row ..., 2k-1 is capable ..., the capable pixel cell of 2n-1 gate line do not receive the grid sweep signal in described preset time period.
8. array base palte according to claim 6, is characterized in that, the time span of described preset time period is 1/120s.
9. a 3D display device, is characterized in that, comprises array base palte as described in any one in claim 6-8 and driving circuit, and described driving circuit comprises:
Gate driver circuit is used for providing the gated sweep signal in described preset time period for the gate line of the capable pixel cell of described 2k.
10. 3D display device as claimed in claim 9, is characterized in that, described 3D display device is liquid crystal display or OLED display.
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| CN2012206787159U CN202975545U (en) | 2012-12-10 | 2012-12-10 | Array substrate and three-dimensional (3D) display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102981338A (en) * | 2012-12-10 | 2013-03-20 | 京东方科技集团股份有限公司 | Array substrate, and 3D display device and drive method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102981338A (en) * | 2012-12-10 | 2013-03-20 | 京东方科技集团股份有限公司 | Array substrate, and 3D display device and drive method thereof |
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