CN202975198U - Relay protection digital dynamic simulation test system - Google Patents
Relay protection digital dynamic simulation test system Download PDFInfo
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- CN202975198U CN202975198U CN 201220657487 CN201220657487U CN202975198U CN 202975198 U CN202975198 U CN 202975198U CN 201220657487 CN201220657487 CN 201220657487 CN 201220657487 U CN201220657487 U CN 201220657487U CN 202975198 U CN202975198 U CN 202975198U
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- 238000005094 computer simulation Methods 0.000 title claims abstract description 15
- 238000012360 testing method Methods 0.000 title abstract description 12
- 238000002474 experimental method Methods 0.000 claims description 10
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- 239000000835 fiber Substances 0.000 claims description 6
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- 230000003287 optical effect Effects 0.000 claims description 6
- 239000013307 optical fiber Substances 0.000 claims description 6
- 238000004891 communication Methods 0.000 abstract description 4
- 238000004088 simulation Methods 0.000 abstract description 4
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Abstract
The utility model relates to a relay protection digital dynamic simulation test system. The relay protection digital dynamic simulation test system comprises protection equipment to be tested and a real-time digital simulator, the relay protection digital dynamic simulation test system is characterized by further comprising a data interface, a host machine and a debugging host machine, wherein the data interface is respectively connected with the protection equipment to be tested, the real-time digital simulator, the host machine and the debugging host machine. The relay protection digital dynamic simulation test system realizes establishment of a primary electric power equipment simulation model used for testing digital relay protection devices of various types, realizes simulation of a primary fault and communication message abnormity of various electrical networks and completes closed loop tests of the real-time digital simulator (RTDS) and the digital relay protection devices.
Description
Technical field
The utility model belongs to substation data analogue means field, in particular a kind of relay protection digital dynamic simulation experiment system.
Background technology
In recent years, take electronic mutual inductor as the basis, begun to be applied to electric system based on the digital transformer substation of IEC61850 standard.In digital transformer substation; the input signal of relay protection and other secondary device is no longer traditional analog signals; but then the digital quantity signal that utilizes electronic mutual inductor and merge cells directly to obtain is sent to the secondary devices such as relay protection by Ethernet switch.
For the reliability that guarantees that the digital intelligent secondary device is used in digital transformer substation, the test job of carrying out the digital transformer substation smart machine is very important.But due to the variation of data channel, existing relay protection test platform (as RTDS) can not have been carried out the protective relaying device verification test work based on the IEC61850 standard.Therefore; need to design and develop the protocol conversion device that meets the optional network specific digit interface to guarantee that data can be at the RTDS(Real Time Digital Simulator) exchange between analogue system and smart machine, and consist of on this basis relay protection digital dynamic simulation experiment system based on IEC61850.
Summary of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, and a kind of relay protection digital dynamic simulation experiment system is provided.
The utility model solves its technical matters and takes following technical scheme to realize:
A kind of relay protection digital dynamic simulation experiment system; comprise tested protection equipment, Real Time Digital Simulator; innovation of the present utility model is: further include data-interface, host computer and debugging host computer, data-interface is respectively with tested protection equipment, Real Time Digital Simulator, host computer and debug and be connected with host computer.
And, described data-interface includes 5 ethernet modules, micro-control unit, power module, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interfaces, micro-control unit is connected with 5 ethernet modules, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interfaces respectively, and micro-control unit is by ethernet module and host computer, Real Time Digital Simulator and tested protection equipment connection; Be connected with host computer with debugging by debugging interface, complete the download of sheet internal program, power module provides power supply for whole system.
And the concrete model that adopts of described micro-control unit is FPGA EP3C25Q240C8; The concrete model that adopts of chip external memory is SDRAM HY57283220 and SRAM ISSI61LV25616; The concrete model that adopts of storage chip is AT24CXX and 39LCX6; Power module specifically adopts the power supply of AMS1085CM-3.3 type power module, and its output current can reach 3A; The concrete model that adopts of configuring chip is EPCS4; The concrete model that adopts of clock crystal oscillator is 24MHz and 50MHz; Debugging interface specifically adopts JTAG and AS interface.
And described ethernet module has specifically adopted the core controller of W5100 chip as ethernet module, adopts IP113F as fiber optical transceiver, and fiber optical transceiver is connected with the optical fiber port of tested protection equipment by optical fiber port.
Advantage of the present utility model and good effect are:
The utility model system building be used for testing the electric power primary equipment realistic model of various types of digital relay protection devices; realize various electrical network primary faults and the abnormal emulation of communication message, completed the closed loop test of RTDS and digital relay protection device.
Description of drawings
Fig. 1 is one-piece construction connection diagram of the present utility model,
Fig. 2 is ethernet module inner structure connection diagram of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model embodiment is further described:
Embodiment described in the utility model is illustrative, is not determinate, can not be with this embodiment as the restriction to the utility model protection domain.
A kind of relay protection digital dynamic simulation experiment system; as shown in Figure 1; comprise that tested protection equipment, Real Time Digital Simulator (RTDS), innovation of the present utility model are; further include data-interface, host computer and debugging host computer, data-interface is respectively with tested protection equipment, Real Time Digital Simulator, host computer and debug and be connected with host computer.
In concrete enforcement of the present utility model, Real Time Digital Simulator (RTDS) is the electric system Real Time Digital Simulator that Canadian RTDS company produces, and is used for tested protection device emulation and the simulation of fault.
In concrete enforcement of the present utility model, data-interface includes 5 ethernet modules, micro-control unit, power module, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interfaces, micro-control unit is connected with 5 ethernet modules, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interfaces respectively, and micro-control unit is by ethernet module and host computer, Real Time Digital Simulator and tested protection equipment connection; Be connected with host computer with debugging by debugging interface, complete the download of sheet internal program, power module provides power supply for whole system.
In concrete enforcement of the present utility model, the concrete model that adopts of micro-control unit is FPGA EP3C25Q240C8; The concrete model that adopts of chip external memory is SDRAM HY57283220 and SRAM ISSI61LV25616; The concrete model that adopts of storage chip is AT24CXX and 39LCX6; Power module specifically adopts the power supply of AMS1085CM-3.3 type power module, and its output current can reach 3A; The concrete model that adopts of configuring chip is EPCS4; The concrete model that adopts of clock crystal oscillator is 24MHz and 50MHz; Debugging interface specifically adopts JTAG and AS interface.
In concrete enforcement of the present utility model, the debugging interface that micro-control unit downloads has two kinds of JTAG and AS, FPGA itself is stored routine not, but be put in EPCS, reading in execution after powering on, general because EPCS has the life-span, often writing can be short-lived, therefore designed jtag interface and be convenient to debugging, the available AS interface of the errorless rear ability of program debug writes in EPCS.
As shown in Figure 2; in concrete enforcement of the present utility model; ethernet module has specifically adopted the core controller of W5100 chip as ethernet module, adopts IP113F as fiber optical transceiver, and fiber optical transceiver is connected with the optical fiber port of tested protection equipment by optical fiber port.
In concrete enforcement of the present utility model, the model that host computer adopts is model Lenovo R60.
Principle of work of the present utility model is:
Data transformation interface of the present utility model adopts hardware description language Verilog as basic programming language, in conjunction with the macroefficiency module that carries, as development platform, completes the exploitation to process layer devices with Quartus software.Verilog is based on the hardware design thinking, top document with Ethernet file, image data file, organize the message file, send the message file, sequential control file, host computer communication file couple together.Sampling value message sends by ethernet module from RTDS and transfers to FPGA; message will be recombinated according to the setting of host computer in FPGA; the communication failures such as simulation frame losing, incorrect order, quality factor are invalid, afterwards by ethernet module with Packet Generation to tested protection equipment and host computer.GOOSE message and sampling value message principle are similar, and difference is that the GOOSE message transmissions is two-way.The transmission of sampling value message and GOOSE message is all completed at the MAC layer, completes by udp protocol with communicating by letter between host computer.
Claims (4)
1. relay protection digital dynamic simulation experiment system; comprise tested protection equipment, Real Time Digital Simulator; it is characterized in that: further include data-interface, host computer and debugging host computer, data-interface is respectively with tested protection equipment, Real Time Digital Simulator, host computer and debug and be connected with host computer.
2. relay protection digital dynamic simulation experiment system according to claim 1, it is characterized in that: described data-interface includes 5 ethernet modules, micro-control unit, power module, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interface, micro-control unit respectively with 5 ethernet modules, storage chip, chip external memory, crystal oscillator, configuring chip, clock, man-machine interaction and debugging interface connect, micro-control unit is by ethernet module and host computer, Real Time Digital Simulator and tested protection equipment connection, be connected with host computer with debugging by debugging interface, complete the download of sheet internal program, power module provides power supply for whole system.
3. relay protection digital dynamic simulation experiment system according to claim 2 is characterized in that: the concrete model that adopts of described micro-control unit is FPGA EP3C25Q240C8; The concrete model that adopts of chip external memory is SDRAM HY57283220 and SRAM ISSI61LV25616; The concrete model that adopts of storage chip is AT24CXX and 39LCX6; Power module specifically adopts the power supply of AMS1085CM-3.3 type power module, and its output current can reach 3A; The concrete model that adopts of configuring chip is EPCS4; The concrete model that adopts of clock crystal oscillator is 24MHz and 50MHz; Debugging interface specifically adopts JTAG and AS interface.
4. relay protection digital dynamic simulation experiment system according to claim 2; it is characterized in that: described ethernet module has specifically adopted the core controller of W5100 chip as ethernet module; adopt IP113F as fiber optical transceiver, fiber optical transceiver is connected with the optical fiber port of tested protection equipment by optical fiber port.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201220657487 CN202975198U (en) | 2012-12-04 | 2012-12-04 | Relay protection digital dynamic simulation test system |
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| CN 201220657487 CN202975198U (en) | 2012-12-04 | 2012-12-04 | Relay protection digital dynamic simulation test system |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103595581A (en) * | 2013-11-06 | 2014-02-19 | 天津大学 | Failure generating device used for digital protection communication test |
| CN103983878A (en) * | 2014-06-05 | 2014-08-13 | 贵州电力试验研究院 | Relay protection synchronization performance testing system and method based on random discrete time domain |
| CN104569669A (en) * | 2014-12-29 | 2015-04-29 | 国家电网公司 | Relay protection adaptability detection system and method based on moving die wind-solar complementary |
| CN105319453A (en) * | 2014-07-11 | 2016-02-10 | 国家电网公司 | Device and system for testing environmental protection data acquisition instrument |
| CN107340436A (en) * | 2016-04-28 | 2017-11-10 | 中国电力科学研究院 | A kind of intelligent substation relay protection sampled data exception analog detection method |
| CN109507512A (en) * | 2018-12-21 | 2019-03-22 | 南方电网科学研究院有限责任公司 | Relay protection data transmission system and method |
| CN109656146A (en) * | 2018-11-21 | 2019-04-19 | 宁波恒晨电力建设有限公司 | Relay Protection Experiment System based on emulation technology |
-
2012
- 2012-12-04 CN CN 201220657487 patent/CN202975198U/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103595581A (en) * | 2013-11-06 | 2014-02-19 | 天津大学 | Failure generating device used for digital protection communication test |
| CN103983878A (en) * | 2014-06-05 | 2014-08-13 | 贵州电力试验研究院 | Relay protection synchronization performance testing system and method based on random discrete time domain |
| CN103983878B (en) * | 2014-06-05 | 2016-09-14 | 贵州电力试验研究院 | Relay protection net synchronization capability based on Random Discrete time domain test system and method |
| CN105319453A (en) * | 2014-07-11 | 2016-02-10 | 国家电网公司 | Device and system for testing environmental protection data acquisition instrument |
| CN105319453B (en) * | 2014-07-11 | 2018-01-02 | 国家电网公司 | A kind of environment protection digital Acquisition Instrument test device and system |
| CN104569669A (en) * | 2014-12-29 | 2015-04-29 | 国家电网公司 | Relay protection adaptability detection system and method based on moving die wind-solar complementary |
| CN107340436A (en) * | 2016-04-28 | 2017-11-10 | 中国电力科学研究院 | A kind of intelligent substation relay protection sampled data exception analog detection method |
| CN107340436B (en) * | 2016-04-28 | 2020-11-27 | 中国电力科学研究院 | Intelligent substation relay protection sampling data abnormity simulation test method |
| CN109656146A (en) * | 2018-11-21 | 2019-04-19 | 宁波恒晨电力建设有限公司 | Relay Protection Experiment System based on emulation technology |
| CN109507512A (en) * | 2018-12-21 | 2019-03-22 | 南方电网科学研究院有限责任公司 | Relay protection data transmission system and method |
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Granted publication date: 20130605 Termination date: 20191204 |
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| CF01 | Termination of patent right due to non-payment of annual fee |