CN202975156U - Large dynamic intermediate frequency sampling device - Google Patents
Large dynamic intermediate frequency sampling device Download PDFInfo
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- CN202975156U CN202975156U CN 201220718592 CN201220718592U CN202975156U CN 202975156 U CN202975156 U CN 202975156U CN 201220718592 CN201220718592 CN 201220718592 CN 201220718592 U CN201220718592 U CN 201220718592U CN 202975156 U CN202975156 U CN 202975156U
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- intermediate frequency
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- digital conversion
- conversion circuit
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Abstract
The utility model belongs to the field of analog circuits, and particularly relates to a large dynamic intermediate frequency sampling device which comprises a circuit board, a power circuit, a clock source, an intermediate frequency signal input end, an analog-to-digital conversion circuit and an intermediate frequency processing unit, wherein the power circuit, the clock source, the intermediate frequency signal input end, the analog-to-digital conversion circuit and the intermediate frequency processing unit are arranged on the circuit board, the intermediate frequency signal input end is in signal connection with the analog-to-digital conversion circuit, the analog-to-digital conversion circuit is in signal connection with the intermediate frequency processing unit, a digital-to-analog conversion chip is connected to an analog ground, the power circuit is connected to a digital ground, the clock source adopts a constant temperature crystal oscillator, and the frequency accuracy is of a 10<-7> level. The large dynamic intermediate frequency sampling device has the advantages that circuit grounds of the analog-to-digital conversion circuit are isolated, and interference signals of other circuits such as the intermediate frequency processing circuit and the clock circuit in the device can be isolated outward, thereby preventing the sampling dynamic from being reduced by interferences imposed on an analog circuit by the interference signals. The collected dynamic, which reaches 75-80dB, of the analog-to-digital conversion circuit is improved greatly.
Description
Technical field
The utility model belongs to the mimic channel field, is a kind of large dynamic intermediate frequency sampling apparatus concretely.
Background technology
The dynamic low problem of ubiquity in large bandwidth mid frequency acquisition equipment dynamically is difficult to reach 70dB after signal bandwidth is greater than 50MHz at present.This is because working as signal bandwidth reaches the above time-harmonic wave signal of 50MHz, crosstalk signal, mixes in the meeting such as the noise signal of falling signal entering signal bandwidth, thereby makes collection dynamically greatly reduce.
As number of patent application is 01221243, patent name is " high-precision quick digital measurer for high-frequency unknown frequency sine wave vector ", the utility model patent that the applying date is 2001-4-17, its technical scheme is: the utility model is the manufacture that belongs to high-precision quick digital measurer for high-frequency unknown frequency sine wave vector, it is mainly by the high_frequency sine wave input media, the high_frequency sine wave low-converter, high frequency resolution and the low program control local oscillations frescan of making an uproar mutually, intermediate-frequency filter, program control amplification/attenuation device, program control sampling holder, program control A/D converter, high speed digital signal processor and follower form, with down coversion, realize without the information distortion frequency spectrum shift, utilization known interval and non-vanishing 3 in the intermediate frequency one-period can determine the principle of a unknown frequency sine wave curve fully, by high speed numerical processor, the A/D sampled data is carried out to Direct Digital calculating, the high precision fast digital that completes high frequency unknown frequency sine wave vector is measured.Above-mentioned patent is not made improvement for gathering the problem reduced dynamically.
The utility model content
The problem that occurs dynamic reducing in order to overcome existing harvester, propose a kind of large dynamic intermediate frequency sampling apparatus now.
For realizing above-mentioned technique effect, the technical solution of the utility model is as follows:
A kind of large dynamic intermediate frequency sampling apparatus, comprise circuit board and be arranged on power circuit, clock source, signal input end of intermediate frequency, analog to digital conversion circuit and the IF processing unit on circuit board, signal input end of intermediate frequency is connected with the analog to digital conversion circuit signal, analog to digital conversion circuit is connected with the IF processing unit signal, it is characterized in that: described analog-digital chip is connected with in analog, power circuit is connected with digitally, in analog described and digitally between be provided with resistance, described resistance is 0 Europe.Described resistance is at least two.
Described analog-digital chip be a connected copper sheet in analog, described power circuit be digitally a connected copper sheet.
Described clock source adopts constant-temperature crystal oscillator, and its frequency accuracy is 10
-7level.
Described clock source is connected with analog to digital conversion circuit, for it provides change over clock.
Described power circuit is arranged on the edge of large dynamic intermediate frequency sampling apparatus.
The utility model has the advantage of:
1, the utility model is isolated the ground of analog to digital conversion circuit circuit, the undesired signal of other circuit (processing circuitry of intermediate frequency, clock circuit) in device can be isolated in to outside, avoids them to mimic channel, to produce interference and reduce sampling dynamically.The collection of this device analog to digital conversion circuit dynamically obtained larger raising, reached 75 ~ 80dB.
2, the utility model is isolated clock circuit, can avoid the harmonic signal interference simulation circuit of clock circuit after isolation, reduces sampling dynamically.
3, the utility model power circuit, away from analog to digital conversion circuit, affects sampling dynamically thereby reduce to greatest extent it on the interference of mimic channel.
The accompanying drawing explanation
Fig. 1 is the utility model structural representation.
The isolation structure schematic diagram that Fig. 2 is mimic channel and digital circuit.
Fig. 3 is the utility model position of source structural drawing.
In accompanying drawing: circuit board 1, power circuit 2, clock source 3, signal input end of intermediate frequency 4, analog to digital conversion circuit 5, IF processing unit 6, resistance 7, in analog 8, digitally 9.
Embodiment
The utility model is that intermediate-freuqncy signal is carried out the ADC sample conversion and carried out the device of subsequent treatment, the input bandwidth is not less than the intermediate-freuqncy signal of 50MHz, convert digital signal to through the ADC sample circuit, digital signal input IF processing unit 6, can need to carry out the subsequent calculations processing according to practical application afterwards.
Large dynamic intermediate frequency sampling apparatus comprises circuit board 1 and is arranged on power circuit 2, clock source, signal input end of intermediate frequency 4, analog to digital conversion circuit 5 and the IF processing unit 6 on circuit board 1, signal input end of intermediate frequency 4 is connected with analog to digital conversion circuit 5 signals, analog to digital conversion circuit 5 is connected with IF processing unit 6 signals, it is characterized in that: described analog-digital chip is connected with in analog 8, power circuit 2 is connected with digitally 3, described clock source adopts constant-temperature crystal oscillator, and its frequency accuracy is 10
-7level.Described clock source is connected with analog to digital conversion circuit 5, described power circuit 2 is arranged on the edge of large dynamic intermediate frequency sampling apparatus, described analog-digital chip 8 be a connected copper sheet in analog, described power circuit 23 be digitally a connected copper sheet.
The utility model is that intermediate-freuqncy signal is carried out the ADC sample conversion and carried out the device of subsequent treatment, the input bandwidth is not less than the intermediate-freuqncy signal of 50MHz, convert digital signal to through the ADC sample circuit, digital signal input IF processing unit 6, can need to carry out the subsequent calculations processing according to practical application afterwards.
Large dynamic intermediate frequency sampling apparatus comprises circuit board 1 and is arranged on power circuit 2, clock source, signal input end of intermediate frequency 4, analog to digital conversion circuit 5 and the IF processing unit 6 on circuit board 1, signal input end of intermediate frequency 4 is connected with analog to digital conversion circuit 5 signals, analog to digital conversion circuit 5 is connected with IF processing unit 6 signals, it is characterized in that: described analog-digital chip is connected with in analog 8, power circuit 2 is connected with digitally 3, described in analog 8 and digitally between 3, be provided with resistance 7, described resistance 7 resistances are 0 Europe.Described resistance 7 is at least two.Described analog-digital chip 8 be a connected copper sheet in analog, described power circuit 23 be digitally a connected copper sheet.
The utility model is that intermediate-freuqncy signal is carried out the ADC sample conversion and carried out the device of subsequent treatment, the input bandwidth is not less than the intermediate-freuqncy signal of 50MHz, convert digital signal to through the ADC sample circuit, digital signal input IF processing unit 6, can need to carry out the subsequent calculations processing according to practical application afterwards.
By reference to the accompanying drawings the application is introduced, large dynamic intermediate frequency sampling apparatus, comprise circuit board 1 and be arranged on power circuit 2, clock source, signal input end of intermediate frequency 4, analog to digital conversion circuit 5 and the IF processing unit 6 on circuit board 1, signal input end of intermediate frequency 4 is connected with analog to digital conversion circuit 5 signals, analog to digital conversion circuit 5 is connected with IF processing unit 6 signals, power circuit 2 provides various power supplies for whole device, and each unit in assurance device can work.Analog to digital conversion circuit 5 becomes the analog signal conversion of front end input after digital signal to input to IF processing unit 6 to be processed, described analog-digital chip is connected with in analog 8, power circuit 2 is connected with digitally 3,8 and digitally 3 is all the ground level of device in analog, be similar to the negative pole of power supply, for whole device provides the level reference, the ground of conversion chip, processing unit and all devices all will be connected on the ground, described in analog 8 and digitally between 3, be provided with resistance 7, described resistance 7 resistances are 0 Europe.Described resistance 7 is at least two.Described analog-digital chip 8 be a connected copper sheet in analog, described power circuit 23 be digitally a connected copper sheet.
It is complete that the ground level of analog to digital conversion circuit 5 keeps, and on circuit board 1, is a complete copper sheet.In device, the ground level of other circuit is made the copper sheet that another piece is complete, with the copper sheet of analog to digital conversion circuit 5, by two 0 Europe resistance 7, be connected, namely so-called single-point connects---and corresponding is connection in blocks with it, the meaning is that the ground level of analog to digital conversion circuit 5 is not made separately a copper sheet, but the ground level of whole device is made a complete copper sheet.Clock source adopts constant-temperature crystal oscillator, and its frequency accuracy reaches 10
-7level, and it is identical with above-mentioned analog to digital conversion circuit 5 isolation design that clock circuit is also carried out to the isolation design isolation design, and namely ground level carries out the single-point connection.Clock source is connected with analog to digital conversion circuit 5, for it provides change over clock.Power circuit 2 is arranged on the edge of large dynamic intermediate frequency sampling apparatus.
Claims (4)
1. a large dynamic intermediate frequency sampling apparatus, comprise circuit board (1) and be arranged on the power circuit (2) on circuit board (1), clock source, signal input end of intermediate frequency (4), analog to digital conversion circuit (5) and IF processing unit (6), signal input end of intermediate frequency (4) is connected with analog to digital conversion circuit (5) signal, analog to digital conversion circuit (5) is connected with IF processing unit (6) signal, it is characterized in that: described analog-digital chip is connected with in analog (8), power circuit (2) is connected with digitally (3), described clock source adopts constant-temperature crystal oscillator, its frequency accuracy is 10
-7level.
2. large dynamic intermediate frequency sampling apparatus according to claim 1, it is characterized in that: described clock source is connected with analog to digital conversion circuit (5).
3. large dynamic intermediate frequency sampling apparatus according to claim 2, it is characterized in that: described power circuit (2) is arranged on the edge of large dynamic intermediate frequency sampling apparatus.
4. large dynamic intermediate frequency sampling apparatus according to claim 3, it is characterized in that: (8) in analog of described analog-digital chip are a connected copper sheet, digitally (3) of described power circuit (2) are a connected copper sheet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220718592 CN202975156U (en) | 2012-12-24 | 2012-12-24 | Large dynamic intermediate frequency sampling device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220718592 CN202975156U (en) | 2012-12-24 | 2012-12-24 | Large dynamic intermediate frequency sampling device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202975156U true CN202975156U (en) | 2013-06-05 |
Family
ID=48516214
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220718592 Expired - Lifetime CN202975156U (en) | 2012-12-24 | 2012-12-24 | Large dynamic intermediate frequency sampling device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202975156U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103702102A (en) * | 2013-12-31 | 2014-04-02 | 青岛歌尔声学科技有限公司 | Antijamming signal processing circuit and antijamming 3D (three dimensional) spectacles |
-
2012
- 2012-12-24 CN CN 201220718592 patent/CN202975156U/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103702102A (en) * | 2013-12-31 | 2014-04-02 | 青岛歌尔声学科技有限公司 | Antijamming signal processing circuit and antijamming 3D (three dimensional) spectacles |
| CN103702102B (en) * | 2013-12-31 | 2016-03-16 | 青岛歌尔声学科技有限公司 | A kind of jamproof signal processing circuit and a kind of anti-interference 3D glasses |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 611731, No. 2, Xin Cheng Road, hi tech West District, Sichuan, Chengdu Patentee after: SICHUAN SDRISING INFORMATION TECHNOLOGY CO.,LTD. Address before: 611731, No. 2, Xin Cheng Road, hi tech West District, Sichuan, Chengdu Patentee before: SDRISING INFORMATION TECH CO.,LTD. SICHUAN CHINA |
|
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20130605 |