CN202870586U - Single CAN controller hot-redundancy CAN bus system - Google Patents
Single CAN controller hot-redundancy CAN bus system Download PDFInfo
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- CN202870586U CN202870586U CN2012204985297U CN201220498529U CN202870586U CN 202870586 U CN202870586 U CN 202870586U CN 2012204985297 U CN2012204985297 U CN 2012204985297U CN 201220498529 U CN201220498529 U CN 201220498529U CN 202870586 U CN202870586 U CN 202870586U
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Abstract
A single CAN controller hot-redundancy CAN bus system belongs to the CAN bus field. The single CAN controller hot-redundancy CAN bus system comprises two buses and a plurality of CAN node circuits. Each of the CAN node circuit is connected with the two buses simultaneously and comprises a microprocessor, a fault processing unit, a CAN controller, a receiving and arbitration & selection unit, a first isolation transmitting/receiving unit and a second isolation transmitting/receiving unit; the two isolation transmitting/receiving units are respectively connected with one bus and are jointly connected with the receiving and arbitration & selection unit; the receiving and arbitration & selection unit is connected with the CAN controller; the CAN controller is in peripheral connection with the microprocessor or is arranged inside the microprocessor; the CAN controller is also respectively connected with the two isolation transmitting/receiving units simultaneously; the microprocessor is also connected with the fault processing unit; and the fault processing unit is connected with the receiving and arbitration & selection units and the two isolation transmitting/receiving units respectively. The single CAN controller hot-redundancy CAN bus system of the utility model has the advantages of operational simplicity, high reliability in data transmitting and receiving, low hardware cost and greatly simplified difficulty in redundant bus development.
Description
Technical field
The utility model relates to CAN(Controller Area Network, controller local area network) specifically the bus field is the hot redundant CAN bus of a kind of single CAN controller system.
Background technology
The CAN bus has been widely used in auto industry, mechanical industry, farm machinery, textile machine, robot, numerically-controlled machine, medicine equipment, household electrical appliance and sensor field as a kind of fieldbus with international standard.The CAN bus has following characteristics: ⑴ CAN bus is how main working method, on the bus arbitrary node all can be at any time initiatively on the bus other node send data, regardless of the principal and subordinate; ⑵ CAN bus adopts non-destruction arbitration, and less its priority of message identifier is higher, priority high message prior send, priority is low initiatively withdraws from the bus free time such as bus and resends; ⑶ CAN node comes transceiving data by can realize the modes such as point-to-point, point-to-points and broadcasting to message identifier filtering.Although the CAN bus itself has very high reliability, on-the-spot in the Industry Control of a lot of inclement conditions, still happening occasionally disconnection, short circuit appear or occurs the fault such as of short duration communicating interrupt because of electromagnetic interference (EMI) in bus cable.
In order to improve the bus communication system reliability, much control the place and adopted redundant CAN bus: namely lay two independently CAN buses, connect up to avoid to occur simultaneously these faults by different physical locations.A complete CAN Bus Node Circuit comprises a bus transceiver, a bus controller and a microprocessor at least.Thereby, realize that redundant CAN bus generally has 3 kinds of modes:
1) bus transceiver, bus controller and microprocessor are all redundant, namely all dispose two.This mode is equivalent to each CAN bus node complete copy one time, and hardware cost is too high, does not generally consider.
2) bus transceiver and bus controller are redundant, and microprocessor only disposes one.This implementation method is more at present, and still, owing to want polygamy to put bus controller, hardware cost is higher; Software programming is complicated, needs the complete CAN bus communication correlated variables of configuration 2 covers, is a very large expense to the less microprocessor of memory capacity.When particularly two buses are received data simultaneously, how data are merged quite trouble of processing.Therefore, the redundancy scheme that has is with regard to compromise: adopt cold redundancy, namely only allow wherein bus work, switch to another bus again when this bus breaks down.
The utility model content
For the defective that exists in the prior art, the purpose of this utility model is to provide the hot redundant CAN bus of a kind of single CAN controller system, and it is simple to operate, and the transceiving data reliability is high, and hardware cost is low, greatly simplifies the difficulty of exploitation redundant bus.
For reaching above purpose, the hot redundant CAN bus of a kind of single CAN controller of the utility model system, comprise two buses and a plurality of CAN node circuit, each CAN node circuit connects two buses simultaneously, each CAN node circuit comprises microprocessor, fault processing unit, the CAN controller, receive the arbitration selected cell, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, first the isolation Transmit-Receive Unit be connected the isolation Transmit-Receive Unit connect respectively a bus, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit jointly are connected to and receive the arbitration selected cell, receive the arbitration selected cell and connect the CAN controller, CAN controller peripheral hardware be connected to microprocessor or in be placed in microprocessor, connect respectively simultaneously the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, microprocessor also connects fault processing unit, and fault processing unit connects respectively to receive arbitrates selected cell, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit.
On the basis of technique scheme, described reception arbitration selected cell comprises the first univibrator and the second univibrator, the two connects respectively the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, and rest-set flip-flop of the two common connection, rest-set flip-flop connects respectively the first Sheffer stroke gate and the second Sheffer stroke gate, and the first Sheffer stroke gate is connected to first phase inverter; The second Sheffer stroke gate is connected to second phase inverter, the first phase inverter be connected phase inverter common connect one or.
On the basis of technique scheme, described or door connects the CAN controller, the first Sheffer stroke gate be connected Sheffer stroke gate and all connect failure processor.
On the basis of technique scheme, described the first isolation Transmit-Receive Unit comprises interconnective the first isolating device and a CAN transceiver, the second isolation Transmit-Receive Unit comprises interconnective the second isolating device and the 2nd CAN transceiver, and a described CAN transceiver and the 2nd CAN the transceiver respectively bus corresponding with it connect.
On the basis of technique scheme, described the first isolating device connects respectively the first univibrator, the first Sheffer stroke gate; The first isolating device also connects respectively CAN controller and fault processing unit.
On the basis of technique scheme, described the second isolating device connects respectively the second univibrator, the second Sheffer stroke gate; The second isolating device also connects respectively CAN controller and fault processing unit.
On the basis of technique scheme, described the first isolation Transmit-Receive Unit is identical with the second isolation Transmit-Receive Unit.
The beneficial effects of the utility model are:
1. each CAN node circuit only has the redundant architecture of a CAN controller, two isolation Transmit-Receive Unit and dual bus, has guaranteed reliability and the fault-tolerant ability of whole communication system, has reduced hardware cost, has simplified developer's Software for Design.
2. during data receiver, accept data that the arbitration selected cell selects to arrive first as this communication data, then data are sent on two buses simultaneously when externally sending; Article two, bus is simultaneously in running order, is real heat redundancy.
3. when or active passive when any bus appearance was wrong, the bus that breaks down was by automatic shield, and normal bus is worked always, does not have switching time, does not affect reception and the transmission of another bus data.
Description of drawings
Fig. 1 is the hot redundant CAN bus system schematic of the utility model embodiment list CAN controller;
Fig. 2 is the system schematic of each CAN node circuit among Fig. 1;
Fig. 3 is the detailed system synoptic diagram of Fig. 2;
Fig. 4 is the circuit theory diagrams of isolation Transmit-Receive Unit among Fig. 2;
Fig. 5 is CAN controller data processing flow chart among Fig. 2.
Reference numeral:
Microprocessor 1, fault processing unit 2, CAN controller 3 receives arbitration selected cell 4, the first univibrator 41, the second but hear multivibrator 42, rest-set flip-flop 43, the first Sheffer stroke gates 44, the second Sheffer stroke gate 45, the first phase inverters 46, the second phase inverters 47, or door 48, the first isolation Transmit-Receive Units 5, the first isolating devices 51, the one CAN transceiver 52, the second isolation Transmit-Receive Units 6, the second isolating devices 61, the 2nd CAN transceiver 62, the first buses 10, the second buses 20.
Embodiment
Below in conjunction with drawings and Examples the utility model is described in further detail.
As shown in Figure 1, the hot redundant CAN bus of the utility model list CAN controller system comprises two buses and a plurality of CAN node circuit, and each CAN node circuit connects two buses simultaneously, for convenient narration, bus is designated as the first bus 10 and the second bus 20.
As shown in Figure 2, be the system schematic of each CAN node circuit, it comprise a microprocessor 1, fault processing unit 2, CAN controller 3, one receive arbitration selected cell 4 and one first isolation Transmit-Receive Unit 5 and one second isolation Transmit-Receive Unit 6.Described first the isolation Transmit-Receive Unit 5 be connected the isolation Transmit-Receive Unit 6 connect respectively a bus, in the present embodiment, the first isolation Transmit-Receive Unit 5 connects the first bus 10, the second isolation Transmit-Receive Unit 6 connects the second bus 20, the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6 jointly are connected to and receive arbitration selected cell 4, receive arbitration selected cell 4 and connect CAN controller 3, CAN controller 3 peripheral hardwares be connected to microprocessor 1 or in be placed in microprocessor 1, connect respectively simultaneously the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6, microprocessor 1 also connects fault processing unit 2, and fault processing unit 2 connects respectively to receive arbitrates selected cell 4, the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6.The first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6 will be sent to by the data that bus receives and receive arbitration selected cell 4, receive arbitration selected cell 4 data are sent to CAN controller 3, CAN controller 3 imports data into microprocessor 1, fault processing unit 2 receives from the data that receive arbitration selected cell 4 and microprocessor 1, and transmission enables control signal to the first isolation Transmit-Receive Unit 5, the second isolation Transmit-Receive Unit 6 respectively.Wherein, fault processing unit 2 is arranged in microprocessor 1, and 4 control signals are arranged, and comprises that two windings receipts enable control signal and two groups of transmissions enable control signal, in order to realization two groups of bus reiving/transmitting states is controlled, and can realize the processing to bus failure.
As shown in Figure 3, described reception arbitration selected cell 4 comprises the first univibrator 41 and the second univibrator 42, the two connects respectively the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6, and receive its data, and rest-set flip-flop 43 of the two common connection, rest-set flip-flop 43 connects respectively the first Sheffer stroke gate 44 and the second Sheffer stroke gate 45, the first univibrator 41 data communication devices are crossed rest-set flip-flop 43 and are sent into the second Sheffer stroke gate 45, the second univibrators 42 data communication devices and cross rest-set flip-flop 43 and send into the first Sheffer stroke gate 44.The first Sheffer stroke gate 44 is connected to first phase inverter 46; The second Sheffer stroke gate 45 is connected to the second phase inverter 47, the first phase inverters 46 and is connected that phase inverter 47 is common to connect one or 48.Described or door 48 connects CAN controllers 3, the first Sheffer stroke gates 44 and is connected Sheffer stroke gate 45 and all connects failure processor 2, and receives the control signal that enables from failure processor 2.Described the first isolation Transmit-Receive Unit 5 comprises the first continuous isolating device 51 and a CAN transceiver 52, the second isolation Transmit-Receive Unit 6 comprises the second continuous isolating device 61 and the 2nd CAN transceiver 62, a described CAN transceiver 51 connects the first bus 10, the two CAN transceivers 52 and connects bus 8.Described the first isolating device 51 connects respectively the first univibrator 41, the first Sheffer stroke gate 44, and data are sent in the first univibrator 41 and the first Sheffer stroke gate 44; The first isolating device 51 also connects respectively CAN controller 3 and fault processing unit 2, and receives the data from CAN controller 3 and fault processing unit 2.Described the second isolating device 61 connects respectively the second univibrator 42, the second Sheffer stroke gate 45, and data are sent into the second univibrator 42 and the second Sheffer stroke gate 45; The second isolating device 61 also connects respectively CAN controller 3 and fault processing unit 2, and receives the data from CAN controller 3 and fault processing unit 2.
As shown in Figure 3 and Figure 4, the first isolation Transmit-Receive Unit 5 is identical with the second isolation Transmit-Receive Unit 6 in the present embodiment, it all uses model to be the isolating device of ADuM5401, and model is the CAN transceiver of TJA1050CAN, realizes bus and the complete electrical isolation of microprocessor internal circuit with this.Take the first isolation Transmit-Receive Unit 5 as example, wherein isolating device 51 is returned CAN transceiver 52 isolation 5V power supply is provided when the isolation receiving and transmitting signal is provided.Isolating device 51 pin ones connect the 5V power supply identical with the CAN controller, pin two, 5,8 ground connection, and pin 7 is unsettled, and pin one 6 provides the 5V power supply of isolation to 52 power supplies of CAN transceiver, and pin one 0 connects insulating power supply, and pin 9 is the ground of isolation, pin one 5 also connects isolator.The signal that 4 groups of isolation are each side arranged of isolating device 51, wherein pin 3 connects the transmitted signal of CAN controller 52, and pin 4 receives and sends and enables control signal, and pin 6 connects the reception signal of CAN controller 52.The pin 3 of CAN transceiver 52 connects the pin one 6 of isolating device 51, and the pin two of CAN controller 52 connects isolating device 51 pins 9.The pin one of CAN controller 52 connects the pin one 4 of isolating device 51, and the pin 4 of CAN controller 52 connects the pin one 1 of isolating device 51, and the pin 8 of CAN controller 52 connects the pin one 3 of isolating device 51.The pin 6 of CAN controller 52 and pin 7 connect two differential signal lines of bus.Like this, CAN controller 52 is not only kept apart fully with the CAN controller circuitry, and its required power supply also provides by isolating device 51, does not need additional power supply.The pin 8 of CAN controller 52 is used for sending control, when this pin connects high level, the transmission of CAN controller 52 is under an embargo, can not send data to bus, when this bus occurs sending fault, can be by pin 4 input high levels of isolating device 51 be forbidden that this transceiver sends data to bus.
As shown in Figure 3, be the implementation method of the hot redundant CAN bus of the utility model list CAN controller system, comprising:
The data receiver face, microprocessor 1 sends data to the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6 simultaneously by controller 3, and send data to two buses simultaneously, for mistake is positioned, when sending data simultaneously to two buses, artificially receiving cable is shielded selection.Microprocessor 1 is by selecting the control signal that enables of the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6.
Specific implementation is: before sending data, the isolation Transmit-Receive Unit shields first the return signal of the first bus 10, gives the first Sheffer stroke gate 44 input low levels, so that the output of phase inverter 46 is fixed as low level.Like this, or door 48 output just depends on the rreturn value of the second bus 20, and the data conductively-closed that the first bus 10 is returned only has the return data of the second bus to send to CAN controller 3.If after data are sent completely, 20 inerrancies of the second bus produce, and just select shielding the second bus 20 when then send next time, and the reception enable signal of namely giving the second Sheffer stroke gate 45 is for adding low level, check the whether wrong generation in process of transmitting of the first bus 10.So later every secondary data is sent circulation shielding, guarantee in time to find bus error and switch.If produce mistake in the process of transmitting, then the mark respective bus is wrong, and next time is when sending data, and the transmission by fault processing unit 2 enables control signal, closes the sending function of CAN transceiver on the corresponding bus.Be noted that: send in case finish data, reception that will two buses of immediate recovery enables control signal, in order to can receive simultaneously the data of two buses.
As shown in Figure 5, concrete CAN controller data is processed and is comprised the steps:
S1. node initializing arranges various data and interrupts Processing Interface;
S2. judged whether that data send, if enter S3; If not, return and rejudge;
S3. judge whether the bus that sent data last time is wrong, if enter S4; If not, enter S5;
S4. forbid reception and the transmission of this bus, select another bus to send data, enter S6;
S5. forbid the reception of this bus, select another bus to send data, enter S6;
S6. judge whether wrong generation, if enter S7; If not, enter S8;
S7. marked erroneous bus is moved into the sending and receiving of this bus, enters S2;
S8. allowing to be under an embargo receives the receiving function of bus, enters S2.
As shown in Figures 2 and 3, the data receiver aspect, according to the characteristics of CAN bus, data receiver and data send and can not occur simultaneously, therefore send as long as no data, and the reception that fault processing unit 2 just must be opened two passages simultaneously enables.Fault processing unit 2 enables control signal to two receptions for the first isolation Transmit-Receive Unit 5 and the second isolation Transmit-Receive Unit 6 and all sets high level, allows external data to arbitrate selected cell 4 by reception and carries out the selection of receive data.The first univibrator 41 and the second univibrator 42 all adopt 74HC123 in the present embodiment, rest-set flip-flop 43 adopts NAND gate circuit 74HC132 to build, the first Sheffer stroke gate 44 and the second Sheffer stroke gate 45 all adopt 74HC10, the first phase inverter 46 and the second phase inverter 47 all adopt 74HC132 to build, or door 48 adopts 74HC32, each part mentioned above has formed one and has received arbitration selected cell 4, its effect is: receive respectively two bus specified number certificates by the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, and the order that arrives according to the priority of data, the bus that arrives first data obtains right of priority, or the Output rusults of door 48 equals to arrive first the bus data of data, import the data that arrive first into microprocessor, then arrive data or countless bus data conductively-closed according to arriving.
Such as Fig. 2, Fig. 3 and shown in Figure 4, by a specific embodiment principle of the present utility model is described.According to the agreement regulation of CAN bus, it is recessive that bus is when idle, and reaction is high level at the reception pin of a CAN transceiver 52 and the 2nd CAN transceiver 62.When on the CAN bus data transmission being arranged, first of transmission is start of frame bits, and this position is dominant, and reaction is low levels at the reception pin of a CAN transceiver 52 and the 2nd CAN transceiver 62.Because the physical characteristicss such as the device property of two CAN buses, cable length can be not just the same, the data that cause a CAN transceiver 52 and the 2nd CAN transceiver 62 to be received can not arrive definitely simultaneously, must have successively.Suppose that a CAN transceiver 52 receives first data, then the input of the first univibrator 41 produces a negative edge, and it will export the high level of a period of time.Because 12 at the maximum intervals of CAN bus data just have the level upset, bus data can constantly trigger univibrator output high level, and therefore, the time constant of the first univibrator 41 gets final product about 0.1ms.Simultaneously, 42 inputs of the second univibrator remain high level, and its output is still low level.So the output of rest-set flip-flop 43 is just had any different, its output low level is given the second Sheffer stroke gate 45, and the high level of output is given the first Sheffer stroke gate 44.The output of the first Sheffer stroke gate 44 is exactly the anti-phase of the first bus 10 input values, and by behind the first phase inverter 46, its value has just become the bus input value again.Meanwhile, 1 tunnel of the second Sheffer stroke gate 45 is input as low level, and then its input is just irrelevant with the input value of the second bus 20, but fixing high level, behind the second phase inverter 47, its value is fixed as low level.Like this, at last by or door 48 and the data that enter CAN controller 3, be exactly the data of receiving first the first bus 10 of data, the data of the second bus 20 of then receiving data are with regard to conductively-closed.After the data of the 2nd CAN transceiver 62 arrived, the input of the first Sheffer stroke gate 44 also was high level, and according to the characteristics of rest-set flip-flop, it is constant that original state is kept in the output of rest-set flip-flop 43.Countless according to when transmitting-receiving when bus, the output of the first univibrator 41 and the second univibrator 42 can return to low level.When having new data to arrive, the data of the first bus 10 and the second bus 20 re-start arbitration and select, and principle as mentioned above.
The utility model is not limited to above-mentioned embodiment; for those skilled in the art; under the prerequisite that does not break away from the utility model principle, can also make some improvements and modifications, these improvements and modifications also are considered as within the protection domain of the present utility model.The content that is not described in detail in this instructions belongs to the known prior art of this area professional and technical personnel.
Claims (7)
1. the hot redundant CAN bus of single CAN controller system, comprise two buses and a plurality of CAN node circuit, each CAN node circuit connects two buses simultaneously, it is characterized in that: each CAN node circuit comprises microprocessor, fault processing unit, the CAN controller, receive the arbitration selected cell, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, first the isolation Transmit-Receive Unit be connected the isolation Transmit-Receive Unit connect respectively a bus, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit jointly are connected to and receive the arbitration selected cell, receive the arbitration selected cell and connect the CAN controller, CAN controller peripheral hardware be connected to microprocessor or in be placed in microprocessor, connect respectively simultaneously the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, microprocessor also connects fault processing unit, and fault processing unit connects respectively to receive arbitrates selected cell, the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit.
2. the hot redundant CAN bus of single CAN controller as claimed in claim 1 system, it is characterized in that: described reception arbitration selected cell comprises the first univibrator and the second univibrator, the two connects respectively the first isolation Transmit-Receive Unit and the second isolation Transmit-Receive Unit, and rest-set flip-flop of the two common connection, rest-set flip-flop connects respectively the first Sheffer stroke gate and the second Sheffer stroke gate, and the first Sheffer stroke gate is connected to first phase inverter; The second Sheffer stroke gate is connected to second phase inverter, the first phase inverter be connected phase inverter common connect one or.
3. the hot redundant CAN bus of single CAN controller as claimed in claim 2 system is characterized in that: described or door connects the CAN controller, the first Sheffer stroke gate be connected Sheffer stroke gate and all connect failure processor.
4. the hot redundant CAN bus of single CAN controller as claimed in claim 3 system, it is characterized in that: described the first isolation Transmit-Receive Unit comprises interconnective the first isolating device and a CAN transceiver, the second isolation Transmit-Receive Unit comprises interconnective the second isolating device and the 2nd CAN transceiver, and a described CAN transceiver and the 2nd CAN the transceiver respectively bus corresponding with it connect.
5. the hot redundant CAN bus of single CAN controller as claimed in claim 4 system, it is characterized in that: described the first isolating device connects respectively the first univibrator, the first Sheffer stroke gate; The first isolating device also connects respectively CAN controller and fault processing unit.
6. the hot redundant CAN bus of single CAN controller as claimed in claim 4 system, it is characterized in that: described the second isolating device connects respectively the second univibrator, the second Sheffer stroke gate; The second isolating device also connects respectively CAN controller and fault processing unit.
7. the hot redundant CAN bus of single CAN controller as claimed in claim 1 system is characterized in that: described the first isolation Transmit-Receive Unit is identical with the second isolation Transmit-Receive Unit.
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| CN2012204985297U CN202870586U (en) | 2012-09-27 | 2012-09-27 | Single CAN controller hot-redundancy CAN bus system |
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| CN2012204985297U CN202870586U (en) | 2012-09-27 | 2012-09-27 | Single CAN controller hot-redundancy CAN bus system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104363156A (en) * | 2014-10-31 | 2015-02-18 | 北奔重型汽车集团有限公司 | Dual-redundancy network topology structure and method |
| CN104816635A (en) * | 2015-04-20 | 2015-08-05 | 上海电机学院 | Automobile dashboard and implementation method thereof |
| CN106330640A (en) * | 2016-08-17 | 2017-01-11 | 中国航空工业集团公司西安飞行自动控制研究所 | Data cross transmission method based on CAN bus |
-
2012
- 2012-09-27 CN CN2012204985297U patent/CN202870586U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104363156A (en) * | 2014-10-31 | 2015-02-18 | 北奔重型汽车集团有限公司 | Dual-redundancy network topology structure and method |
| CN104363156B (en) * | 2014-10-31 | 2017-12-01 | 北奔重型汽车集团有限公司 | A kind of dual redundant network topological method |
| CN104816635A (en) * | 2015-04-20 | 2015-08-05 | 上海电机学院 | Automobile dashboard and implementation method thereof |
| CN106330640A (en) * | 2016-08-17 | 2017-01-11 | 中国航空工业集团公司西安飞行自动控制研究所 | Data cross transmission method based on CAN bus |
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Granted publication date: 20130410 Termination date: 20210927 |