CN202840952U - Control circuit and switching converter - Google Patents
Control circuit and switching converter Download PDFInfo
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- CN202840952U CN202840952U CN2012205032876U CN201220503287U CN202840952U CN 202840952 U CN202840952 U CN 202840952U CN 2012205032876 U CN2012205032876 U CN 2012205032876U CN 201220503287 U CN201220503287 U CN 201220503287U CN 202840952 U CN202840952 U CN 202840952U
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Abstract
The utility model discloses a control circuit and switch converter, wherein the switch converter includes first switch tube, switching on and turn-off of the first switch tube of control circuit control, when power saving mode control signal is in the active state, the change over switch converter work in power saving mode, increases the on-time of first switch tube to improve the efficiency of switch converter under power saving mode.
Description
Technical field
The utility model relates generally to a kind of electronic circuit, relates in particular to a kind of control circuit for switch converters.
Background technology
Be accompanied by the development of electronic technology, mobile phone, personal digital assistant (PDA), panel computer, net book, super electronic equipments such as (Ultrabook) are popularized rapidly.Super, mobile phone etc. similarly electronic equipment need to have always online, the function (always on and always connected, AOAC) that connects at any time, namely idle function.Prolong as much as possible the standby time that electronic equipment prolongs electronic equipment in other words as much as possible in the lower time that can keep of AOAC pattern and become one of important indicator of design of electronic devices.The power of electronic equipment under AOAC or standby (standby) pattern is less, is in light condition, and therefore, the electric energy service efficiency during underloading is most important.
Constant on-time control is widely used in super and waits in the electronic equipment because its superior load transient response, simple internal structure and level and smooth mode of operation are switched.In the control of traditional constant on-time, the ON time TON of switch converters determines by input voltage VIN and output voltage VO, and irrelevant with the size of load.In order to realize faster load transient response speed, reduce volume and weight, usually need higher switching frequency Fsw.Take decompression transducer as example, when input voltage VIN is 10V, output voltage VO is 1V, and when switching frequency Fsw was 1MHz, the ON time TON of switch converters was 100ns under underloading or heavy condition.Yet under light condition, driving loss and switching loss becomes the leading factor that affects efficient, and therefore higher switching frequency Fsw is unfavorable for improving the efficient under the light condition.
The utility model content
The utility model provides a kind of control circuit and switch converters for solving above-mentioned one or more technical problem, when improving the light-load efficiency of converter, guarantees superior dynamic response performance.
A kind of control circuit according to the utility model one embodiment, be used for switch converters, wherein switch converters comprises the first switching tube, control circuit is controlled conducting and the shutoff of the first switching tube, described control circuit comprises: the first comparison circuit, have in-phase input end, inverting input and output, and wherein in-phase input end receives reference voltage, the feedback signal of inverting input receiving key converter output voltage, output output asserts signal; The ON time control circuit, the input voltage of receiving key converter, output voltage and battery saving mode control signal, and output ON time control signal, wherein the ON time control signal ON time of controlling the first switching tube reduces with the increase of switch converters input voltage, and increases with the increase of switch converters output voltage; And logic control circuit, receive asserts signal and ON time control signal, and output switch control signal is controlled conducting and the shutoff of the first switching tube; Wherein working as the battery saving mode control signal is effective status, control circuit diverter switch converter works in battery saving mode, increase the ON time of the first switching tube, when the battery saving mode control signal is disarmed state, control circuit diverter switch converter works in normal mode of operation.
In one embodiment, the ON time control signal is controlled the ON time of the first switching tube under battery saving mode greater than the ON time under normal mode of operation.
In one embodiment, the ON time control circuit comprises: current source has first end and the second end, wherein the input voltage of first end receiving key converter, the second end output charging current signal, the input voltage of charging current signal and switch converters is directly proportional; The first capacitor has first end and the second end, and wherein first end is coupled to the second end of current source, and the second end is coupled to systematically; The first control switch pipe has first end, the second end and control end, and wherein first end is coupled to the first end of the first capacitor, and the second end is coupled to the second end of the first capacitor, control end receiving key control signal; And second comparison circuit, have in-phase input end, inverting input and output, wherein in-phase input end is coupled to the first end of the first capacitor, the output voltage of inverting input receiving key converter, output output ON time control signal; Wherein when the battery saving mode control signal was in effective status, by the charging current signal that reduces current source output or the capacitance that increases the first capacitor, the ON time that the ON time control signal is controlled the first switching tube increased.
In one embodiment, current source comprises: the first resistor, have first end and the second end, and wherein first end is coupled to the input of switch converters; And current mirror, have input and output, wherein input is coupled to the second termination receipts input current signal of the first resistor, and the first end that output is coupled to the first capacitor provides the charging current signal; Wherein when the battery saving mode control signal is in effective status, increases the resistance value of the first resistor or reduce the charging current signal of current mirror output and the ratio of input current signal.
In one embodiment, described control circuit also comprises the load condition testing circuit, described load condition testing circuit produces the battery saving mode control signal by load current and the reference current signal that compares switch converters, perhaps by relatively switch periods and reference cycle signal produce the battery saving mode control signal; Wherein when load current less than reference current signal or switch periods less than reference cycle during signal, export effective battery saving mode control signal, when load current greater than reference current signal or switch periods greater than reference cycle during signal, export invalid battery saving mode control signal.
In one embodiment, the ON time control circuit comprises: the ON time generative circuit, have first input end, the second input, the 3rd input and output, wherein first input end is coupled to the input of receiving key converter, the second input is coupled to the output of switch converters, the 3rd input receives the battery saving mode control signal, output output ON time signal; Timing circuit has input and output, and wherein input is coupled to the output reception asserts signal of the first comparison circuit, output output timing time, and wherein when asserts signal was effective, timing circuit began timing; And comparison circuit, have in-phase input end, inverting input and output, wherein in-phase input end is coupled to the output of timing circuit to receive timing time, inverting input is coupled to the output of ON time generative circuit to receive the ON time signal, and output provides the ON time control signal; Wherein the ON time signal under the battery saving mode is greater than the ON time signal under the normal mode of operation.
According to a kind of switch converters of the utility model one embodiment, this switch converters comprises foregoing control circuit and the first switching tube.
In one embodiment, described the first switching tube has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the output of control circuit.
In one embodiment, described switch converters also comprises: the second switch pipe, have first end, the second end and control end, and wherein first end is coupled to the second end of a switching tube, and the second end is coupled to systematically, and control end is coupled to the output of control circuit; Inductor has first end and the second end, and wherein first end is coupled to the second end of the first switching tube and the first end of second switch pipe; And output capacitor, be electrically coupled with the second end of inductor and systematically between.
By adopting the technical scheme that proposes according to the utility model thought, when switch converters is in light condition and work in the situation of battery saving mode, increase the ON time of the first switching tube, can improve the switching frequency of switch converters under battery saving mode, improve the service efficiency of electric energy, and can guarantee simultaneously that switch converters can have preferably dynamic response performance under normal mode of operation.
Description of drawings
By reading with reference to the accompanying drawings detailed description hereinafter, above-mentioned and other purposes of the utility model execution mode, the feature and advantage easy to understand that will become.In the accompanying drawings, show some embodiments possible of the present utility model in exemplary and nonrestrictive mode, wherein:
Fig. 1 is the circuit block diagram according to the switch converters 100 of the utility model one embodiment;
Fig. 2 is the circuit theory diagrams according to the switch converters 200 of the utility model one embodiment;
Fig. 3 is the circuit theory diagrams according to the ON time control circuit 300 of the utility model one embodiment;
Fig. 4 is the circuit theory diagrams according to the ON time control circuit 400 of another embodiment of the utility model;
Fig. 5 is the circuit theory diagrams according to the ON time control circuit 500 of the another embodiment of the utility model;
Fig. 6 is the circuit theory diagrams according to the ON time control circuit 600 of the another embodiment of the utility model;
In the accompanying drawings, identical or corresponding label is used to represent identical or corresponding element.
Embodiment
The below will describe specific embodiment of the utility model in detail, should be noted that the embodiments described herein only is used for illustrating, and be not limited to the utility model.In the following description, in order to provide thorough understanding of the present utility model, a large amount of specific detail have been set forth.Yet, it is evident that for those of ordinary skills: needn't adopt these specific detail to carry out the utility model.In other examples, for fear of obscuring the utility model, do not specifically describe known circuit, material or method.
In whole specification, " embodiment ", " embodiment ", " example " or mentioning of " example " are meaned: special characteristic, structure or characteristic in conjunction with this embodiment or example description are comprised among at least one embodiment of the utility model.Therefore, phrase " in one embodiment ", " in an embodiment ", " example " or " example " that occurs in each place of whole specification differs to establish a capital and refers to same embodiment or example.In addition, can with any suitable combination and or sub-portfolio with specific feature, structure or property combination in one or more embodiment or example.In addition, it should be understood by one skilled in the art that at this diagram that provides all be for illustrative purposes, and diagram is drawn in proportion not necessarily.Should be appreciated that when claiming " element " " to be connected to " or " coupling " during to another element it can be directly to connect or be couple to another element or can have intermediary element.On the contrary, when claiming element " to be directly connected to " or during " being directly coupled to " another element, not having intermediary element.The identical identical element of Reference numeral indication.Term used herein " and/or " comprise any and all combinations of one or more relevant projects of listing.
Fig. 1 is the circuit block diagram according to the switch converters 100 of the utility model one embodiment.Switch converters 100 comprises power stage circuit 11, control circuit 12 and feedback circuit 13.
The in-phase input end of comparison circuit 121 receives reference voltage VREF, and inverting input receives the feedback signal VFB of reflection output voltage VO, and output is according to comparative result output asserts signal SET.As feedback signal VFB during less than reference voltage VREF, comparison circuit 121 output effective asserts signal SET, for example SET=" 1 ".As feedback signal VFB during greater than reference voltage VREF, the invalid asserts signal SET of comparison circuit 121 outputs, for example SET=" 0 ".
ON time control circuit 122 receives input voltage VIN, threshold signal VTH and battery saving mode control signal FLAG, and output ON time control signal TON.In one embodiment, threshold signal VTH for example can be output voltage VO.In other embodiments, threshold signal VTH also can be the level value of fixing.In one embodiment, ON time ton1 and input voltage VIN that ON time control signal TON controls the first switching tube are inversely proportional to, and are directly proportional with output voltage VO, and namely the ON time ton1 of the first switching tube is determined by following formula:
ton1＝K*VO/VIN (1)
Wherein, the coefficient of K for regulating according to the state of battery saving mode control signal FLAG.
In one embodiment, FLAG is in effective status when the battery saving mode control signal, FLAG=" 1 " for example, and COEFFICIENT K equals constant M, and the ON time ton1_standby of the first switching tube under battery saving mode equals:
ton1_standby＝M*VO/VIN (2)
FLAG is in disarmed state when the battery saving mode control signal, FLAG=" 0 " for example, and system K equals constant N, and constant M is greater than constant N, and for example constant M can equal the constant N of twice.The ON time ton1_normal of the first switching tube under normal mode of operation equals:
tonl_normal＝N*VO/VIN (3)
By mentioned earlier, constant M is greater than constant N, thereby the ON time tonl_standby of switch converters 100 under battery saving mode is greater than the ON time ton1_normal under normal mode of operation.ON time ton1_normal under the normal mode of operation for example can be arranged so that the switching frequency of the first switching tube 100 is higher, for example equals 1MHz, to satisfy the requirement of high frequency, realizes fast load transient response.Larger ON time ton1_standby under the battery saving mode then can reduce switching frequency, reduces to drive loss and switching loss, thereby improves the efficient of switch converters 100 under battery saving mode.
Battery saving mode control signal FLAG for example also can be by sending as unit such as the central processing unit (Central Processing Unit, CPU) of load, microprogram control units (Micro programmed Control Unit, MCU).Wait electronic equipment as example take super, be operated in the underloading mode of operation such as AOAC pattern or standby mode lower time when super, super CPU sends instruction and is connected to switch converters 100 as battery saving mode control signal FLAG, and indicator cock converter 100 need to be operated in battery saving mode.Battery saving mode control signal FLAG also can be produced by switch converters 100.In one embodiment, control circuit 12 comprises load condition testing circuit 124, the circuit parameter that load condition testing circuit 124 is correlated with by sense switch converter 100, the operating state of judgement switch converters 100, output battery saving mode control signal FLAG.In one embodiment, load condition testing circuit 124 compares to produce battery saving mode control signal FLAG according to load current and the reference current signal of switch converters 100.When load current during less than reference current signal, switch converters 100 is in light condition, exports effective battery saving mode control signal FLAG control switch converter 100 and switches to battery saving mode, increases the ON time of the first switching tube; When load current during greater than reference current signal, switch converters 100 is in non-light condition, exports invalid battery saving mode control signal FLAG control switch converter 100 and switches to normal mode of operation, reduces the ON time of the first switching tube.In another embodiment, load condition testing circuit 124 compares to produce battery saving mode control signal FLAG according to switch periods and the reference cycle signal of switch converters 100.When the switch periods of switch converters 100 less than reference cycle during signal, switch converters 100 is in light condition, exports effective battery saving mode control signal FLAG, increases the ON time of the first switching tube; When the switch periods of switch converters 100 greater than reference cycle during signal, switch converters 100 is in non-light condition, exports invalid battery saving mode control signal FLAG, reduces the ON time of the first switching tube.
The output voltage VO of feedback circuit 13 sampling switch converters 100 produces the feedback signal VFB corresponding with the output voltage VO of switch converters 100.Those of ordinary skill in the art should be realized that feedback circuit 13 for example can be resistor voltage divider circuit, capacitance partial pressure circuit or other sample circuit that is fit to arbitrarily.
Fig. 2 is the circuit diagram according to the switch converters 200 of the utility model one embodiment.Switch converters 200 has adopted the synchronous buck transformation topology, comprises switching tube M1, M2, inductor L and capacitor CO.Switch converters 200 is converted to output voltage VO by conducting and the shutoff of switching tube M1 and M2 with input voltage VIN.The termination of switching tube M1 is received input voltage VIN, and the other end is electrically coupled to the end of switching tube M2.The other end welding system ground of switching tube M2.The end of inductor L is electrically coupled to the public connecting end of switching tube M1 and M2, and capacitor CO electric coupling is at the other end of inductor L with systematically.The voltage at capacitor CO two ends is output voltage VO.Those of ordinary skills should be realized that switch converters 200 can adopt any DC-DC or ac/dc transformation topology structure, for example synchronous or asynchronously boost, buck converter, and normal shock, anti exciting converter etc.Switching tube M1, M2 can be any controllable semiconductor switch device, such as mos field effect transistor (MOSFET), igbt (IGBT) etc.
In embodiment illustrated in fig. 2, load 21 be coupled to the output of switch converters and systematically between, and provide battery saving mode control signal FLAG.Load 21 is such as being the intelligent cells such as CPU, MCU, ARM.Load 21 is such as exporting effective battery saving mode control signal FLAG under the underloading patterns such as AOAC or standby, control switch converter 200 is operated in battery saving mode.
Switch converters 200 also comprises feedback circuit 22, comparison circuit 23, ON time control circuit 24 and trigger 25.
In embodiment illustrated in fig. 2, feedback circuit 22 is resistor voltage divider circuit, comprise resistor R1 and resistor R2, wherein the end of resistor R1 is coupled to the output of switch converters 200, the other end of resistor R1 is coupled to the end of resistor R2, and output feedback signal VFB, the other end of resistor R2 is coupled to systematically.The in-phase input end of comparison circuit 23 receives reference signal VREF, inverting input receiving feedback signals VFB.Comparison circuit 23 is exported asserts signal SET according to the comparative result of reference signal VREF and feedback signal VFB at output.Reference signal VREF for example can be constant, also can be adjustable.In one embodiment, reference signal VREF is exported by digital to analog converter (DAC).In one embodiment, reference signal VREF can be coupled to together with compensating signal the in-phase input end of comparison circuit 23.In another embodiment, feedback signal VFB can be coupled to together with compensating signal the inverting input of comparison circuit 23.
ON time control circuit 24 receives input voltage VIN, output voltage VO, battery saving mode control signal FLAG and switch controlling signal CTRL, and output ON time control signal TON.In embodiment as shown in Figure 2, ON time control circuit 24 comprises current source IS1, capacitor C1, control switch pipe S1 and comparison circuit 241.
The termination of current source IS1 is received input voltage VIN, and the other end of current source IS1 is coupled to the end output charging current signal of capacitor C1, and the other end of capacitor C1 is coupled to systematically.Current source IS1 exports the charging current signal under the control of input voltage VIN, capacitor C1 is charged.In one embodiment, the size of the charging current signal of current source IS1 output is relevant with input voltage VIN, along with the increase of input voltage VIN or reduce and increase or reduce.In one embodiment, the size of the charging current signal of current source IS1 output is relevant with battery saving mode control signal FLAG.FLAG is in effective status when the battery saving mode control signal, FLAG=" 1 " for example, and switch converters 200 is operated in battery saving mode, increases the ON time of switching tube M1 by the charging current signal that reduces current source IS1 output.For example, when battery saving mode control signal FLAG was in effective status, the electric current of current source IS1 output was 10uA; When battery saving mode control signal FLAG was in disarmed state, the electric current of current source IS1 output was 25uA.In one embodiment, current source IS1 comprises resistor and the current mirror that is in series, wherein an end of resistor is coupled to the input of switch converters 200 to receive input voltage VIN, the other end of resistor is coupled to the input of current mirror, and the output of current mirror is coupled to the end output charging current signal of capacitor C1.FLAG is in effective status when the battery saving mode control signal, FLAG=" 1 " for example, switch converters 200 is operated in battery saving mode, come or reduce the charging current signal of current mirror output among the current source IS1 and the ratio of input current signal reduces the charging current signal of current source IS1 output by the resistance that increases resistor among the current source IS1, thereby increase the ON time of switching tube M1.
The first end of control switch pipe S1 is coupled to the common port of capacitor C1 and current source IS1, and the second end of control switch pipe S1 is coupled to the other end of capacitor C1, and the control end of control switch pipe S1 is by not gate N1 receiving key control signal CTRL.In one embodiment, CTRL is effective when switch controlling signal, and when for example being high level, control switch pipe S1 turn-offs, and capacitor C1 is by current source IS1 charging, and the voltage at capacitor C1 two ends increases gradually; CTRL is invalid when switch controlling signal, when for example being low level, and control switch pipe S1 conducting, capacitor C1 is by control switch pipe S1 discharge, and the voltage at capacitor C1 two ends reduces.In one embodiment, the voltage Vs of the common port of capacitor C1 and current source IS1 has represented the voltage swing at capacitor C1 two ends.In one embodiment, FLAG is in effective status when the battery saving mode control signal, FLAG=" 1 " for example, and switch converters 200 is operated in battery saving mode, increases the ON time of switching tube M1 by the capacitance that increases capacitor C1.For example can come the capacitance of switch capacitor C1 under different mode by switch.In one embodiment, when battery saving mode control signal FLAG was in effective status, the capacitance of capacitor C1 was 20pF; When battery saving mode control signal FLAG was in disarmed state, the capacitance of capacitor C1 was 8pF.
The voltage Vs at the in-phase input end receiving condenser C1 two ends of comparison circuit 241, the inverting input of comparison circuit 241 receives output voltage VO, and according to the voltage Vs at capacitor C1 two ends and the comparative result output ON time control signal TON of output voltage VO.
The reset terminal of trigger 25 is electrically coupled to the output of ON time control circuit 24 to receive ON time control signal TON, the set end of trigger 25 is electrically coupled to the output of comparison circuit 23 to receive asserts signal SET, and the in-phase output end of trigger 25 provides switch controlling signal CTRL.Drive circuit 26 receiving key control signal CTRL, and produce the driving signal with conducting and the shutoff of driving switch pipe M1 and M2.In one embodiment, as the voltage Vs at capacitor C1 two ends during less than output voltage VO, the ON time control signal TON of comparison circuit 241 outputs is in disarmed state, is low level, and trigger 25 is not produced effect; When the voltage Vs at capacitor C1 two ends greater than output voltage VO, the ON time control signal TON of comparison circuit 241 outputs is in effective status, be high level, thereby reset flip-flop 25, the invalid switch controlling signal CTRL of trigger 25 outputs, CTRL=" 0 " for example, thereby on-off switching tube M1.
In one embodiment, FLAG is in effective status when the battery saving mode control signal, FLAG=" 1 " for example, by reducing the charging current signal of current source IS1 output, and/or the electric capacity that increases capacitor C1 reduces the charging rate (namely increasing the charging interval of capacitor C1) of capacitor C1, increase ON time control signal TON and be in the time of disarmed state, thereby increase the ON time of switching tube M1.
Fig. 3 is the circuit theory diagrams according to the ON time control circuit 300 of the utility model one embodiment.
ON time control circuit 300 comprises switching tube 31, MP1, MP2, MN1～MN3, resistor R3, R4, capacitor C2, comparator 33 and not gate 32,34.The termination of resistor R4 is received input voltage VIN, and the other end is coupled to the drain electrode of switching tube MN1 and the grid of switching tube MN1, MN2.The drain electrode of switching tube 31 receives input voltage VIN, and the source electrode of switching tube 31 is coupled to the end of resistor R3, and the other end of resistor R3 is coupled to the drain electrode of switching tube MN1 and the grid of switching tube MN1, MN2.The source electrode welding system ground of switching tube MN1 and MN2.The source electrode of switching tube MP1 and MP2 receives input voltage VIN, and the grid of switching tube MP1 and MP2 is coupled in together and is coupled to the drain electrode of switching tube MP1 and MN2.The drain electrode of switching tube MP2 is coupled to the drain electrode of switching tube MN3 and the end of capacitor C2.The other end welding system ground of the source electrode of switching tube MN3 and capacitor C2.The input receiving key control signal CTRL of not gate 34, output is coupled to the grid of switching tube MN3.The in-phase input end of comparator 33 is coupled to drain electrode and the capacitor C2 of switching tube MN3, and reverse input end receives output voltage VO, and output provides ON time control signal TON.
Switching tube MN1 and MN2 consist of current mirror, and switching tube MP1 and MP2 also consist of current mirror.The ratio of supposing switching tube MN1 and MN2 breadth length ratio is 1: n, the ratio of switching tube MP1 and MP2 breadth length ratio is 1: m, wherein n and m are the constant greater than zero.Then when switching tube 31 conducting, the current value that flows through switching tube MN1 is VIN (R4+R3)/(R4*R3), and the current value that flows through switching tube MP2 is n*m*VIN (R4+R3)/(R4*R3); When switching tube 31 turn-offed, the current value that flows through switching tube MN1 was VIN/R4, and the current value that flows through switching tube MP2 is n*m*V IN/R4.
When battery saving mode control signal FLAG was in effective status, switching tube 31 turn-offed, and the electric current that flows through switching tube MN1 reduces.In embodiment as shown in Figure 3, the grid of switching tube 31 receives battery saving mode control signal FLAG by not gate 32, as battery saving mode control signal FLAG=" 1 ", switch converters is operated in battery saving mode, switching tube 31 turn-offs, and flows through the electric current of switching tube MN1 by resistance value and the input voltage VIN decision of resistor R4; As battery saving mode control signal FLAG=" 0 ", switch converters is operated in normal mode of operation, and switching tube 31 conductings are flow through the electric current of switching tube MN1 by parallel resistance value and the input voltage VIN decision of resistor R3, resistor R4.In other embodiments, resistor R3 and resistor R4 also can be connected in series.
Fig. 4 is the circuit theory diagrams according to the ON time control circuit 400 of another embodiment of the utility model.Similar with ON time control circuit shown in Figure 3 300, ON time control circuit 400 comprises switching tube MP1, MP2, MN1～MN3, resistor R4, capacitor C2, comparator 33 and not gate 34.ON time control circuit 400 also comprises switching tube 41 and MP3.The source electrode of switching tube 41 receives input voltage VIN, and grid receives battery saving mode control signal FLAG, and drain electrode is coupled to the source electrode of switching tube MP3.The grid of switching tube MP3 is coupled to the drain electrode of grid and the switching tube MN2 of switching tube MP1 and MP2.The drain electrode of switching tube MP3 is coupled to the in-phase input end of drain electrode, capacitor C2 and the comparator 33 of switching tube MN3.
Switching tube MN1 and MN2 consist of current mirror, and switching tube MP1 and MP2, MP3 also consist of current mirror.The ratio of supposing switching tube MN1 and MN2 breadth length ratio is 1: n, the ratio of switching tube MP1 and MP2 breadth length ratio is 1: m, the ratio of switching tube MP1 and MP3 breadth length ratio is 1: z, wherein n, m and z are the constant greater than zero.The current value that then flows through switching tube MN1 is VIN/R4, and the current value that flows through switching tube MP2 is n*m*VIN/R4, and when switching tube 41 conducting, the current value that flows through switching tube MP3 is n*z*VIN/R4.In the embodiment shown in fig. 4, as battery saving mode control signal FLAG=" 1 ", switch converters is operated in battery saving mode, and switching tube 41 turn-offs, and the charging current of capacitor C2 is n*m*VIN/R4; As battery saving mode control signal FLAG=" 0 ", switch converters is operated in normal mode of operation, switching tube 41 conductings, and the charging current of capacitor C2 is n* (m+z) * VIN/R4.
Fig. 5 is the circuit theory diagrams according to the ON time control circuit 500 of the another embodiment of the utility model.Similar with ON time control circuit shown in Figure 3 300, ON time control circuit 500 comprises switching tube MP1, MP2, MN1～MN3, resistor R4, capacitor C2, comparator 33 and not gate 34.ON time control circuit 500 also comprises switching tube 51 and capacitor C3.The drain electrode of switching tube 51 is coupled to the in-phase input end of drain electrode, capacitor C2 and the comparator 33 of switching tube MN3, the grid of switching tube 51 receives battery saving mode control signal FLAG, the source electrode of switching tube 51 is coupled to the end of capacitor C3, and the other end of capacitor C3 is coupled to systematically.When battery saving mode control signal FLAG was in effective status, switching tube 51 conductings were flow through the electric current of MP2 to capacitor C2 and C3 charging; When battery saving mode control signal FLAG was in disarmed state, switching tube 51 turn-offed, and the electric current that flows through MP2 charges to capacitor C2.
Fig. 6 is the circuit theory diagrams according to the ON time control circuit 600 of the another embodiment of the utility model.ON time control circuit 600 comprises ON time generative circuit 61, timing circuit 62 and comparison circuit 63.
ON time generative circuit 61 generates ON time ton1 according to input voltage VIN, output voltage VO and battery saving mode control signal FLAG.ON time generative circuit 61 comprises mlultiplying circuit 611, division circuit 612, analog to digital conversion circuit 613,614 and multiplexer circuit 615.Analog to digital conversion circuit 613 has input and output, and wherein input receives output voltage VO, and output provides numeral output sampled signal VOS.Multiplexer circuit 615 has first input end, the second input, control end and output, wherein first input end receives the first scaling signal M, the second input receives the second scaling signal N, control end receives battery saving mode control signal FLAG, and output is selected the first scaling signal M or the second scaling signal N output according to battery saving mode control signal FLAG.In one embodiment, when battery saving mode control signal FLAG is in effective status, FLAG=" 1 " for example, switch converters is operated in battery saving mode, multiplexer circuit 615 outputs the first scaling signal M; When battery saving mode control signal FLAG is in disarmed state, FLAG=" 0 " for example, switch converters is operated in normal mode of operation, multiplexer circuit 615 outputs the second scaling signal N.The first scaling signal M is greater than the second scaling signal N.Mlultiplying circuit 611 has first input end, the second input and output, wherein first input end is coupled to the output of analog to digital conversion circuit 613 to receive numeral output sampled signal VOS, the output that the second input is coupled to multiplexer circuit 615 receives the first scaling signal M or the second scaling signal N, and output provides product signal MUL.Analog to digital conversion circuit 614 has input and output, and wherein input receives input voltage VIN, and output provides digital input sample signal VINS.Division circuit 612 has first input end, the second input and output, wherein first input end is coupled to the output of mlultiplying circuit 611 to receive product signal MUL, the second input is coupled to the output of analog to digital conversion circuit 614 to receive digital input sample signal VINS, and output provides ON time signal ton1.When battery saving mode control signal FLAG was in effective status, switch converters worked in battery saving mode, and ON time signal ton1 equals:
ton1＝M*VO/VIN (4)
When battery saving mode control signal FLAG was in disarmed state, switch converters worked in normal mode of operation, and ON time signal ton1 equals:
ton1＝N*VO/VIN (5)
Wherein, the first scaling signal M is greater than the second scaling signal N, thereby the ON time signal ton1 under battery saving mode is greater than the ON time signal ton1 under normal mode of operation.In one embodiment, the second scaling signal N for example can reflect the switch periods of switch converters under normal mode of operation.
In one embodiment, ON time generative circuit 61 also can receive the input sample signal VIN_sense that has represented input voltage VIN, and/or receiving the output sampled signal VO_sense represented output voltage VO, feedback signal VFB for example is to produce ON time signal ton1.Namely when battery saving mode control signal FLAG was in effective status, ON time signal ton1 equaled:
ton1＝Y*M*VO_sense/VIN_sense (6)
When battery saving mode control signal FLAG was in disarmed state, ON time signal ton1 equaled:
ton1＝Y*N*VO_sense/VIN_sense (7)
Wherein scaling signal Y is the value relevant with the sampling ratio of the sampling ratio of input voltage and/or output voltage.In one embodiment, scaling signal Y equals:
Y＝VIN sense*VO/(VIN*VO_sense)(8)
Timing circuit 62 has input and output, and wherein input receives asserts signal SET, output output timing signal Time.When asserts signal SET is effective status, timing circuit 62 timing of starting from scratch.In one embodiment, as the feedback signal VFB that has represented output voltage VO during less than reference signal VREF, asserts signal SET is effective, for example SET=" 1 "; As feedback signal VFB during greater than reference signal VREF, asserts signal SET is invalid, for example SET=" 0 ".Comparison circuit 63 has in-phase input end, inverting input and output, wherein in-phase input end is coupled to the output of timing circuit 62 to receive timing signal Time, inverting input is coupled to the output of division circuit 612 to receive ON time signal ton1, and output provides ON time control signal TON.When timing signal Time increases to ON time signal ton1, export effective ON time control signal TON, TON=" 1 " for example, thereby the shutoff of switching tube in the control switch converter.
ON time control circuit 600 is such as can be by digital circuits such as field programmable gate array (FPGA), application-specific integrated circuit (ASIC) (ASIC), programmable logic device (PLD), digital signal processor (DSP) and single-chip microcomputers (MCU).
Some above-mentioned specific embodiments only describe the utility model in an exemplary fashion, and these embodiment are not fully detailed, and are not used in the scope of the present utility model that limits.It all is possible changing and revise for disclosed embodiment, the selectivity embodiment that other are feasible and can be understood by those skilled in the art the equivalent variations of element among the embodiment.Other variations of embodiment disclosed in the utility model and modification do not exceed spirit of the present utility model and protection range.
Claims (8)
1. a control circuit is used for switch converters, it is characterized in that switch converters comprises the first switching tube, and control circuit is controlled conducting and the shutoff of the first switching tube, and described control circuit comprises:
The first comparison circuit has in-phase input end, inverting input and output, and wherein in-phase input end receives reference voltage, the feedback signal of inverting input receiving key converter output voltage, output output asserts signal;
The ON time control circuit, the input voltage of receiving key converter, output voltage and battery saving mode control signal, and output ON time control signal, wherein the ON time control signal ON time of controlling the first switching tube reduces with the increase of switch converters input voltage, and increases with the increase of switch converters output voltage; And
Logic control circuit receive asserts signal and ON time control signal, and output switch control signal is controlled conducting and the shutoff of the first switching tube; Wherein
When the battery saving mode control signal is effective status, control circuit diverter switch converter works in battery saving mode, increase the ON time of the first switching tube, when the battery saving mode control signal is disarmed state, control circuit diverter switch converter works in normal mode of operation.
2. control circuit as claimed in claim 1 is characterized in that, wherein the ON time control signal is controlled the ON time of the first switching tube under battery saving mode greater than the ON time under normal mode of operation.
3. control circuit as claimed in claim 1 is characterized in that, wherein the ON time control circuit comprises:
Current source has first end and the second end, the input voltage of first end receiving key converter wherein, and the second end output charging current signal, the input voltage of charging current signal and switch converters is directly proportional;
The first capacitor has first end and the second end, and wherein first end is coupled to the second end of current source, and the second end is coupled to systematically;
The first control switch pipe has first end, the second end and control end, and wherein first end is coupled to the first end of the first capacitor, and the second end is coupled to the second end of the first capacitor, control end receiving key control signal; And
The second comparison circuit has in-phase input end, inverting input and output, and wherein in-phase input end is coupled to the first end of the first capacitor, the output voltage of inverting input receiving key converter, output output ON time control signal; Wherein
When the battery saving mode control signal was in effective status, by the charging current signal that reduces current source output or the capacitance that increases the first capacitor, the ON time that the ON time control signal is controlled the first switching tube increased.
4. control circuit as claimed in claim 3 is characterized in that, wherein current source comprises:
The first resistor has first end and the second end, and wherein first end is coupled to the input of switch converters; And
Current mirror has input and output, and wherein input is coupled to the second termination receipts input current signal of the first resistor, and the first end that output is coupled to the first capacitor provides the charging current signal; Wherein
When the battery saving mode control signal is in effective status, increases the resistance value of the first resistor or reduce the charging current signal of current mirror output and the ratio of input current signal.
5. control circuit as claimed in claim 1, it is characterized in that, also comprise the load condition testing circuit, described load condition testing circuit produces the battery saving mode control signal by load current and the reference current signal that compares switch converters, perhaps by relatively switch periods and reference cycle signal produce the battery saving mode control signal; Wherein
When load current less than reference current signal or switch periods less than reference cycle during signal, export effective battery saving mode control signal, when load current greater than reference current signal or switch periods greater than reference cycle during signal, export invalid battery saving mode control signal.
6. control circuit as claimed in claim 1 is characterized in that, wherein the ON time control circuit comprises:
The ON time generative circuit, have first input end, the second input, the 3rd input and output, wherein first input end is coupled to the input of receiving key converter, the second input is coupled to the output of switch converters, the 3rd input receives the battery saving mode control signal, output output ON time signal;
Timing circuit has input and output, and wherein input is coupled to the output reception asserts signal of the first comparison circuit, output output timing time, and wherein when asserts signal was effective, timing circuit began timing; And
Comparison circuit, have in-phase input end, inverting input and output, wherein in-phase input end is coupled to the output of timing circuit to receive timing time, inverting input is coupled to the output of ON time generative circuit to receive the ON time signal, and output provides the ON time control signal; Wherein
ON time signal under the battery saving mode is greater than the ON time signal under the normal mode of operation.
7. a switch converters is characterized in that, comprises the first switching tube and such as each described control circuit in the claim 1 to 6.
8. switch converters as claimed in claim 7 is characterized in that, wherein the first switching tube has first end, the second end and control end, and wherein first end receives input voltage, and control end is coupled to the output of control circuit;
This switch converters also comprises:
The second switch pipe has first end, the second end and control end, and wherein first end is coupled to the second end of a switching tube, and the second end is coupled to systematically, and control end is coupled to the output of control circuit;
Inductor has first end and the second end, and wherein first end is coupled to the second end of the first switching tube and the first end of second switch pipe; And
Output capacitor, be electrically coupled with the second end of inductor and systematically between.
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|---|---|---|---|
| CN2012205032876U CN202840952U (en) | 2012-09-27 | 2012-09-27 | Control circuit and switching converter |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2012205032876U CN202840952U (en) | 2012-09-27 | 2012-09-27 | Control circuit and switching converter |
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| CN202840952U true CN202840952U (en) | 2013-03-27 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104467389A (en) * | 2014-12-30 | 2015-03-25 | 成都芯源系统有限公司 | Switching converter, controller and control method thereof |
| CN104753343A (en) * | 2014-03-31 | 2015-07-01 | 成都芯源系统有限公司 | Multiphase switching power supply with loop phase clock, controller and control method thereof |
| TWI562513B (en) * | 2015-12-07 | 2016-12-11 | M3 Technology Inc | Synchronous buck dc-dc?converter and method thereof |
-
2012
- 2012-09-27 CN CN2012205032876U patent/CN202840952U/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104753343A (en) * | 2014-03-31 | 2015-07-01 | 成都芯源系统有限公司 | Multiphase switching power supply with loop phase clock, controller and control method thereof |
| CN104753343B (en) * | 2014-03-31 | 2017-12-26 | 成都芯源系统有限公司 | Multiphase switching power supply with loop phase clock, controller and control method thereof |
| CN104467389A (en) * | 2014-12-30 | 2015-03-25 | 成都芯源系统有限公司 | Switching converter, controller and control method thereof |
| CN104467389B (en) * | 2014-12-30 | 2017-10-17 | 成都芯源系统有限公司 | Switching converter, controller and control method thereof |
| TWI562513B (en) * | 2015-12-07 | 2016-12-11 | M3 Technology Inc | Synchronous buck dc-dc?converter and method thereof |
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