CN202815074U - Voltage sampling circuit of lithium battery - Google Patents

Voltage sampling circuit of lithium battery Download PDF

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Publication number
CN202815074U
CN202815074U CN 201220199221 CN201220199221U CN202815074U CN 202815074 U CN202815074 U CN 202815074U CN 201220199221 CN201220199221 CN 201220199221 CN 201220199221 U CN201220199221 U CN 201220199221U CN 202815074 U CN202815074 U CN 202815074U
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pin
resistance
processing unit
connects
network
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CN 201220199221
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Chinese (zh)
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黄斌
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SHANGHAI RICHPOWER MICROELECTRONIC CO Ltd
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SHANGHAI RICHPOWER MICROELECTRONIC CO Ltd
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Abstract

The utility model discloses a voltage sampling circuit of a lithium battery, comprising a battery input and filtration module, a sampling channel switching module, a level shifting module, a channel switching control module and a power supply module. The battery input and filtration module is used for filtering battery voltage input and comprises a plurality of resistor-capacitor (RC) units, and each RC unit comprises a resistor and a capacitor; the sampling channel switching module is used for switching sampling batteries, namely switching to a corresponding battery needed to be sampled, and comprises an electronic switch; the level shifting module is used for inhibiting the common mode level of a sampled high-end voltage, and comprises a plurality of levels of subtracters in cascade connection; the channel switching control module is used for controlling the electronic switch to perform channel switching; and the power supply module is used for supplying power to the circuit and controlling a power supply. By the voltage sampling circuit, high-end voltage sampling and segmented sampling of a plurality of sections of batteries can be realized.

Description

Lithium battery voltage sample circuit
Technical field
The utility model belongs to the lithium battery management system technical field, relates to a kind of voltage sampling circuit, relates in particular to a kind of lithium battery voltage sample circuit.
Background technology
Lithium battery (Lithium battery) refers to contain in the electrochemical system lithium battery of (comprising lithium metal, lithium alloy and lithium ion, lighium polymer).Lithium battery is broadly divided into two classes: lithium metal battery and lithium ion battery.Lithium metal battery is normally non-rechargeabel, and includes the lithium of metallic state.Lithium ion battery does not contain the lithium of metallic state, and can charge.
Existing lithium battery voltage sample circuit can't solve the technical barriers such as high-end voltage sample and merogenesis sampling.In view of this, nowadays in the urgent need to a kind of new sample circuit is provided, to realize the sampling of high-end voltage sample and merogenesis.
The utility model content
Technical problem to be solved in the utility model is: a kind of lithium battery voltage sample circuit is provided, can realizes the merogenesis sampling of high-end voltage sample and multiple batteries.
For solving the problems of the technologies described above, the utility model adopts following technical scheme:
A kind of lithium battery voltage sample circuit, lithium battery comprises the battery that some joints connect successively; Described sample circuit comprises: battery input and filtration module, sampling channel handover module, level mobile module, passage switching controls module and power module;
Described sampling channel handover module connects respectively battery input and filtration module, level mobile module, passage switching controls module, power module; The level mobile module connects power module;
Described battery input and filtration module, in order to cell voltage input is carried out filtering, battery input and filtration module comprise some RC unit, each RC unit comprises resistance, electric capacity;
Described sampling channel handover module namely switches to the corresponding battery that needs sampling in order to the switch sampling battery; The sampling channel handover module comprises electronic switch;
Described level mobile module is in order to suppress the common mode electrical level of the high terminal voltage of sampling, and the level mobile module comprises that some grades of subtracter cascades form;
Described passage switching controls module is carried out the passage switching in order to control electronic switch;
Described power module is in order to control circuit supply and power supply.
As a kind of preferred version of the present utility model, described battery input and filtration module comprise some processing units, some electric capacity, some resistance; Described processing unit connects respectively the negative pole of each batteries by electric capacity, resistance.
As a kind of preferred version of the present utility model, described battery input and filtration module comprise resistance R F1-RF16, resistance R F0, resistance R F3 ', resistance R F4 ', resistance R F6 ', resistance R F7 ', resistance R F9 ', resistance R F10 ', resistance R F12 ', resistance R F13 ', capacitor C F1-CF16, capacitor C F4 ', capacitor C F7 ', capacitor C F10 ', capacitor C F13 ', processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U14, amplifier U15, amplifier U16, amplifier U17;
1 pin of capacitor C F1, capacitor C F2, capacitor C F3, capacitor C F4 ' is all received ground, i.e. first segment battery cathode; 2 pin of capacitor C F1 are received 2 pin of resistance R F1, receive simultaneously 14,2 pin of processing unit U8, the 14th pin of processing unit U8, the 2nd pin short circuit; Resistance R F1 the 1st pin connects the B1P network; 2 pin of capacitor C F2 are received 2 pin of resistance R F2, receive simultaneously 11 pin, 5 pin of processing unit U8,11 pin of processing unit U8,5 pin short circuits; Resistance R F2 the 1st pin connects the B2P network; 2 pin of capacitor C F3 are received 2 pin of resistance R F3, receive simultaneously 12 pin, 4 pin of processing unit U8,12 pin of processing unit U8,4 pin short circuits; Resistance R F3 the 1st pin connects the B3P network; Resistance R F0 the 1st pin ground connection, 2 pin connect 15 pin of processing unit U8; 1 pin of the 1 pin connecting resistance RF4 ' of processing unit U8,2 pin of resistance R F4 ' connect the output of amplifier U14; 2 pin of capacitor C F4 ' are received 1 pin of RF4 ';
1 pin of capacitor C F4, capacitor C F5, capacitor C F6, capacitor C F7 ' is received network B 3P, i.e. the 4th batteries negative pole; 2 pin of capacitor C F4 are received 2 pin of resistance R F4, receive simultaneously 14 pin, 2 pin of processing unit U9; 14 pin of processing unit U9,2 pin short circuits; Resistance R F4 the 1st pin connects the B4P network; 2 pin of capacitor C F5 are received 2 pin of resistance R F4, receive simultaneously 11 pin, 5 pin of processing unit U9,11 pin of processing unit U9,5 pin short circuits; Resistance R F5 the 1st pin connects the B5P network; 2 pin of capacitor C F6 are received 2 pin of resistance R F6, receive simultaneously 12 pin, 4 pin of processing unit U9,12 pin of processing unit U9,4 pin short circuits; Resistance R F6 the 1st pin connects the B6P network; Resistance R F3 ' the 1st pin connects the B3P network, and 2 pin connect 15 pin of processing unit U9; 1 pin of the 1 pin connecting resistance RF7 ' of processing unit U9,2 pin of resistance R F7 ' connect the output of amplifier U15; 2 pin of capacitor C F7 ' are received 1 pin of resistance R F7 ';
The 1st pin of capacitor C F7, capacitor C F8, capacitor C F9, capacitor C F10 ' is all received network B 6P, i.e. the 7th batteries negative pole; 2 pin of capacitor C F7 are received 2 pin of resistance R F7, receive simultaneously 14 pin, 2 pin of processing unit U10,14 pin of processing unit U10,2 pin short circuits; Resistance R F7 the 1st pin connects the B7P network; 2 pin of capacitor C F8 are received 2 pin of resistance R F8, receive simultaneously 11 pin, 5 pin of processing unit U10,11 pin of processing unit U10,5 pin short circuits; Resistance R F8 the 1st pin connects the B8P network; 2 pin of capacitor C F9 are received 2 pin of resistance R F9, receive simultaneously 12 pin, 4 pin of processing unit U10,12 pin of processing unit U10,4 pin short circuits; Resistance R F9 the 1st pin connects the B9P network; Resistance R F6 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U10; 1 pin of the 1 pin connecting resistance RF10 ' of processing unit U10,2 pin of resistance R F10 ' connect the output of amplifier U16; 2 pin of capacitor C F10 ' are received 1 pin of resistance R F10 ';
The 1st pin of capacitor C F10, capacitor C F11, capacitor C F12, capacitor C F13 ' is all received network B 9P, i.e. the 10th batteries negative pole; 2 pin of capacitor C F10 are received 2 pin of resistance R F10, receive simultaneously 14 pin, 2 pin of processing unit U11,14 pin of processing unit U11,2 pin short circuits; Resistance R F10 the 1st pin connects the B10P network; 2 pin of capacitor C F11 are received 2 pin of resistance R F11, receive simultaneously 11 pin, 5 pin of processing unit U11,11 pin of processing unit U11,5 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; 2 pin of capacitor C F12 are received 2 pin of resistance R F12, receive simultaneously 12 pin, 4 pin of processing unit U11,12 pin of processing unit U11,4 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; Resistance R F9 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U11; 1 pin of the 1 pin connecting resistance RF13 ' of processing unit U11,2 pin of resistance R F13 ' connect the output of amplifier U17; 2 pin of capacitor C F13 ' are received 1 pin of resistance R F13 ';
The 1st pin of capacitor C F13, capacitor C F14, capacitor C F15, capacitor C F16 ' is received network B 12P, i.e. the 13rd batteries negative pole; 2 pin of capacitor C F13 are received 2 pin of resistance R F13, receive simultaneously 14 pin, 2 pin of processing unit U12,14 pin of processing unit U12,2 pin short circuits; Resistance R F13 the 1st pin connects the B13P network; 2 pin of capacitor C F14 are received 2 pin of resistance R F14, receive simultaneously 11 pin, 5 pin of processing unit U12,11 pin of processing unit U12,5 pin short circuits; Resistance R F14 the 1st pin connects the B14P network; 2 pin of capacitor C F15 are received 2 pin of resistance R F15, receive simultaneously 12 pin, 4 pin of processing unit U12,12 pin of processing unit U12,4 pin short circuits; Resistance R F15 the 1st pin connects the B15P network; Resistance R F12 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U12; 1 pin of the 1 pin connecting resistance RF16 of processing unit U12,2 pin of resistance R F16 meet network B 16P; 2 pin of capacitor C F16 are received 1 pin of RF16.
As a kind of preferred version of the present utility model, described sampling channel handover module and level mobile module comprise processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17, and some resistance, some electric capacity;
Processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12 form electronic switch, connected mode according to the steering logic of electronic switch, each switching all accesses the positive and negative polarities of 1 batteries, and the output of electronic switch connects the input of the subtracter of amplifier composition, the common level that produces to deduct battery cascade; Accomplish moving down of high-end level;
Form 5 grades of cascade walking circuits, i.e. Pyatyi subtraction circuit by amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17; All level can be moved to the difference voltage of the amplifier of corresponding stage be that corresponding single battery is to the voltage of V-to every one-level from high to low, then pass to next stage, and the minuend of next stage subtracter is connected to the V-end of upper level, and the V-that so just the voltage of upper level is moved down into the corresponding levels is the voltage of datum; Move down step by step the single battery voltage sample of just having accomplished the series connection of 16 batteries.
As a kind of preferred version of the present utility model, in described sampling channel handover module and the level mobile module, 1 pin of resistance R 56 connects amplifier U13 output pin, and 2 pin of resistance R 56 and 1 pin of resistance R 54 connect amplifier U13 reverse input end; 2 pin of resistance R 54 and 1 pin of capacitor C 18 connect 13 pin of processing unit U8; 2 pin of resistance R 55 and 2 pin of capacitor C 18 connect 3 pin of processing unit U8; 1 pin of resistance R 55 and 2 pin of resistance R 57 connect the positive input of processing unit U13; 1 pin of resistance R 57 connects 7 pin, 8 pin of processing unit U8;
1 pin of resistance R 67 connects amplifier U14 output pin, and 2 pin of resistance R 67 and 1 pin of resistance R 66 connect amplifier U14 reverse input end; 2 pin of resistance R 66 and 1 pin of capacitor C 20 connect 13 pin of processing unit U9; 2 pin of resistance R 68 and 2 pin of capacitor C 20 connect 3 pin of processing unit U9; 1 pin of resistance R 68 and 2 pin of resistance R 69 connect the positive input of amplifier U14; 1 pin of resistance R 69 connects 7 pin, 8 pin of processing unit U9;
1 pin of resistance R 79 connects amplifier U15 output pin, and 2 pin of resistance R 79 and 1 pin of resistance R 78 connect amplifier U15 reverse input end; 2 pin of R78 and 1 pin of capacitor C 22 connect 13 pin of processing unit U10; 2 pin of resistance R 80 and 2 pin of capacitor C 22 connect 3 pin of processing unit U10; 1 pin of resistance R 80 and 2 pin of resistance R 81 connect the positive input of amplifier U15; 1 pin of resistance R 81 connects 7 pin, 8 pin of processing unit U10;
1 pin of resistance R 91 connects amplifier U16 output pin, and 2 pin of resistance R 91 and 1 pin of resistance R 90 connect amplifier U16 reverse input end; 2 pin of resistance R 90 and 1 pin of capacitor C 24 connect 13 pin of processing unit U11; 2 pin of resistance R 92 and 2 pin of capacitor C 24 connect 3 pin of processing unit U11; 1 pin of resistance R 93 and 2 pin of resistance R 92 connect the positive input of amplifier U16; 1 pin of resistance R 93 connects 7 pin, 8 pin of processing unit U11;
1 pin of resistance R 103 connects amplifier U17 output pin, and 2 pin of resistance R 103 and 1 pin of resistance R 102 connect amplifier U17 reverse input end; 2 pin of resistance R 102 and 1 pin of capacitor C 26 connect 13 pin of processing unit U12; 2 pin of resistance R 104 and 2 pin of capacitor C 26 connect 3 pin of processing unit U12; 1 pin of resistance R 105 and 2 pin of resistance R 104 connect the positive input of amplifier U17; 1 pin of resistance R 105 connects 7 pin, 8 pin of processing unit U12;
1 pin of resistance R 13 connects the output of amplifier U13, the output of 2 pin sampled voltages; 1 pin ground connection of capacitor C 1,2 pin of 2 pin connecting resistance R13.
As a kind of preferred version of the present utility model, described passage switching controls module comprises some triodes, some resistance, some diodes;
1 pin of resistance R 62 connects 6 pin of processing unit U8, and 2 pin of resistance R 62 and 1 pin of resistance R 63 connect the anode of diode D14; 2 pin of 2 pin of resistance R 63,2 pin of resistance R 59 and resistance R 61 meet network VDD1; 1 pin of resistance R 59 and 2 pin of resistance R 58 are received network A 1, and 1 pin of resistance R 58 connects 10 pin of processing unit U8; 1 pin of resistance R 60 and 2 pin of resistance R 61 are received network B 1; 1 pin of resistance R 60 connects 9 pin of processing unit U8; The c utmost point of triode Q1 connects network B 1, the e utmost point ground connection of triode Q1; 1 pin ground connection of resistance R 14,1 pin of resistance R 1 meets MCU_IO1; 2 pin of resistance R 1 and 1 pin of resistance R 14 connect the b utmost point of triode Q1; The c utmost point of triode Q2 connects network A 1, the e utmost point ground connection of triode Q2; 1 pin ground connection of resistance R 15,1 pin of resistance R 2 meets MCU_IO2; 2 pin of resistance R 2 and 1 pin of resistance R 15 connect the b utmost point of triode Q1;
1 pin of resistance R 74 connects 6 pin of processing unit U9, and 2 pin of resistance R 74 and 1 pin of resistance R 75 connect the anode of diode D15; 2 pin of 2 pin of resistance R 75,2 pin of resistance R 71 and resistance R 73 meet network VDD2; 1 pin of resistance R 71 and 2 pin of resistance R 70 are received network A 2, and 1 pin of resistance R 70 connects 10 pin of processing unit U9; 1 pin of resistance R 73 and 2 pin of resistance R 72 are received network B 2; 1 pin of resistance R 72 connects 9 pin of processing unit U9; The c utmost point of triode Q3 connects network B 2, the e utmost point ground connection of triode Q3; 1 pin ground connection of resistance R 16,1 pin of resistance R 3 meets MCU_IO3; 2 pin of resistance R 3 and 1 pin of resistance R 16 connect the b utmost point of triode Q3; The c utmost point of triode Q4 connects network A 2, the e utmost point ground connection of triode Q4; 1 pin ground connection of resistance R 17,1 pin of resistance R 4 meets MCU_IO4; 2 pin of resistance R 4 and 1 pin of resistance R 17 connect the b utmost point of triode Q4;
1 pin of resistance R 86 connects 6 pin of processing unit U10, and 2 pin of resistance R 86 and 1 pin of resistance R 87 connect the anode of diode D16; 2 pin of 2 pin of resistance R 87,2 pin of resistance R 83 and resistance R 85 meet network VDD3; 1 pin of resistance R 83 and 2 pin of resistance R 82 are received network A 3; 1 pin of resistance R 82 connects 10 pin of processing unit U10; 1 pin of resistance R 85 and 2 pin of resistance R 84 are received network B 3; 1 pin of resistance R 84 connects 9 pin of processing unit U10; The c utmost point of triode Q5 connects network B 3, the e utmost point ground connection of triode Q5; 1 pin ground connection of resistance R 18,1 pin of resistance R 5 meets MCU_IO5; 2 pin of resistance R 5 and 1 pin of resistance R 18 connect the b utmost point of triode Q5; The c utmost point of triode Q6 connects network A 3, the e utmost point ground connection of triode Q6; 1 pin ground connection of resistance R 19,1 pin of resistance R 6 meets MCU_IO6; 2 pin of resistance R 6 and 1 pin of resistance R 19 connect the b utmost point of triode Q6;
1 pin of resistance R 98 connects 6 pin of processing unit U11, and 2 pin of resistance R 98 and 1 pin of resistance R 99 connect the anode of diode D17; 2 pin of 2 pin of resistance R 99,2 pin of resistance R 95 and resistance R 97 meet network VDD4; 1 pin of resistance R 95 and 2 pin of resistance R 94 are received network A 4, and 1 pin of resistance R 94 connects 10 pin of processing unit U11; 1 pin of resistance R 97 and 2 pin of resistance R 96 are received network B 4; 1 pin of resistance R 96 connects 9 pin of processing unit U11; The c utmost point of triode Q7 connects network B 4, the e utmost point ground connection of triode Q7; 1 pin ground connection of resistance R 20,1 pin of resistance R 7 meets MCU_IO7; 2 pin of resistance R 7 and 1 pin of resistance R 20 connect the b utmost point of diode Q7; The c utmost point of triode Q8 connects network A 4, the e utmost point ground connection of triode Q8; 1 pin ground connection of resistance R 21,1 pin of resistance R 6 meets MCU_IO8; 2 pin of resistance R 8 and 1 pin of resistance R 21 connect the b utmost point of triode Q8;
1 pin of resistance R 110 connects 6 pin of processing unit U12, and 2 pin of resistance R 110 and 1 pin of resistance R 111 connect the anode of diode D18; 2 pin of 2 pin of R111,2 pin of resistance R 107 and resistance R 109 meet network VDD4; 1 pin of resistance R 107 and 2 pin of resistance R 106 are received network A 5, and 1 pin of resistance R 106 connects 10 pin of processing unit U12; 1 pin of resistance R 109 and 2 pin of resistance R 108 are received network B 5; 1 pin of resistance R 108 connects 9 pin of processing unit U12; The c utmost point of triode Q9 connects network B 5, the e utmost point ground connection of triode Q9; 1 pin ground connection of resistance R 22,1 pin of resistance R 9 meets MCU_IO9; 2 pin of resistance R 9 and 1 pin of resistance R 22 connect the b utmost point of triode Q9; The c utmost point of triode Q10 connects network A 5, triode Q10e utmost point ground connection; 1 pin ground connection of resistance R 23,1 pin of resistance R 10 meets MCU_IO10; 2 pin of resistance R 10 and 1 pin of resistance R 23 connect the b utmost point of triode Q8;
The negative electrode of diode D14, diode D15, diode D16, diode D17, diode D18 connects the c utmost point of triode Q18, the e utmost point ground connection of triode Q16, and 1 pin ground connection of resistance R 24,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q16; 1 pin of resistance R 11 meets MCU_IO11.
As a kind of preferred version of the present utility model, described power supply and power control circuit comprise some stabilivolts, resistance, electric capacity, triode, diode;
1 pin of resistance R V1 meets network B 4P, and namely the 4th batteries is anodal, and 2 pin of resistance R V1 meet network VDD1, stabilivolt ZV1 negative electrode network VDD1,1 pin of capacitor C V1 and the plus earth of stabilivolt ZV1,2 pin of resistance R 65 meet VDD1, and 1 pin connects the b utmost point of triode Q11, simultaneously 2 pin of connecting resistance R64; 1 pin of resistance R 64 connects the anode of diode D9, and the negative electrode of diode D9 meets network OPV, and the e utmost point of triode Q11 meets VDD1, the c utmost point of triode Q11 connects 2 pin of capacitor C 19, connect simultaneously the V+ pin of processing unit U13,1 pin ground connection of capacitor C 19,16 pin of processing unit U8 meet VDD1; 7 pin of processing unit U8,8 pin ground connection;
1 pin of resistance R V2 meets network B 7P, and namely the 7th batteries is anodal, and 2 pin of resistance R V2 meet network VDD2, stabilivolt ZV2 negative electrode network VDD2, and 1 pin of capacitor C V2 and the anode of stabilivolt ZV2 meet network B 3P; 2 pin of resistance R 77 meet VDD2, and 1 pin connects the b utmost point of triode Q12, simultaneously 2 pin of connecting resistance R76; 1 pin of resistance R 76 connects the anode of diode D10, and the negative electrode of diode D10 meets network OPV, and the e utmost point of triode Q12 meets VDD2, the c utmost point of triode Q12 connects 2 pin of capacitor C 21, connect simultaneously the V+ pin of processing unit U14,1 pin of capacitor C 21 meets B3P, and 16 pin of processing unit U9 meet VDD2; 7 pin, 8 pin of processing unit U9 meet network B 3P;
1 pin of resistance R V3 meets network B 10P, and namely the 10th batteries is anodal, 2 pin of resistance R V3 meet network VDD3, stabilivolt ZV3 negative electrode network VDD3,1 pin of capacitor C V3 and the anode of stabilivolt ZV3 meet network B 6P, 2 pin of resistance R 89 meet VDD3,1 pin connects the b utmost point of triode Q13, simultaneously 2 pin of connecting resistance R88; 1 pin of resistance R 88 connects the anode of diode D11, and the negative electrode of diode D11 meets network OPV, and the e utmost point of triode Q13 meets VDD3, and the c utmost point connects 2 pin of C23, connects simultaneously the V+ pin of processing unit U15, and 1 pin of capacitor C 23 meets B6P, and 16 pin of processing unit U10 meet VDD3; 7 pin, 8 pin of processing unit U10 meet network B 6P;
1 pin of resistance R V4 meets network B 13P, and namely the 13rd batteries is anodal, 2 pin of resistance R V4 meet network VDD4, stabilivolt ZV4 negative electrode network VDD4,1 pin of capacitor C V4 and the anode of stabilivolt ZV4 meet network B 9P, 2 pin of resistance R 101 meet VDD4,1 pin connects the b utmost point of triode Q14, simultaneously 2 pin of connecting resistance R100; 1 pin of resistance R 100 connects the anode of diode D12, and the negative electrode of diode D12 meets network OPV, and the e utmost point of triode Q14 meets VDD4, and the c utmost point connects 2 pin of C25, connects simultaneously the V+ pin of processing unit U16, and 1 pin of capacitor C 25 meets B9P, and 16 pin of processing unit U11 meet VDD4; 7 pin, 8 pin of processing unit U11 meet network B 9P;
1 pin of resistance R V5 meets network B 16P, and namely the 16th batteries is anodal, 2 pin of resistance R V5 meet network VDD5, stabilivolt ZV5 negative electrode network VDD5,1 pin of capacitor C V5 and the anode of stabilivolt ZV5 meet network B 12P, 2 pin of resistance R 113 meet VDD5,1 pin connects the b utmost point of triode Q15, simultaneously 2 pin of connecting resistance R112; 1 pin of resistance R 112 connects the anode of diode D15, and the negative electrode of diode D15 meets network OPV, and the e utmost point of triode Q15 meets VDD5, the c utmost point connects 2 pin of capacitor C 27, connect simultaneously the V+ pin of processing unit U17,1 pin of capacitor C 27 meets B12P, and 16 pin of processing unit U12 meet VDD5; 7 pin, 8 pin of processing unit U12 meet network B 12P;
The c utmost point of triode Q17 meets network OPV, the e utmost point ground connection of triode Q17, and 1 pin ground connection of resistance R 25,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q17; 1 pin of resistance R 12 meets MCU_IO12.
The beneficial effects of the utility model are: the lithium battery voltage sample circuit that the utility model proposes, can realize the merogenesis sampling of high-end voltage sample and multiple batteries.
Description of drawings
Fig. 1 is that the utility model lithium battery voltage sample circuit forms synoptic diagram.
Fig. 2-1 is that the part of the input of the utility model lithium battery voltage sample circuit and filtering circuit forms synoptic diagram.
Fig. 2-2 is that another part of the input of the utility model lithium battery voltage sample circuit and filtering circuit forms synoptic diagram.
Fig. 3 is that the utility model lithium battery voltage sample circuit sampling channel switches and level shift circuit figure.
Fig. 4 is the utility model lithium battery voltage sample circuit sampling channel control moding circuit figure.
Fig. 5 is the utility model lithium battery voltage sample circuit power supply and power control circuit figure.
Embodiment
Describe preferred embodiment of the present utility model in detail below in conjunction with accompanying drawing.
Embodiment one
See also Fig. 1, the utility model has disclosed a kind of lithium battery voltage sample circuit, and lithium battery comprises the battery that some joints connect successively; Described sample circuit comprises: battery input and filtration module, sampling channel handover module, level mobile module, passage switching controls module and power module.Described sampling channel handover module connects respectively battery input and filtration module, level mobile module, passage switching controls module, power module; The level mobile module connects power module.
Described battery input and filtration module are in order to carry out filtering to cell voltage input, and battery input and filtration module comprise some RC unit, and each RC unit comprises resistance, electric capacity.Described sampling channel handover module namely switches to the corresponding battery that needs sampling in order to the switch sampling battery; The sampling channel handover module comprises electronic switch.Described level mobile module is in order to suppress the common mode electrical level of the high terminal voltage of sampling, and the level mobile module comprises that some grades of subtracter cascades form.Described passage switching controls module is carried out the passage switching in order to control electronic switch.Described power module is in order to control circuit supply and power supply.Below introduce respectively each module.
[battery input and filtration module]
See also Fig. 2-1, Fig. 2-2, described battery input and filtration module comprise some processing units, some electric capacity, some resistance; Described processing unit connects respectively the negative pole of each batteries by electric capacity, resistance.
Described battery input and filtration module comprise resistance R F1-RF16, resistance R F0, resistance R F3 ', resistance R F4 ', resistance R F6 ', resistance R F7 ', resistance R F9 ', resistance R F10 ', resistance R F12 ', resistance R F13 ', capacitor C F1-CF16, capacitor C F4 ', capacitor C F7 ', capacitor C F10 ', capacitor C F13 ', processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U14, amplifier U15, amplifier U16, amplifier U17.
1 pin of capacitor C F1, capacitor C F2, capacitor C F3, capacitor C F4 ' is all received ground, i.e. first segment battery cathode; 2 pin of capacitor C F1 are received 2 pin of resistance R F1, receive simultaneously 14,2 pin of processing unit U8, the 14th pin of processing unit U8, the 2nd pin short circuit; Resistance R F1 the 1st pin connects the B1P network; 2 pin of capacitor C F2 are received 2 pin of resistance R F2, receive simultaneously 11 pin, 5 pin of processing unit U8,11 pin of processing unit U8,5 pin short circuits; Resistance R F2 the 1st pin connects the B2P network; 2 pin of capacitor C F3 are received 2 pin of resistance R F3, receive simultaneously 12 pin, 4 pin of processing unit U8,12 pin of processing unit U8,4 pin short circuits; Resistance R F3 the 1st pin connects the B3P network; Resistance R F0 the 1st pin ground connection, 2 pin connect 15 pin of processing unit U8; 1 pin of the 1 pin connecting resistance RF4 ' of processing unit U8,2 pin of resistance R F4 ' connect the output of amplifier U14; 2 pin of capacitor C F4 ' are received 1 pin of RF4 '.
1 pin of capacitor C F4, capacitor C F5, capacitor C F6, capacitor C F7 ' is received network B 3P, i.e. the 4th batteries negative pole; 2 pin of capacitor C F4 are received 2 pin of resistance R F4, receive simultaneously 14 pin, 2 pin of processing unit U9; 14 pin of processing unit U9,2 pin short circuits; Resistance R F4 the 1st pin connects the B4P network; 2 pin of capacitor C F5 are received 2 pin of resistance R F4, receive simultaneously 11 pin, 5 pin of processing unit U9,11 pin of processing unit U9,5 pin short circuits; Resistance R F5 the 1st pin connects the B5P network; 2 pin of capacitor C F6 are received 2 pin of resistance R F6, receive simultaneously 12 pin, 4 pin of processing unit U9,12 pin of processing unit U9,4 pin short circuits; Resistance R F6 the 1st pin connects the B6P network; Resistance R F3 ' the 1st pin connects the B3P network, and 2 pin connect 15 pin of processing unit U9; 1 pin of the 1 pin connecting resistance RF7 ' of processing unit U9,2 pin of resistance R F7 ' connect the output of amplifier U15; 2 pin of capacitor C F7 ' are received 1 pin of resistance R F7 '.
The 1st pin of capacitor C F7, capacitor C F8, capacitor C F9, capacitor C F10 ' is all received network B 6P, i.e. the 7th batteries negative pole; 2 pin of capacitor C F7 are received 2 pin of resistance R F7, receive simultaneously 14 pin, 2 pin of processing unit U10,14 pin of processing unit U10,2 pin short circuits; Resistance R F7 the 1st pin connects the B7P network; 2 pin of capacitor C F8 are received 2 pin of resistance R F8, receive simultaneously 11 pin, 5 pin of processing unit U10,11 pin of processing unit U10,5 pin short circuits; Resistance R F8 the 1st pin connects the B8P network; 2 pin of capacitor C F9 are received 2 pin of resistance R F9, receive simultaneously 12 pin, 4 pin of processing unit U10,12 pin of processing unit U10,4 pin short circuits; Resistance R F9 the 1st pin connects the B9P network; Resistance R F6 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U10; 1 pin of the 1 pin connecting resistance RF10 ' of processing unit U10,2 pin of resistance R F10 ' connect the output of amplifier U16; 2 pin of capacitor C F10 ' are received 1 pin of resistance R F10 '.
The 1st pin of capacitor C F10, capacitor C F11, capacitor C F12, capacitor C F13 ' is all received network B 9P, i.e. the 10th batteries negative pole; 2 pin of capacitor C F10 are received 2 pin of resistance R F10, receive simultaneously 14 pin, 2 pin of processing unit U11,14 pin of processing unit U11,2 pin short circuits; Resistance R F10 the 1st pin connects the B10P network; 2 pin of capacitor C F11 are received 2 pin of resistance R F11, receive simultaneously 11 pin, 5 pin of processing unit U11,11 pin of processing unit U11,5 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; 2 pin of capacitor C F12 are received 2 pin of resistance R F12, receive simultaneously 12 pin, 4 pin of processing unit U11,12 pin of processing unit U11,4 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; Resistance R F9 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U11; 1 pin of the 1 pin connecting resistance RF13 ' of processing unit U11,2 pin of resistance R F13 ' connect the output of amplifier U17; 2 pin of capacitor C F13 ' are received 1 pin of resistance R F13 '.
The 1st pin of capacitor C F13, capacitor C F14, capacitor C F15, capacitor C F16 ' is received network B 12P, i.e. the 13rd batteries negative pole; 2 pin of capacitor C F13 are received 2 pin of resistance R F13, receive simultaneously 14 pin, 2 pin of processing unit U12,14 pin of processing unit U12,2 pin short circuits; Resistance R F13 the 1st pin connects the B13P network; 2 pin of capacitor C F14 are received 2 pin of resistance R F14, receive simultaneously 11 pin, 5 pin of processing unit U12,11 pin of processing unit U12,5 pin short circuits; Resistance R F14 the 1st pin connects the B14P network; 2 pin of capacitor C F15 are received 2 pin of resistance R F15, receive simultaneously 12 pin, 4 pin of processing unit U12,12 pin of processing unit U12,4 pin short circuits; Resistance R F15 the 1st pin connects the B15P network; Resistance R F12 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U12; 1 pin of the 1 pin connecting resistance RF16 of processing unit U12,2 pin of resistance R F16 meet network B 16P; 2 pin of capacitor C F16 are received 1 pin of RF16.
[sampling channel handover module and level mobile module]
See also Fig. 3, described sampling channel handover module and level mobile module comprise processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17, and some resistance, some electric capacity.
Processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12 form electronic switch, connected mode according to the steering logic of electronic switch, each switching all accesses the positive and negative polarities of 1 batteries, and the output of electronic switch connects the input of the subtracter of amplifier composition, the common level that produces to deduct battery cascade; Accomplish moving down of high-end level.
Form 5 grades of cascade walking circuits, i.e. Pyatyi subtraction circuit by amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17; All level can be moved to the difference voltage of the amplifier of corresponding stage be that corresponding single battery is to the voltage of V-to every one-level from high to low, then pass to next stage, and the minuend of next stage subtracter is connected to the V-end of upper level, and the V-that so just the voltage of upper level is moved down into the corresponding levels is the voltage of datum; Move down step by step the single battery voltage sample of just having accomplished the series connection of 16 batteries.
In described sampling channel handover module and the level mobile module, 1 pin of resistance R 56 connects amplifier U13 output pin, and 2 pin of resistance R 56 and 1 pin of resistance R 54 connect amplifier U13 reverse input end; 2 pin of resistance R 54 and 1 pin of capacitor C 18 connect 13 pin of processing unit U8; 2 pin of resistance R 55 and 2 pin of capacitor C 18 connect 3 pin of processing unit U8; 1 pin of resistance R 55 and 2 pin of resistance R 57 connect the positive input of processing unit U13; 1 pin of resistance R 57 connects 7 pin, 8 pin of processing unit U8.
1 pin of resistance R 67 connects amplifier U14 output pin, and 2 pin of resistance R 67 and 1 pin of resistance R 66 connect amplifier U14 reverse input end; 2 pin of resistance R 66 and 1 pin of capacitor C 20 connect 13 pin of processing unit U9; 2 pin of resistance R 68 and 2 pin of capacitor C 20 connect 3 pin of processing unit U9; 1 pin of resistance R 68 and 2 pin of resistance R 69 connect the positive input of amplifier U14; 1 pin of resistance R 69 connects 7 pin, 8 pin of processing unit U9.
1 pin of resistance R 79 connects amplifier U15 output pin, and 2 pin of resistance R 79 and 1 pin of resistance R 78 connect amplifier U15 reverse input end; 2 pin of R78 and 1 pin of capacitor C 22 connect 13 pin of processing unit U10; 2 pin of resistance R 80 and 2 pin of capacitor C 22 connect 3 pin of processing unit U10; 1 pin of resistance R 80 and 2 pin of resistance R 81 connect the positive input of amplifier U15; 1 pin of resistance R 81 connects 7 pin, 8 pin of processing unit U10.
1 pin of resistance R 91 connects amplifier U16 output pin, and 2 pin of resistance R 91 and 1 pin of resistance R 90 connect amplifier U16 reverse input end; 2 pin of resistance R 90 and 1 pin of capacitor C 24 connect 13 pin of processing unit U11; 2 pin of resistance R 92 and 2 pin of capacitor C 24 connect 3 pin of processing unit U11; 1 pin of resistance R 93 and 2 pin of resistance R 92 connect the positive input of amplifier U16; 1 pin of resistance R 93 connects 7 pin, 8 pin of processing unit U11.
1 pin of resistance R 103 connects amplifier U17 output pin, and 2 pin of resistance R 103 and 1 pin of resistance R 102 connect amplifier U17 reverse input end; 2 pin of resistance R 102 and 1 pin of capacitor C 26 connect 13 pin of processing unit U12; 2 pin of resistance R 104 and 2 pin of capacitor C 26 connect 3 pin of processing unit U12; 1 pin of resistance R 105 and 2 pin of resistance R 104 connect the positive input of amplifier U17; 1 pin of resistance R 105 connects 7 pin, 8 pin of processing unit U12.
1 pin of resistance R 13 connects the output of amplifier U13, the output of 2 pin sampled voltages; 1 pin ground connection of capacitor C 1,2 pin of 2 pin connecting resistance R13.
[passage switching controls module]
See also Fig. 4, described passage switching controls module comprises some triodes, some resistance, some diodes.
1 pin of resistance R 62 connects 6 pin of processing unit U8, and 2 pin of resistance R 62 and 1 pin of resistance R 63 connect the anode of diode D14; 2 pin of 2 pin of resistance R 63,2 pin of resistance R 59 and resistance R 61 meet network VDD1; 1 pin of resistance R 59 and 2 pin of resistance R 58 are received network A 1, and 1 pin of resistance R 58 connects 10 pin of processing unit U8; 1 pin of resistance R 60 and 2 pin of resistance R 61 are received network B 1; 1 pin of resistance R 60 connects 9 pin of processing unit U8; The c utmost point of triode Q1 connects network B 1, the e utmost point ground connection of triode Q1; 1 pin ground connection of resistance R 14,1 pin of resistance R 1 meets MCU_IO1; 2 pin of resistance R 1 and 1 pin of resistance R 14 connect the b utmost point of triode Q1; The c utmost point of triode Q2 connects network A 1, the e utmost point ground connection of triode Q2; 1 pin ground connection of resistance R 15,1 pin of resistance R 2 meets MCU_IO2; 2 pin of resistance R 2 and 1 pin of resistance R 15 connect the b utmost point of triode Q1.
1 pin of resistance R 74 connects 6 pin of processing unit U9, and 2 pin of resistance R 74 and 1 pin of resistance R 75 connect the anode of diode D15; 2 pin of 2 pin of resistance R 75,2 pin of resistance R 71 and resistance R 73 meet network VDD2; 1 pin of resistance R 71 and 2 pin of resistance R 70 are received network A 2, and 1 pin of resistance R 70 connects 10 pin of processing unit U9; 1 pin of resistance R 73 and 2 pin of resistance R 72 are received network B 2; 1 pin of resistance R 72 connects 9 pin of processing unit U9; The c utmost point of triode Q3 connects network B 2, the e utmost point ground connection of triode Q3; 1 pin ground connection of resistance R 16,1 pin of resistance R 3 meets MCU_IO3; 2 pin of resistance R 3 and 1 pin of resistance R 16 connect the b utmost point of triode Q3; The c utmost point of triode Q4 connects network A 2, the e utmost point ground connection of triode Q4; 1 pin ground connection of resistance R 17,1 pin of resistance R 4 meets MCU_IO4; 2 pin of resistance R 4 and 1 pin of resistance R 17 connect the b utmost point of triode Q4.
1 pin of resistance R 86 connects 6 pin of processing unit U10, and 2 pin of resistance R 86 and 1 pin of resistance R 87 connect the anode of diode D16; 2 pin of 2 pin of resistance R 87,2 pin of resistance R 83 and resistance R 85 meet network VDD3; 1 pin of resistance R 83 and 2 pin of resistance R 82 are received network A 3; 1 pin of resistance R 82 connects 10 pin of processing unit U10; 1 pin of resistance R 85 and 2 pin of resistance R 84 are received network B 3; 1 pin of resistance R 84 connects 9 pin of processing unit U10; The c utmost point of triode Q5 connects network B 3, the e utmost point ground connection of triode Q5; 1 pin ground connection of resistance R 18,1 pin of resistance R 5 meets MCU_IO5; 2 pin of resistance R 5 and 1 pin of resistance R 18 connect the b utmost point of triode Q5; The c utmost point of triode Q6 connects network A 3, the e utmost point ground connection of triode Q6; 1 pin ground connection of resistance R 19,1 pin of resistance R 6 meets MCU_IO6; 2 pin of resistance R 6 and 1 pin of resistance R 19 connect the b utmost point of triode Q6.
1 pin of resistance R 98 connects 6 pin of processing unit U11, and 2 pin of resistance R 98 and 1 pin of resistance R 99 connect the anode of diode D17; 2 pin of 2 pin of resistance R 99,2 pin of resistance R 95 and resistance R 97 meet network VDD4; 1 pin of resistance R 95 and 2 pin of resistance R 94 are received network A 4, and 1 pin of resistance R 94 connects 10 pin of processing unit U11; 1 pin of resistance R 97 and 2 pin of resistance R 96 are received network B 4; 1 pin of resistance R 96 connects 9 pin of processing unit U11; The c utmost point of triode Q7 connects network B 4, the e utmost point ground connection of triode Q7; 1 pin ground connection of resistance R 20,1 pin of resistance R 7 meets MCU_IO7; 2 pin of resistance R 7 and 1 pin of resistance R 20 connect the b utmost point of diode Q7; The c utmost point of triode Q8 connects network A 4, the e utmost point ground connection of triode Q8; 1 pin ground connection of resistance R 21,1 pin of resistance R 6 meets MCU_IO8; 2 pin of resistance R 8 and 1 pin of resistance R 21 connect the b utmost point of triode Q8.
1 pin of resistance R 110 connects 6 pin of processing unit U12, and 2 pin of resistance R 110 and 1 pin of resistance R 111 connect the anode of diode D18; 2 pin of 2 pin of R111,2 pin of resistance R 107 and resistance R 109 meet network VDD4; 1 pin of resistance R 107 and 2 pin of resistance R 106 are received network A 5, and 1 pin of resistance R 106 connects 10 pin of processing unit U12; 1 pin of resistance R 109 and 2 pin of resistance R 108 are received network B 5; 1 pin of resistance R 108 connects 9 pin of processing unit U12; The c utmost point of triode Q9 connects network B 5, the e utmost point ground connection of triode Q9; 1 pin ground connection of resistance R 22,1 pin of resistance R 9 meets MCU_IO9; 2 pin of resistance R 9 and 1 pin of resistance R 22 connect the b utmost point of triode Q9; The c utmost point of triode Q10 connects network A 5, triode Q10e utmost point ground connection; 1 pin ground connection of resistance R 23,1 pin of resistance R 10 meets MCU_IO10; 2 pin of resistance R 10 and 1 pin of resistance R 23 connect the b utmost point of triode Q8;
The negative electrode of diode D14, diode D15, diode D16, diode D17, diode D18 connects the c utmost point of triode Q18, the e utmost point ground connection of triode Q16, and 1 pin ground connection of resistance R 24,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q16; 1 pin of resistance R 11 meets MCU_IO11.
[power supply and power control circuit]
See also Fig. 5, described power supply and power control circuit comprise some stabilivolts, resistance, electric capacity, triode, diode.
1 pin of resistance R V1 meets network B 4P, and namely the 4th batteries is anodal, and 2 pin of resistance R V1 meet network VDD1, stabilivolt ZV1 negative electrode network VDD1,1 pin of capacitor C V1 and the plus earth of stabilivolt ZV1,2 pin of resistance R 65 meet VDD1, and 1 pin connects the b utmost point of triode Q11, simultaneously 2 pin of connecting resistance R64; 1 pin of resistance R 64 connects the anode of diode D9, and the negative electrode of diode D9 meets network OPV, and the e utmost point of triode Q11 meets VDD1, the c utmost point of triode Q11 connects 2 pin of capacitor C 19, connect simultaneously the V+ pin of processing unit U13,1 pin ground connection of capacitor C 19,16 pin of processing unit U8 meet VDD1; 7 pin of processing unit U8,8 pin ground connection;
1 pin of resistance R V2 meets network B 7P, and namely the 7th batteries is anodal, and 2 pin of resistance R V2 meet network VDD2, stabilivolt ZV2 negative electrode network VDD2, and 1 pin of capacitor C V2 and the anode of stabilivolt ZV2 meet network B 3P; 2 pin of resistance R 77 meet VDD2, and 1 pin connects the b utmost point of triode Q12, simultaneously 2 pin of connecting resistance R76; 1 pin of resistance R 76 connects the anode of diode D10, and the negative electrode of diode D10 meets network OPV, and the e utmost point of triode Q12 meets VDD2, the c utmost point of triode Q12 connects 2 pin of capacitor C 21, connect simultaneously the V+ pin of processing unit U14,1 pin of capacitor C 21 meets B3P, and 16 pin of processing unit U9 meet VDD2; 7 pin, 8 pin of processing unit U9 meet network B 3P;
1 pin of resistance R V3 meets network B 10P, and namely the 10th batteries is anodal, 2 pin of resistance R V3 meet network VDD3, stabilivolt ZV3 negative electrode network VDD3,1 pin of capacitor C V3 and the anode of stabilivolt ZV3 meet network B 6P, 2 pin of resistance R 89 meet VDD3,1 pin connects the b utmost point of triode Q13, simultaneously 2 pin of connecting resistance R88; 1 pin of resistance R 88 connects the anode of diode D11, and the negative electrode of diode D11 meets network OPV, and the e utmost point of triode Q13 meets VDD3, and the c utmost point connects 2 pin of C23, connects simultaneously the V+ pin of processing unit U15, and 1 pin of capacitor C 23 meets B6P, and 16 pin of processing unit U10 meet VDD3; 7 pin, 8 pin of processing unit U10 meet network B 6P;
1 pin of resistance R V4 meets network B 13P, and namely the 13rd batteries is anodal, 2 pin of resistance R V4 meet network VDD4, stabilivolt ZV4 negative electrode network VDD4,1 pin of capacitor C V4 and the anode of stabilivolt ZV4 meet network B 9P, 2 pin of resistance R 101 meet VDD4,1 pin connects the b utmost point of triode Q14, simultaneously 2 pin of connecting resistance R100; 1 pin of resistance R 100 connects the anode of diode D12, and the negative electrode of diode D12 meets network OPV, and the e utmost point of triode Q14 meets VDD4, and the c utmost point connects 2 pin of C25, connects simultaneously the V+ pin of processing unit U16, and 1 pin of capacitor C 25 meets B9P, and 16 pin of processing unit U11 meet VDD4; 7 pin, 8 pin of processing unit U11 meet network B 9P;
1 pin of resistance R V5 meets network B 16P, and namely the 16th batteries is anodal, 2 pin of resistance R V5 meet network VDD5, stabilivolt ZV5 negative electrode network VDD5,1 pin of capacitor C V5 and the anode of stabilivolt ZV5 meet network B 12P, 2 pin of resistance R 113 meet VDD5,1 pin connects the b utmost point of triode Q15, simultaneously 2 pin of connecting resistance R112; 1 pin of resistance R 112 connects the anode of diode D15, and the negative electrode of diode D15 meets network OPV, and the e utmost point of triode Q15 meets VDD5, the c utmost point connects 2 pin of capacitor C 27, connect simultaneously the V+ pin of processing unit U17,1 pin of capacitor C 27 meets B12P, and 16 pin of processing unit U12 meet VDD5; 7 pin, 8 pin of processing unit U12 meet network B 12P;
The c utmost point of triode Q17 meets network OPV, the e utmost point ground connection of triode Q17, and 1 pin ground connection of resistance R 25,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q17; 1 pin of resistance R 12 meets MCU_IO12.
Embodiment two
The utility model has disclosed component units important in a kind of lithium battery management system, voltage sampling circuit.Comprise battery input filter module, the sampling channel handover module, the level mobile module, passage switching controls module, and power module forms.The multisection lithium battery voltage sample circuit that the utility model proposes can effectively solve high-end voltage sample, and the difficult problem of merogenesis sampling.The utility model circuit provides voltage sample for a lithium battery battery bag, and arbitrarily the sampling of single battery is switched, and accomplishes that closed portion samples temporary transient no element circuit to reduce power consumption.
Whole circuit is 16 joint lithium batteries any single battery voltage sampling circuits of connecting.Comprise battery input filter module, the sampling channel handover module, the level mobile module, passage switching controls module, and power module forms.See also Fig. 1.
[input and filtration module]
Input and be filtered into the part of whole sample circuit, its circuit is shown in Fig. 2-1, Fig. 2-2.
Battery input and filtering part, resistance R F1-RF16, and CF1-CF16, RF0, RF3 ', RF6 ', RF9 ', RF12 ' forms.
Capacitor C F1, CF2, CF3,1 pin of CF4 ' is received ground, i.e. the first segment battery cathode.2 pin of CF1 are received 2 pin of RF1, receive simultaneously 14,2 pin (14,2 pin short circuit) of U8.RF1 the 1st pin connects the B1P network.2 pin of CF2 are received 2 pin of RF2, receive simultaneously 11,5 pin (11,5 pin short circuit) of U8.RF2 the 1st pin connects the B2P network.2 pin of CF3 are received 2 pin of RF3, receive simultaneously 12,4 pin (12,4 pin short circuit) of U8.RF3 the 1st pin connects the B3P network.RF0 the 1st pin ground connection, 2 pin connect the U815 pin.The U81 pin connects 1 pin of RF4 ', and 2 pin of RF4 ' connect the output of amplifier U14.2 pin of CF4 ' are received 1 pin of RF4.
Capacitor C F4, CF5, CF6,1 pin of CF7 ' is received network B 3P, i.e. the 4th batteries negative pole.2 pin of CF4 are received 2 pin of RF4, receive simultaneously 14,2 pin (14,2 pin short circuit) of U9.RF4 the 1st pin connects the B4P network.2 pin of CF5 are received 2 pin of RF4, receive simultaneously 11,5 pin (11,5 pin short circuit) of U9.RF5 the 1st pin connects the B5P network.2 pin of CF6 are received 2 pin of RF6, receive simultaneously 12,4 pin (12,4 pin short circuit) of U9.RF6 the 1st pin connects the B6P network.RF3 ' the 1st pin connects the B3P network, and 2 pin connect the U915 pin.The U91 pin connects 1 pin of RF7 ', and 2 pin of RF7 ' connect the output of amplifier U14.2 pin of CF7 ' are received 1 pin of RF7 '.
Capacitor C F7, CF8, CF9, CF10 ', 1 pin receive network B 6P, i.e. the 7th batteries negative pole.2 pin of CF7 are received 2 pin of RF7, receive simultaneously 14,2 pin (14,2 pin short circuit) of U10.RF7 the 1st pin connects the B7P network.2 pin of CF8 are received 2 pin of RF8, receive simultaneously 11,5 pin (11,5 pin short circuit) of U10.RF8 the 1st pin connects the B8P network.2 pin of CF9 are received 2 pin of RF9, receive simultaneously 12,4 pin (12,4 pin short circuit) of U10.RF9 the 1st pin connects the B9P network.RF6 ' the 1st pin ground connection, 2 pin connect the U1015 pin.The U101 pin connects 1 pin of RF10 ', and 2 pin of RF10 ' connect the output of amplifier U15.2 pin of CF10 ' are received 1 pin of RF10 '.
Capacitor C F10, CF11, CF12, CF13 ', 1 pin receive network B 9P, i.e. the 10th batteries negative pole.2 pin of CF10 are received 2 pin of RF10, receive simultaneously 14,2 pin (14,2 pin short circuit) of U11.RF10 the 1st pin connects the B10P network.2 pin of CF11 are received 2 pin of RF11, receive simultaneously 11,5 pin (11,5 pin short circuit) of U11.RF12 the 1st pin connects the B12P network.2 pin of CF12 are received 2 pin of RF12, receive simultaneously 12,4 pin (12,4 pin short circuit) of U8.RF12 the 1st pin connects the B12P network.RF9 ' the 1st pin ground connection, 2 pin connect the U1115 pin.The U111 pin connects 1 pin of RF13 ', and 2 pin of RF13 ' connect the output of amplifier U16.2 pin of CF13 ' are received 1 pin of RF13 '.
Capacitor C F13, CF14, CF15, CF16 ', 1 pin receive network B 12P, i.e. the 13rd batteries negative pole.2 pin of CF13 are received 2 pin of RF13, receive simultaneously 14,2 pin (14,2 pin short circuit) of U12.RF13 the 1st pin connects the B13P network.2 pin of CF14 are received 2 pin of RF14, receive simultaneously 11,5 pin (11,5 pin short circuit) of U12.RF14 the 1st pin connects the B14P network.2 pin of CF15 are received 2 pin of RF15, receive simultaneously 12,4 pin (12,4 pin short circuit) of U12.RF15 the 1st pin connects the B15P network.RF12 ' the 1st pin ground connection, 2 pin connect the U1215 pin.U11 1 pin connects 1 pin of RF16 ', and 2 pin of RF13 ' meet network B 16P.2 pin of CF13 ' are received 1 pin of RF16 '.
Shown in Fig. 2-1, Fig. 2-2, input and filtering part, by input resistance, and filter capacitor forms.The two poles of the earth of each batteries all connect by input resistance, and filter capacitor, and the output of higher level's level shift circuit also as the input of next stage, also is connected to filter capacitor in addition.Wherein network ground is the negative pole of first segment battery, and network B 1P is that the positive pole of the 1st batteries and the negative pole of the 2nd batteries connect, and network B 2P is that the positive pole of the 2nd batteries and the negative pole of the 3rd batteries connect, the like.Battery is from the 1st joint string to 16 joints.
[passage switches and the level mobile module]
Passage switching and level shift circuit are as shown in Figure 3.
1 pin of resistance R 56 connects amplifier U13 output pin, and 2 pin of R56 and 1 pin of R54 connect the U13 reverse input end.2 pin of R54 and 1 pin of C18 connect 13 pin of U8.2 pin of R55 and 2 pin of C18 connect 3 pin of U8.1 pin of R55 and 2 pin of R57 connect the positive input of U13.1 pin of R57 connects 7,8 pin of U8.
1 pin of resistance R 67 connects amplifier U14 output pin, and 2 pin of R67 and 1 pin of R66 connect the U14 reverse input end.2 pin of R66 and 1 pin of C20 connect 13 pin of U9.2 pin of R68 and 2 pin of C20 connect 3 pin of U9.1 pin of R68 and 2 pin of R69 connect the positive input of U14.1 pin of R69 connects 7,8 pin of U9.
1 pin of resistance R 79 connects amplifier U15 output pin, and 2 pin of R79 and 1 pin of R78 connect the U15 reverse input end.2 pin of R78 and 1 pin of C22 connect 13 pin of U10.2 pin of R80 and 2 pin of C22 connect 3 pin of U10.1 pin of R80 and 2 pin of R81 connect the positive input of U15.1 pin of R81 connects 7,8 pin of U10
1 pin of resistance R 91 connects amplifier U16 output pin, and 2 pin of R91 and 1 pin of R90 connect the U16 reverse input end.2 pin of R90 and 1 pin of C24 connect 13 pin of U11.2 pin of R92 and 2 pin of C24 connect 3 pin of U11.1 pin of R93 and 2 pin of R92 connect the positive input of U16.1 pin of R93 connects 7,8 pin of U11
1 pin of resistance R 103 connects amplifier U17 output pin, and 2 pin of R103 and 1 pin of R102 connect the U17 reverse input end.2 pin of R102 and 1 pin of C26 connect 13 pin of U12.2 pin of R104 and 2 pin of C26 connect 3 pin of U12.1 pin of R105 and 2 pin of R104 connect the positive input of U17.1 pin of R105 connects 7,8 pin of U12.
1 pin of resistance R 13 connects the output of amplifier U13, the output of 2 pin sampled voltages.1 pin ground connection of capacitor C 1,2 pin connect 2 pin of R13.
As shown in Figure 3, U8, U9, U10, U11, U12 electronic switch CD4052, form commutation circuit, according to the connected mode of the steering logic of CD4052, each switching all accesses the positive and negative polarities of 1 batteries, and the output of CD4052 connects the input of the subtracter of amplifier composition, so just can deduct the common level that battery cascade produces.So just accomplish moving down of high-end level.As shown in Figure 3, form 5 grades of cascade walking circuits, i.e. Pyatyi subtraction circuit by amplifier.All level can be moved to the difference voltage of the amplifier of corresponding stage be that corresponding single battery is to the voltage of V-to every one-level from high to low, then pass to next stage, and the minuend of next stage subtracter is connected to the V-end of upper level, and the V-that so just the voltage of upper level is moved down into the corresponding levels is the voltage of datum.Move down so step by step the single battery voltage sample of just having accomplished the series connection of 16 batteries.
[passage control switching circuit]
The passage control switching circuit as shown in Figure 4.
1 pin of resistance R 62 connects 6 pin of U8, and 2 pin of R62 and 1 pin of R63 connect the anode of D14.2 pin of 2 pin of R63 and 2 pin of R59 and R61 meet network VDD1.1 pin of R59 and 2 pin of R58 are received network A 1, and 1 pin of R58 connects 10 pin of U8.1 pin of R60 and 2 pin of R61,1 pin of receiving network B 1.R60 connects 9 pin of U8.The triode Q1c utmost point connects network B 1, e utmost point ground connection.The 1 pin ground connection of R14,1 pin of resistance R 1 meets MCU_IO1.2 pin of R1 and 1 pin of R14 connect the b utmost point of Q1.The triode Q2c utmost point connects network A 1, e utmost point ground connection.The 1 pin ground connection of R15,1 pin of resistance R 2 meets MCU_IO2.2 pin of R2 and 1 pin of R15 connect the b utmost point of Q1.
1 pin of R74 connects 6 pin of U9, and 2 pin of R74 and 1 pin of R75 connect the anode of D15.2 pin of 2 pin of R75 and 2 pin of R71 and R73 meet network VDD2.1 pin of R71 and 2 pin of R70 are received network A 2, and 1 pin of R70 connects 10 pin of U9.1 pin of R73 and 2 pin of R72,1 pin of receiving network B 2.R72 connects 9 pin of U9.The triode Q3c utmost point connects network B 2, e utmost point ground connection.The 1 pin ground connection of R16,1 pin of resistance R 3 meets MCU_IO3.2 pin of R3 and 1 pin of R16 connect the b utmost point of Q3.The triode Q4c utmost point connects network A 2, e utmost point ground connection.The 1 pin ground connection of R17,1 pin of resistance R 4 meets MCU_IO4.2 pin of R4 and 1 pin of R17 connect the b utmost point of Q4.
1 pin of R86 connects 6 pin of U10, and 2 pin of R86 and 1 pin of R87 connect the anode of D16.2 pin of 2 pin of R87 and 2 pin of R83 and R85 meet network VDD3.1 pin of R83 and 2 pin of R82 are received network A 3, and 1 pin of R82 connects 10 pin of U10.1 pin of R85 and 2 pin of R84 are received network B 3.1 pin of R84 connects 9 pin of U10.The triode Q5c utmost point connects network B 3, e utmost point ground connection.The 1 pin ground connection of R18,1 pin of resistance R 5 meets MCU_IO5.2 pin of R5 and 1 pin of R18 connect the b utmost point of Q5.The triode Q6c utmost point connects network A 3, e utmost point ground connection.The 1 pin ground connection of R19,1 pin of resistance R 6 meets MCU_IO6.2 pin of R6 and 1 pin of R19 connect the b utmost point of Q6.
1 pin of R98 connects 6 pin of U11, and 2 pin of R98 and 1 pin of R99 connect the anode of D17.2 pin of 2 pin of R99 and 2 pin of R95 and R97 meet network VDD4.1 pin of R95 and 2 pin of R94 are received network A 4, and 1 pin of R94 connects 10 pin of U11.1 pin of R97 and 2 pin of R96,1 pin of receiving network B 4.R96 connects 9 pin of U11.The triode Q7c utmost point connects network B 4, e utmost point ground connection.The 1 pin ground connection of R20,1 pin of resistance R 7 meets MCU_IO7.2 pin of R7 and 1 pin of R20 connect the b utmost point of Q7.The triode Q8c utmost point connects network A 4, e utmost point ground connection.The 1 pin ground connection of R21,1 pin of resistance R 6 meets MCU_IO8.2 pin of R8 and 1 pin of R21 connect the b utmost point of Q8.
1 pin of R110 connects 6 pin of U12, and 2 pin of R110 and 1 pin of R111 connect the anode of D18.2 pin of 2 pin of R111 and 2 pin of R107 and R109 meet network VDD4.1 pin of R107 and 2 pin of R106 are received network A 5, and 1 pin of R106 connects 10 pin of U12.1 pin of R109 and 2 pin of R108,1 pin of receiving network B 5.R108 connects 9 pin of U12.The triode Q9c utmost point connects network B 5, e utmost point ground connection.1 pin of the 1 pin stake resistance R9 of R22 meets MCU_IO9.2 pin of R9 and 1 pin of R22 connect the b utmost point of Q9.The triode Q10c utmost point connects network A 5, e utmost point ground connection.The 1 pin ground connection of R23,1 pin of resistance R 10 meets MCU_IO10.2 pin of R10 and 1 pin of R23 connect the b utmost point of Q8.
D14, D15, D16, D17, the negative electrode of D18 connect the c utmost point of Q18, Q16e utmost point ground connection, the 1 pin ground connection of R24,2 pin are connected 2 pin and are connected with the Q16b utmost point with R11.1 pin of R11 meets MCU_IO11.
The passage control switching circuit as shown in Figure 4, circuit is comprised of 5 CD4052, and corresponding channel control circuit also has 5 identical the electric circuit constitutes, corresponding every one-level commutation circuit, for example, the control circuit of electronic switch U8 is by R58, R59, R60, R61 forms channel control logic, by the control level of MCU output through Q1, Q2, oppositely after control U8.By R62, R63, D14 form the control that enables of U8, and wherein D14 is in order to isolate sealing in of upper step voltage.The control level of MCU output is controlled the Enable Pin of CD4052 at different levels simultaneously after Q16 is reverse.
[power supply and power control circuit]
Power supply and power control circuit are as shown in Figure 5.
1 pin of resistance R V1 meets network B 4P, and namely the 4th batteries is anodal, and 2 pin of RV1 meet network VDD1, ZV1 negative electrode network VDD1, and 1 pin of CV1 and the plus earth of ZV1,2 pin of R65 meet VDD1, and 1 pin connects the b utmost point of Q11, connects simultaneously 2 pin of R64.1 pin of R64 connects the anode of D9, and the negative electrode of D9 meets network OPV, and the e utmost point of Q11 meets VDD1, and the c utmost point connects 2 pin of C19, connects simultaneously the V+ pin of U13, the 1 pin ground connection of C19, and 16 pin of U8 meet VDD1.U87,8 pin ground connection
1 pin of resistance R V2 meets network B 7P, and namely the 7th batteries is anodal, and 2 pin of RV2 meet network VDD2, ZV2 negative electrode network VDD2, and 1 pin of CV2 and the anode of ZV2 meet network B 3P, and 2 pin of R77 meet VDD2, and 1 pin connects the b utmost point of Q12, connects simultaneously 2 pin of R76.1 pin of R76 connects the anode of D10, and the negative electrode of D10 meets network OPV, and the e utmost point of Q12 meets VDD2, and the c utmost point connects 2 pin of C21, connects simultaneously the V+ pin of U14, and 1 pin of C21 meets B3P, and 16 pin of U9 meet VDD2.U9 7,8 pin meet network B 3P
1 pin of resistance R V3 meets network B 10P, and namely the 10th batteries is anodal, and 2 pin of RV3 meet network VDD3, ZV3 negative electrode network VDD3, and 1 pin of CV3 and the anode of ZV3 meet network B 6P, and 2 pin of R89 meet VDD3, and 1 pin connects the b utmost point of Q13, connects simultaneously 2 pin of R88.1 pin of R88 connects the anode of D11, and the negative electrode of D11 meets network OPV, and the e utmost point of Q13 meets VDD3, and the c utmost point connects 2 pin of C23, connects simultaneously the V+ pin of U15, and 1 pin of C23 meets B6P, and 16 pin of U10 meet VDD3.U107,8 pin meet network B 6P
1 pin of resistance R V4 meets network B 13P, and namely the 13rd batteries is anodal, and 2 pin of RV4 meet network VDD4, ZV4 negative electrode network VDD4, and 1 pin of CV4 and the anode of ZV4 meet network B 9P, and 2 pin of R101 meet VDD4, and 1 pin connects the b utmost point of Q14, connects simultaneously 2 pin of R100.1 pin of R100 connects the anode of D12, and the negative electrode of D12 meets network OPV, and the e utmost point of Q14 meets VDD4, and the c utmost point connects 2 pin of C25, connects simultaneously the V+ pin of U16, and 1 pin of C25 meets B9P, and 16 pin of U11 meet VDD4.U117,8 pin meet network B 9P
1 pin of resistance R V5 meets network B 16P, and namely the 16th batteries is anodal, and 2 pin of RV5 meet network VDD5, ZV5 negative electrode network VDD5, and 1 pin of CV5 and the anode of ZV5 meet network B 12P, and 2 pin of R113 meet VDD5, and 1 pin connects the b utmost point of Q15, connects simultaneously 2 pin of R112.1 pin of R112 connects the anode of D15, and the negative electrode of D15 meets network OPV, and the e utmost point of Q15 meets VDD5, and the c utmost point connects 2 pin of C27, connects simultaneously the V+ pin of U17, and 1 pin of C27 meets B12P, and 16 pin of U12 meet VDD5.U127,8 pin meet network B 12P
The triode Q17c utmost point meets network OPV, Q17e utmost point ground connection, and the 1 pin ground connection of R25,2 pin are connected 2 pin and are connected with the Q17b utmost point with R12.1 pin of R12 meets MCU_IO12
As shown in Figure 5 sample circuit be by 5 grades of cascades form every one-level all by; identical the electric circuit constitute; for example; U9; the 2nd grade of forming of U11, meeting network B 7P by 1 pin of resistance R V2 is circuit supply, wherein CV2 is power filtering capacitor; stabilivolt is as overvoltage protection, and power supply plays the pressure limiting effect when surpassing 18V.Q12, R77, R76, D10 forms power control circuit, and the power supply that can cut off amplifier is to reduce power consumption.Wherein, C21 is the power filtering capacitor of amplifier.
In sum, the lithium battery voltage sample circuit that the utility model proposes can be realized the merogenesis sampling of high-end voltage sample and multiple batteries.
Here description of the present utility model and application is illustrative, is not to want with scope restriction of the present utility model in the above-described embodiments.Here the distortion of disclosed embodiment and change is possible, and the various parts of the replacement of embodiment and equivalence are known for those those of ordinary skill in the art.Those skilled in the art are noted that in the situation that does not break away from spirit of the present utility model or essential characteristic, and the utility model can be with other form, structure, layout, ratio, and realize with other assembly, material and parts.In the situation that does not break away from the utility model scope and spirit, can carry out other distortion and change to disclosed embodiment here.

Claims (7)

1. a lithium battery voltage sample circuit is characterized in that lithium battery comprises the battery that some joints connect successively; Described sample circuit comprises: battery input and filtration module, sampling channel handover module, level mobile module, passage switching controls module and power module;
Described sampling channel handover module connects respectively battery input and filtration module, level mobile module, passage switching controls module, power module; The level mobile module connects power module;
Described battery input and filtration module, in order to cell voltage input is carried out filtering, battery input and filtration module comprise some RC unit, each RC unit comprises resistance, electric capacity;
Described sampling channel handover module namely switches to the corresponding battery that needs sampling in order to the switch sampling battery; The sampling channel handover module comprises electronic switch;
Described level mobile module is in order to suppress the common mode electrical level of the high terminal voltage of sampling, and the level mobile module comprises that some grades of subtracter cascades form;
Described passage switching controls module is carried out the passage switching in order to control electronic switch;
Described power module is in order to control circuit supply and power supply.
2. lithium battery voltage sample circuit according to claim 1 is characterized in that:
Described battery input and filtration module comprise some processing units, some electric capacity, some resistance; Described processing unit connects respectively the negative pole of each batteries by electric capacity, resistance.
3. lithium battery voltage sample circuit according to claim 2 is characterized in that:
Described battery input and filtration module comprise resistance R F1-RF16, resistance R F0, resistance R F3 ', resistance R F4 ', resistance R F6 ', resistance R F7 ', resistance R F9 ', resistance R F10 ', resistance R F12 ', resistance R F13 ', capacitor C F1-CF16, capacitor C F4 ', capacitor C F7 ', capacitor C F10 ', capacitor C F13 ', processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U14, amplifier U15, amplifier U16, amplifier U17;
1 pin of capacitor C F1, capacitor C F2, capacitor C F3, capacitor C F4 ' is all received ground, i.e. first segment battery cathode; 2 pin of capacitor C F1 are received 2 pin of resistance R F1, receive simultaneously 14,2 pin of processing unit U8, the 14th pin of processing unit U8, the 2nd pin short circuit; Resistance R F1 the 1st pin connects the B1P network; 2 pin of capacitor C F2 are received 2 pin of resistance R F2, receive simultaneously 11 pin, 5 pin of processing unit U8,11 pin of processing unit U8,5 pin short circuits; Resistance R F2 the 1st pin connects the B2P network; 2 pin of capacitor C F3 are received 2 pin of resistance R F3, receive simultaneously 12 pin, 4 pin of processing unit U8,12 pin of processing unit U8,4 pin short circuits; Resistance R F3 the 1st pin connects the B3P network; Resistance R F0 the 1st pin ground connection, 2 pin connect 15 pin of processing unit U8; 1 pin of the 1 pin connecting resistance RF4 ' of processing unit U8,2 pin of resistance R F4 ' connect the output of amplifier U14; 2 pin of capacitor C F4 ' are received 1 pin of RF4 ';
1 pin of capacitor C F4, capacitor C F5, capacitor C F6, capacitor C F7 ' is received network B 3P, i.e. the 4th batteries negative pole; 2 pin of capacitor C F4 are received 2 pin of resistance R F4, receive simultaneously 14 pin, 2 pin of processing unit U9; 14 pin of processing unit U9,2 pin short circuits; Resistance R F4 the 1st pin connects the B4P network; 2 pin of capacitor C F5 are received 2 pin of resistance R F4, receive simultaneously 11 pin, 5 pin of processing unit U9,11 pin of processing unit U9,5 pin short circuits; Resistance R F5 the 1st pin connects the B5P network; 2 pin of capacitor C F6 are received 2 pin of resistance R F6, receive simultaneously 12 pin, 4 pin of processing unit U9,12 pin of processing unit U9,4 pin short circuits; Resistance R F6 the 1st pin connects the B6P network; Resistance R F3 ' the 1st pin connects the B3P network, and 2 pin connect 15 pin of processing unit U9; 1 pin of the 1 pin connecting resistance RF7 ' of processing unit U9,2 pin of resistance R F7 ' connect the output of amplifier U15; 2 pin of capacitor C F7 ' are received 1 pin of resistance R F7 ';
The 1st pin of capacitor C F7, capacitor C F8, capacitor C F9, capacitor C F10 ' is all received network B 6P, i.e. the 7th batteries negative pole; 2 pin of capacitor C F7 are received 2 pin of resistance R F7, receive simultaneously 14 pin, 2 pin of processing unit U10,14 pin of processing unit U10,2 pin short circuits; Resistance R F7 the 1st pin connects the B7P network; 2 pin of capacitor C F8 are received 2 pin of resistance R F8, receive simultaneously 11 pin, 5 pin of processing unit U10,11 pin of processing unit U10,5 pin short circuits; Resistance R F8 the 1st pin connects the B8P network; 2 pin of capacitor C F9 are received 2 pin of resistance R F9, receive simultaneously 12 pin, 4 pin of processing unit U10,12 pin of processing unit U10,4 pin short circuits; Resistance R F9 the 1st pin connects the B9P network; Resistance R F6 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U10; 1 pin of the 1 pin connecting resistance RF10 ' of processing unit U10,2 pin of resistance R F10 ' connect the output of amplifier U16; 2 pin of capacitor C F10 ' are received 1 pin of resistance R F10 ';
The 1st pin of capacitor C F10, capacitor C F11, capacitor C F12, capacitor C F13 ' is all received network B 9P, i.e. the 10th batteries negative pole; 2 pin of capacitor C F10 are received 2 pin of resistance R F10, receive simultaneously 14 pin, 2 pin of processing unit U11,14 pin of processing unit U11,2 pin short circuits; Resistance R F10 the 1st pin connects the B10P network; 2 pin of capacitor C F11 are received 2 pin of resistance R F11, receive simultaneously 11 pin, 5 pin of processing unit U11,11 pin of processing unit U11,5 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; 2 pin of capacitor C F12 are received 2 pin of resistance R F12, receive simultaneously 12 pin, 4 pin of processing unit U11,12 pin of processing unit U11,4 pin short circuits; Resistance R F12 the 1st pin connects the B12P network; Resistance R F9 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U11; 1 pin of the 1 pin connecting resistance RF13 ' of processing unit U11,2 pin of resistance R F13 ' connect the output of amplifier U17; 2 pin of capacitor C F13 ' are received 1 pin of resistance R F13 ';
The 1st pin of capacitor C F13, capacitor C F14, capacitor C F15, capacitor C F16 ' is received network B 12P, i.e. the 13rd batteries negative pole; 2 pin of capacitor C F13 are received 2 pin of resistance R F13, receive simultaneously 14 pin, 2 pin of processing unit U12,14 pin of processing unit U12,2 pin short circuits; Resistance R F13 the 1st pin connects the B13P network; 2 pin of capacitor C F14 are received 2 pin of resistance R F14, receive simultaneously 11 pin, 5 pin of processing unit U12,11 pin of processing unit U12,5 pin short circuits; Resistance R F14 the 1st pin connects the B14P network; 2 pin of capacitor C F15 are received 2 pin of resistance R F15, receive simultaneously 12 pin, 4 pin of processing unit U12,12 pin of processing unit U12,4 pin short circuits; Resistance R F15 the 1st pin connects the B15P network; Resistance R F12 ' the 1st pin ground connection, 2 pin connect 15 pin of processing unit U12; 1 pin of the 1 pin connecting resistance RF16 of processing unit U12,2 pin of resistance R F16 meet network B 16P; 2 pin of capacitor C F16 are received 1 pin of RF16.
4. lithium battery voltage sample circuit according to claim 3 is characterized in that:
Described sampling channel handover module and level mobile module comprise processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12, amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17, and some resistance, some electric capacity;
Processing unit U8, processing unit U9, processing unit U10, processing unit U11, processing unit U12 form electronic switch, connected mode according to the steering logic of electronic switch, each switching all accesses the positive and negative polarities of 1 batteries, and the output of electronic switch connects the input of the subtracter of amplifier composition, the common level that produces to deduct battery cascade; Accomplish moving down of high-end level;
Form 5 grades of cascade walking circuits, i.e. Pyatyi subtraction circuit by amplifier U13, amplifier U14, amplifier U15, amplifier U16, amplifier U17; All level can be moved to the difference voltage of the amplifier of corresponding stage be that corresponding single battery is to the voltage of V-to every one-level from high to low, then pass to next stage, and the minuend of next stage subtracter is connected to the V-end of upper level, and the V-that so just the voltage of upper level is moved down into the corresponding levels is the voltage of datum; Move down step by step the single battery voltage sample of just having accomplished the series connection of 16 batteries.
5. lithium battery voltage sample circuit according to claim 4 is characterized in that:
In described sampling channel handover module and the level mobile module, 1 pin of resistance R 56 connects amplifier U13 output pin, and 2 pin of resistance R 56 and 1 pin of resistance R 54 connect amplifier U13 reverse input end; 2 pin of resistance R 54 and 1 pin of capacitor C 18 connect 13 pin of processing unit U8; 2 pin of resistance R 55 and 2 pin of capacitor C 18 connect 3 pin of processing unit U8; 1 pin of resistance R 55 and 2 pin of resistance R 57 connect the positive input of processing unit U13; 1 pin of resistance R 57 connects 7 pin, 8 pin of processing unit U8;
1 pin of resistance R 67 connects amplifier U14 output pin, and 2 pin of resistance R 67 and 1 pin of resistance R 66 connect amplifier U14 reverse input end; 2 pin of resistance R 66 and 1 pin of capacitor C 20 connect 13 pin of processing unit U9; 2 pin of resistance R 68 and 2 pin of capacitor C 20 connect 3 pin of processing unit U9; 1 pin of resistance R 68 and 2 pin of resistance R 69 connect the positive input of amplifier U14; 1 pin of resistance R 69 connects 7 pin, 8 pin of processing unit U9;
1 pin of resistance R 79 connects amplifier U15 output pin, and 2 pin of resistance R 79 and 1 pin of resistance R 78 connect amplifier U15 reverse input end; 2 pin of R78 and 1 pin of capacitor C 22 connect 13 pin of processing unit U10; 2 pin of resistance R 80 and 2 pin of capacitor C 22 connect 3 pin of processing unit U10; 1 pin of resistance R 80 and 2 pin of resistance R 81 connect the positive input of amplifier U15; 1 pin of resistance R 81 connects 7 pin, 8 pin of processing unit U10;
1 pin of resistance R 91 connects amplifier U16 output pin, and 2 pin of resistance R 91 and 1 pin of resistance R 90 connect amplifier U16 reverse input end; 2 pin of resistance R 90 and 1 pin of capacitor C 24 connect 13 pin of processing unit U11; 2 pin of resistance R 92 and 2 pin of capacitor C 24 connect 3 pin of processing unit U11; 1 pin of resistance R 93 and 2 pin of resistance R 92 connect the positive input of amplifier U16; 1 pin of resistance R 93 connects 7 pin, 8 pin of processing unit U11;
1 pin of resistance R 103 connects amplifier U17 output pin, and 2 pin of resistance R 103 and 1 pin of resistance R 102 connect amplifier U17 reverse input end; 2 pin of resistance R 102 and 1 pin of capacitor C 26 connect 13 pin of processing unit U12; 2 pin of resistance R 104 and 2 pin of capacitor C 26 connect 3 pin of processing unit U12; 1 pin of resistance R 105 and 2 pin of resistance R 104 connect the positive input of amplifier U17; 1 pin of resistance R 105 connects 7 pin, 8 pin of processing unit U12;
1 pin of resistance R 13 connects the output of amplifier U13, the output of 2 pin sampled voltages; 1 pin ground connection of capacitor C 1,2 pin of 2 pin connecting resistance R13.
6. lithium battery voltage sample circuit according to claim 5 is characterized in that:
Described passage switching controls module comprises some triodes, some resistance, some diodes;
1 pin of resistance R 62 connects 6 pin of processing unit U8, and 2 pin of resistance R 62 and 1 pin of resistance R 63 connect the anode of diode D14; 2 pin of 2 pin of resistance R 63,2 pin of resistance R 59 and resistance R 61 meet network VDD1; 1 pin of resistance R 59 and 2 pin of resistance R 58 are received network A 1, and 1 pin of resistance R 58 connects 10 pin of processing unit U8; 1 pin of resistance R 60 and 2 pin of resistance R 61 are received network B 1; 1 pin of resistance R 60 connects 9 pin of processing unit U8; The c utmost point of triode Q1 connects network B 1, the e utmost point ground connection of triode Q1; 1 pin ground connection of resistance R 14,1 pin of resistance R 1 meets MCU_IO1; 2 pin of resistance R 1 and 1 pin of resistance R 14 connect the b utmost point of triode Q1; The c utmost point of triode Q2 connects network A 1, the e utmost point ground connection of triode Q2; 1 pin ground connection of resistance R 15,1 pin of resistance R 2 meets MCU_IO2; 2 pin of resistance R 2 and 1 pin of resistance R 15 connect the b utmost point of triode Q1;
1 pin of resistance R 74 connects 6 pin of processing unit U9, and 2 pin of resistance R 74 and 1 pin of resistance R 75 connect the anode of diode D15; 2 pin of 2 pin of resistance R 75,2 pin of resistance R 71 and resistance R 73 meet network VDD2; 1 pin of resistance R 71 and 2 pin of resistance R 70 are received network A 2, and 1 pin of resistance R 70 connects 10 pin of processing unit U9; 1 pin of resistance R 73 and 2 pin of resistance R 72 are received network B 2; 1 pin of resistance R 72 connects 9 pin of processing unit U9; The c utmost point of triode Q3 connects network B 2, the e utmost point ground connection of triode Q3; 1 pin ground connection of resistance R 16,1 pin of resistance R 3 meets MCU_IO3; 2 pin of resistance R 3 and 1 pin of resistance R 16 connect the b utmost point of triode Q3; The c utmost point of triode Q4 connects network A 2, the e utmost point ground connection of triode Q4; 1 pin ground connection of resistance R 17,1 pin of resistance R 4 meets MCU IO4; 2 pin of resistance R 4 and 1 pin of resistance R 17 connect the b utmost point of triode Q4;
1 pin of resistance R 86 connects 6 pin of processing unit U10, and 2 pin of resistance R 86 and 1 pin of resistance R 87 connect the anode of diode D16; 2 pin of 2 pin of resistance R 87,2 pin of resistance R 83 and resistance R 85 meet network VDD3; 1 pin of resistance R 83 and 2 pin of resistance R 82 are received network A 3; 1 pin of resistance R 82 connects 10 pin of processing unit U10; 1 pin of resistance R 85 and 2 pin of resistance R 84 are received network B 3; 1 pin of resistance R 84 connects 9 pin of processing unit U10; The c utmost point of triode Q5 connects network B 3, the e utmost point ground connection of triode Q5; 1 pin ground connection of resistance R 18,1 pin of resistance R 5 meets MCU_IO5; 2 pin of resistance R 5 and 1 pin of resistance R 18 connect the b utmost point of triode Q5; The c utmost point of triode Q6 connects network A 3, the e utmost point ground connection of triode Q6; 1 pin ground connection of resistance R 19,1 pin of resistance R 6 meets MCU_IO6; 2 pin of resistance R 6 and 1 pin of resistance R 19 connect the b utmost point of triode Q6;
1 pin of resistance R 98 connects 6 pin of processing unit U11, and 2 pin of resistance R 98 and 1 pin of resistance R 99 connect the anode of diode D17; 2 pin of 2 pin of resistance R 99,2 pin of resistance R 95 and resistance R 97 meet network VDD4; 1 pin of resistance R 95 and 2 pin of resistance R 94 are received network A 4, and 1 pin of resistance R 94 connects 10 pin of processing unit U11; 1 pin of resistance R 97 and 2 pin of resistance R 96 are received network B 4; 1 pin of resistance R 96 connects 9 pin of processing unit U11; The c utmost point of triode Q7 connects network B 4, the e utmost point ground connection of triode Q7; 1 pin ground connection of resistance R 20,1 pin of resistance R 7 meets MCU_IO7; 2 pin of resistance R 7 and 1 pin of resistance R 20 connect the b utmost point of diode Q7; The c utmost point of triode Q8 connects network A 4, the e utmost point ground connection of triode Q8; 1 pin ground connection of resistance R 21,1 pin of resistance R 6 meets MCU_IO8; 2 pin of resistance R 8 and 1 pin of resistance R 21 connect the b utmost point of triode Q8; 1 pin of resistance R 110 connects 6 pin of processing unit U12, and 2 pin of resistance R 110 and 1 pin of resistance R 111 connect the anode of diode D18; 2 pin of 2 pin of R111,2 pin of resistance R 107 and resistance R 109 meet network VDD4; 1 pin of resistance R 107 and 2 pin of resistance R 106 are received network A 5, and 1 pin of resistance R 106 connects 10 pin of processing unit U12; 1 pin of resistance R 109 and 2 pin of resistance R 108 are received network B 5; 1 pin of resistance R 108 connects 9 pin of processing unit U12; The c utmost point of triode Q9 connects network B 5, the e utmost point ground connection of triode Q9; 1 pin ground connection of resistance R 22,1 pin of resistance R 9 meets MCU IO9; 2 pin of resistance R 9 and 1 pin of resistance R 22 connect the b utmost point of triode Q9; The c utmost point of triode Q10 connects network A 5, triode Q10e utmost point ground connection; 1 pin ground connection of resistance R 23,1 pin of resistance R 10 meets MCU_IO10; 2 pin of resistance R 10 and 1 pin of resistance R 23 connect the b utmost point of triode Q8;
The negative electrode of diode D14, diode D15, diode D16, diode D17, diode D18 connects the c utmost point of triode Q18, the e utmost point ground connection of triode Q16, and 1 pin ground connection of resistance R 24,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q16; 1 pin of resistance R 11 meets MCU_IO11.
7. lithium battery voltage sample circuit according to claim 6 is characterized in that:
Described power supply and power control circuit comprise some stabilivolts, resistance, electric capacity, triode, diode;
1 pin of resistance R V1 meets network B 4P, and namely the 4th batteries is anodal, and 2 pin of resistance R V1 meet network VDD1, stabilivolt ZV1 negative electrode network VDD1,1 pin of capacitor C V1 and the plus earth of stabilivolt ZV1,2 pin of resistance R 65 meet VDD1, and 1 pin connects the b utmost point of triode Q11, simultaneously 2 pin of connecting resistance R64; 1 pin of resistance R 64 connects the anode of diode D9, and the negative electrode of diode D9 meets network OPV, and the e utmost point of triode Q11 meets VDD1, the c utmost point of triode Q11 connects 2 pin of capacitor C 19, connect simultaneously the V+ pin of processing unit U13,1 pin ground connection of capacitor C 19,16 pin of processing unit U8 meet VDD1; 7 pin of processing unit U8,8 pin ground connection;
1 pin of resistance R V2 meets network B 7P, and namely the 7th batteries is anodal, and 2 pin of resistance R V2 meet network VDD2, stabilivolt ZV2 negative electrode network VDD2, and 1 pin of capacitor C V2 and the anode of stabilivolt ZV2 meet network B 3P; 2 pin of resistance R 77 meet VDD2, and 1 pin connects the b utmost point of triode Q12, simultaneously 2 pin of connecting resistance R76; 1 pin of resistance R 76 connects the anode of diode D10, and the negative electrode of diode D10 meets network OPV, and the e utmost point of triode Q12 meets VDD2, the c utmost point of triode Q12 connects 2 pin of capacitor C 21, connect simultaneously the V+ pin of processing unit U14,1 pin of capacitor C 21 meets B3P, and 16 pin of processing unit U9 meet VDD2; 7 pin, 8 pin of processing unit U9 meet network B 3P;
1 pin of resistance R V3 meets network B 10P, and namely the 10th batteries is anodal, 2 pin of resistance R V3 meet network VDD3, stabilivolt ZV3 negative electrode network VDD3,1 pin of capacitor C V3 and the anode of stabilivolt ZV3 meet network B 6P, 2 pin of resistance R 89 meet VDD3,1 pin connects the b utmost point of triode Q13, simultaneously 2 pin of connecting resistance R88; 1 pin of resistance R 88 connects the anode of diode D11, and the negative electrode of diode D11 meets network OPV, and the e utmost point of triode Q13 meets VDD3, and the c utmost point connects 2 pin of C23, connects simultaneously the V+ pin of processing unit U15, and 1 pin of capacitor C 23 meets B6P, and 16 pin of processing unit U10 meet VDD3; 7 pin, 8 pin of processing unit U10 meet network B 6P;
1 pin of resistance R V4 meets network B 13P, and namely the 13rd batteries is anodal, 2 pin of resistance R V4 meet network VDD4, stabilivolt ZV4 negative electrode network VDD4,1 pin of capacitor C V4 and the anode of stabilivolt ZV4 meet network B 9P, 2 pin of resistance R 101 meet VDD4,1 pin connects the b utmost point of triode Q14, simultaneously 2 pin of connecting resistance R100; 1 pin of resistance R 100 connects the anode of diode D12, and the negative electrode of diode D12 meets network OPV, and the e utmost point of triode Q14 meets VDD4, and the c utmost point connects 2 pin of C25, connects simultaneously the V+ pin of processing unit U16, and 1 pin of capacitor C 25 meets B9P, and 16 pin of processing unit U11 meet VDD4; 7 pin, 8 pin of processing unit U11 meet network B 9P;
1 pin of resistance R V5 meets network B 16P, and namely the 16th batteries is anodal, 2 pin of resistance R V5 meet network VDD5, stabilivolt ZV5 negative electrode network VDD5,1 pin of capacitor C V5 and the anode of stabilivolt ZV5 meet network B 12P, 2 pin of resistance R 113 meet VDD5,1 pin connects the b utmost point of triode Q15, simultaneously 2 pin of connecting resistance R112; 1 pin of resistance R 112 connects the anode of diode D15, and the negative electrode of diode D15 meets network OPV, and the e utmost point of triode Q15 meets VDD5, the c utmost point connects 2 pin of capacitor C 27, connect simultaneously the V+ pin of processing unit U17,1 pin of capacitor C 27 meets B12P, and 16 pin of processing unit U12 meet VDD5; 7 pin, 8 pin of processing unit U12 meet network B 12P;
The c utmost point of triode Q17 meets network OPV, the e utmost point ground connection of triode Q17, and 1 pin ground connection of resistance R 25,2 pin that 2 pin are connected with resistance R are connected with the b utmost point of triode Q17; 1 pin of resistance R 12 meets MCU_IO12.
CN 201220199221 2012-05-03 2012-05-03 Voltage sampling circuit of lithium battery Expired - Lifetime CN202815074U (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102636681A (en) * 2012-05-03 2012-08-15 上海博强微电子有限公司 Voltage sampling circuit of lithium battery
CN106505261A (en) * 2016-11-30 2017-03-15 北京新能源汽车股份有限公司 A kind of voltage sample control circuit of battery modules and control method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102636681A (en) * 2012-05-03 2012-08-15 上海博强微电子有限公司 Voltage sampling circuit of lithium battery
CN106505261A (en) * 2016-11-30 2017-03-15 北京新能源汽车股份有限公司 A kind of voltage sample control circuit of battery modules and control method
CN106505261B (en) * 2016-11-30 2019-03-01 北京新能源汽车股份有限公司 A kind of the voltage sample control circuit and control method of battery modules

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