CN202737818U - Automatic gain control system - Google Patents

Automatic gain control system Download PDF

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Publication number
CN202737818U
CN202737818U CN 201220381907 CN201220381907U CN202737818U CN 202737818 U CN202737818 U CN 202737818U CN 201220381907 CN201220381907 CN 201220381907 CN 201220381907 U CN201220381907 U CN 201220381907U CN 202737818 U CN202737818 U CN 202737818U
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China
Prior art keywords
attenuator
automatic gain
gain control
digital
prime
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Expired - Lifetime
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CN 201220381907
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Chinese (zh)
Inventor
郝禄国
杨建坡
何仕杰
余嘉池
杨舜君
曾文彬
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Allwin Telecommunication Co Ltd
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Allwin Telecommunication Co Ltd
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Priority to CN 201220381907 priority Critical patent/CN202737818U/en
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Publication of CN202737818U publication Critical patent/CN202737818U/en
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Abstract

The present utility model discloses an automatic gain control system. The system comprises a preceding level attenuator, an input end of the preceding level attenuator is connected with input signals, an output end is successively connected with an analog-to-digital converter, a digital down conversion module, an digital analog converter and a backward level attenuator; the digital down conversion module is also connected with an MCU, and first and second output ends of the MCU are respectively connected with the preceding level attenuator and the backward level attenuator. By adopting the automatic gain control system, gain can be adjusted according to input signals to ensure that output signals are largest and the covering effect is best, and stable performance of an interference offsetting system can be guaranteed. The automatic gain control system has excellent performance and can be widely applied to the communication industry.

Description

A kind of AGC (automatic gain control) system
Technical field
The utility model relates to a kind of signal process control system of communication system, particularly relates to a kind of AGC (automatic gain control) system of wireless communication system.
Background technology
In wireless communication system, the covering of wireless network can exist weak signal area or blind area unavoidably, and the repeater is effective arbitrary way that wireless communication system covers, it carries out filtering to the ground digital signal, signal is amplified, can effectively strengthen signal, reduce the existence of weak signal area or blind area.But there is the self-oscillation problem in the repeater, and interference is caused in the repeater, has had a strong impact on the transmission of signal, and self-oscillation also may burn out the repeater for a long time.The appearance of interference cancellation systems (Interference Cancellation System) is exactly in order to solve the self-excitation interference problem of repeater, to improve system gain.Yet, in mobile communication system, owing to being subject to the impact of the factors such as channel fading, interference, causing the variation of input signal of receiving system a lot, and then cause the interference cancellation systems effect undesirable, can not stablize anti-interference.
The utility model content
In order to solve above-mentioned technical problem, the utility model provides a kind of AGC (automatic gain control) system that can gain, make the interference cancellation systems steady operation according to the size adjustment of input signal.
The utility model provides a kind of AGC (automatic gain control) system, comprising:
A kind of AGC (automatic gain control) system comprises the prime attenuator, the input termination input signal of described prime attenuator, and output is connection mode number converter, Digital Down Converter Module, digital to analog converter, rear class attenuator successively; Described Digital Down Converter Module also is connected with a MCU, and first, second output of MCU is connected with prime attenuator, rear class attenuator respectively.
Further, described prime attenuator, rear class attenuator adopt same design, are numerical-control attenuator.
Further, described Digital Down Converter Module comprises FPGA.
The beneficial effects of the utility model are: a kind of AGC (automatic gain control) system of the present utility model, and can make output signal maximum according to the size adjustment gain of input signal, coverage effect is best, has guaranteed the stability of interference cancellation systems.
Description of drawings
The utility model is described in further detail below in conjunction with drawings and Examples.
Fig. 1 is the structured flowchart of a kind of AGC (automatic gain control) system of the present invention;
Fig. 2 is the structured flowchart of the embodiment of a kind of AGC (automatic gain control) system of the present invention.
Embodiment
For the ease of following description, at first, provide the description of some basic terms:
ADC (Analog-to-Digital Converter): analog to digital converter;
AGC(automatic gain control): automatic gain control;
DAC (Digital-to-Analog Converter): digital to analog converter;
FPGA (Field Programmable Gate Array): field programmable gate array;
ICS (Interference Cancellation System): interference cancellation systems;
IQ(IN phase Orthogonal): inphase quadrature;
MCU(Micro Controller Unit): MCU Microprocessor Control Unit.
With reference to Fig. 1, the utility model provides a kind of AGC (automatic gain control) system, comprise prime attenuator 1, the input termination input signal of described prime attenuator 1, output is connection mode number converter 2, Digital Down Converter Module 3, digital to analog converter 4, rear class attenuator 5 successively; Described Digital Down Converter Module 3 also is connected with a MCU 6, and first, second output of MCU 6 is connected with prime attenuator 1, rear class attenuator 5 respectively.
Further, described prime attenuator 1, rear class attenuator 5 adopt same design, are numerical-control attenuator.
Further, described Digital Down Converter Module 3 comprises FPGA.
The workflow of a kind of AGC (automatic gain control) system of the present utility model comprises:
Prime attenuation step, 1 pair of input signal of prime attenuator are carried out the prime decay, and output to analog to digital converter 2;
The A/D switch process, analog to digital converter 2 receives the input signal after the prime decay, and is converted into digital signal, outputs to Digital Down Converter Module 3;
The Digital Down Convert step, Digital Down Converter Module 3 receives described digital signal, and it is carried out down-conversion, is converted into the IQ signal, calculates the performance number of digital signal, and outputs to digital to analog converter 4 and MCU 6;
The D/A switch process, digital to analog converter 4 receives described performance number, and is converted into analog signal, outputs to rear class attenuator 5;
MCU controls step, and MCU 6 receives described performance number, according to the pad value of described performance number control prime attenuator 1 and rear class attenuator 5;
The rear class attenuation step, rear class attenuator 5 receives described analog signal, and it is carried out rear class decay and output.
Below in conjunction with Fig. 2, the utility model is described further, here, prime attenuator 1 adopts prime numerical-control attenuator 12, and the rear class attenuator adopts rear class numerical-control attenuator 52, and Digital Down Converter Module 3 adopts FPGA 32.
Input signal through 12 decay of prime numerical-control attenuator after, analog to digital converter 2 is sampled to it, changes into digital signal; 32 pairs of these digital signals of FPGA are carried out down-conversion, are converted into the IQ signal, calculate the performance number of input signal; And then by digital to analog converter 4, this performance number is converted into analog signal, through 52 decay of rear class numerical-control attenuator and output.The pad value of MCU 6 control prime numerical-control attenuators 12 and rear class numerical-control attenuator 52 reaches optimum efficiency, guarantees the quality of signal.
It mainly is to comprise the two large divisions that MCU 6 controls are processed: the situation of the situation of interference cancellation systems self-excitation and interference cancellation systems no-self excitation.
The situation of interference cancellation systems self-excitation: in this case, the echo of output signal has seriously interfered with the input signal of system, and the power of FPGA 32 statistics input signals is inaccurate, at this moment needs output signal is turned off; After turning off output signal, again add up the signal of FPGA 32 inputs, calculate the performance number of input signal, MCU 6 is according to the performance number of this input signal, remove to adjust prime numerical-control attenuator 12, so that signal reaches the optimum value (because the interference cancellation systems algorithm effect can reach best like this) of AD sampling as far as possible; After having adjusted prime numerical-control attenuator 12, rear class numerical-control attenuator 52 being set to the maximum that decays, again with the switch opens of output signal, is farthest to guarantee the whole system no-self excitation like this; After the output signal, FPGA 32 modules are calculated the separation number that present interference cancellation systems module is finished, the maximum isolation value that can reach in conjunction with self-interference bucking-out system module again, how many gains calculate system output signal also has to increase, then adjust rear class numerical-control attenuator 52, so that output power signal is maximum, coverage effect is best.
The situation of interference cancellation systems no-self excitation: in this case, because interference cancellation systems is with Echo Cancellation, the echo of output signal just can't interfere with input signal so, the signal of statistics FPGA 32 inputs, calculate the performance number of input signal, at this moment, MCU 6 is set to the maximum attenuation value with rear class numerical-control attenuator 52, in order to guarantee when changing the value of prime numerical-control attenuator 12 like this, the situation of self-excitation does not appear in whole system as far as possible, then according to the performance number of input signal statistics, adjust prime numerical-control attenuator 12, so that signal reaches the optimum value (because the interference cancellation systems algorithm effect can reach best like this) of AD sampling as far as possible; After having adjusted prime numerical-control attenuator 12, FPGA 32 modules are calculated the separation number that present interference cancellation systems module is finished, the maximum isolation value that can reach in conjunction with self-interference bucking-out system module again, how many gains calculate system output signal also has to increase, then adjust rear class numerical-control attenuator 52, so that output power signal is maximum, coverage effect is best.
More than be that better enforcement of the present utility model is specified, but the utility model is created and is not limited to described embodiment, those of ordinary skill in the art also can make all equivalent variations or replacement under the prerequisite of the utility model spirit, the modification that these are equal to or replacement all are included in the application's claim limited range.

Claims (3)

1. AGC (automatic gain control) system, it is characterized in that, comprise prime attenuator (1), the input termination input signal of described prime attenuator (1), output be connection mode number converter (2), Digital Down Converter Module (3), digital to analog converter (4), rear class attenuator (5) successively; Described Digital Down Converter Module (3) also is connected with a MCU(6), first, second output MCU(6) is connected with prime attenuator (1), rear class attenuator (5) respectively.
2. a kind of AGC (automatic gain control) system according to claim 1 is characterized in that: described prime attenuator (1), rear class attenuator (5) adopt same design, are numerical-control attenuator.
3. a kind of AGC (automatic gain control) system according to claim 1, it is characterized in that: described Digital Down Converter Module (3) comprises FPGA.
CN 201220381907 2012-08-02 2012-08-02 Automatic gain control system Expired - Lifetime CN202737818U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102832896A (en) * 2012-08-02 2012-12-19 奥维通信股份有限公司 System and method for automatic gain control

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102832896A (en) * 2012-08-02 2012-12-19 奥维通信股份有限公司 System and method for automatic gain control

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Granted publication date: 20130213