CN202713372U - RS-485 to Ethernet protocol converter based on half-duplex operation mode - Google Patents
RS-485 to Ethernet protocol converter based on half-duplex operation mode Download PDFInfo
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- CN202713372U CN202713372U CN 201220399805 CN201220399805U CN202713372U CN 202713372 U CN202713372 U CN 202713372U CN 201220399805 CN201220399805 CN 201220399805 CN 201220399805 U CN201220399805 U CN 201220399805U CN 202713372 U CN202713372 U CN 202713372U
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Abstract
The utility model discloses an RS-485 to Ethernet protocol converter based on a half-duplex operation mode. The converter comprises a CPU minimum system circuit, and a front-end computer interface circuit, an Ethernet interface circuit, a memory circuit, a real-time clock circuit and a man-machine interface part which are respectively and electrically connected with the CPU minimum system circuit, wherein the front-end computer interface circuit adopts an MAX 3483 chip, the RE interface and DE interface of the MAX3483 chip are interconnected, and an A port of the MAX3483 chip is electrically connected with a resistor. The protocol converter provided by the utility model can make the network connection stable, is not easy to disconnect, and can save the wiring cost.
Description
Technical field
The utility model relates to a kind of protocol converter, is specifically related to a kind of RS-485 based on the half-duplex mode of operation and turns the Ethernet protocol transducer.
Background technology
Protocol converter (protocol converter) also is gateway, and it can make to be in adopts the main frame of different upper-layer protocols still to work in coordination on the communication network, finish various Distributed Application.Its main purpose is in order to prolong the transmission range of the signals such as ethernet signal, is a kind of network access equipment.Data have two kinds of mode of operations in the middle of transmission course, a kind of is the half-duplex mode of operation, and a kind of is the full duplex mode of operation.Under the half-duplex mode of operation, signal can only one-way transmission.Although in the continuous progress along with technology, the half-duplex meeting steps down from the stage of history gradually.But when reality is used, generally do not need communicating pair not only to send but also receive simultaneously.And when using the full duplex mode of operation, network connection is unstable sometimes, the honest appearance of problem such as go offline.
The utility model content
The utility model has overcome the deficiencies in the prior art, provides a kind of RS-485 based on the half-duplex mode of operation to turn the Ethernet protocol transducer, and this transducer network connection is stable, is difficult for going offline.
For solving above-mentioned technical problem, the utility model by the following technical solutions:
A kind of RS-485 based on the half-duplex mode of operation turns the Ethernet protocol transducer, it comprises CPU minimum system circuit and the front-end processor interface circuit, ethernet interface circuit, memory circuitry, real time clock circuit, the man-machine interface part that are electrical connected with CPU minimum system circuit respectively, described front-end processor interface circuit adopts the MAX3483 chip, the RE of MAX3483 chip links to each other with the DE interface, and the A port of MAX3483 is electrically connected with a resistance.The front-end processor interface bus is the RS-485 communication bus, has adopted MAX3483 to design.Directly and the serial communication port interface of single-chip microcomputer, RE and DE are respectively and receive and the enable pin of transmission, and RE and DE are connected together, and consist of semiduplex communication mode.Because the transmission range of RS-485 bus is distant, cause easily the reflection of signal faster the time in transmission speed, for this reason, increased a resistance as special build-out resistor at its A port, in case the reflection of stop signal.Real time clock circuit adopts DS1302 to design.
Further technical scheme is:
Also be connected with clock circuit and reset circuit on the described CPU minimum system circuit.Clock circuit and reset circuit are to make the CPU minimum system necessary circuit module that works.
Described ethernet interface circuit adopts the CS8900A chip controls, and adopts the I/O working method.Working method adopts the I/O mode, in order to utilize the I/O interface of 8-bit data/address bus and single-chip microcomputer.
Described memory circuitry is eeprom circuit, and adopts the control of AT25080 chip carrier.Memory circuit is the important module of whole operating circuit, is used for the important parameter of storage system, such as the IP address of system, and this equipment address on bus etc. during RS-485 communication.
Described man-machine interface partly comprises LCD display, keyboard, LED light.
Compared with prior art, the beneficial effects of the utility model are:
1, the utility model adopts the half-duplex mode of operation, makes the stable connection of network, is difficult for going offline.
2, the utility model only needs 4 lines when network layout, has saved wiring cost.
3, the utility model has increased a resistance as special build-out resistor at the A of MAX3483 chip port, can effectively prevent the reflection of stop signal.
Description of drawings
Below in conjunction with the drawings and specific embodiments the utility model is described in further detail.
Fig. 1 is structural representation of the present utility model.
Fig. 2 is the circuit theory diagrams of the utility model front-end processor interface circuit.
Fig. 3 is the circuit theory diagrams of the utility model ethernet interface circuit.
Fig. 4 is the circuit theory diagrams of the utility model memory circuitry.
Fig. 5 is the circuit theory diagrams of the utility model real time clock circuit.
Embodiment
Below in conjunction with accompanying drawing the utility model is further described.Execution mode of the present utility model includes but not limited to the following example.
Embodiment
Turn the Ethernet protocol transducer such as Fig. 1 to a kind of RS-485 based on the half-duplex mode of operation shown in Figure 4, it comprises CPU minimum system circuit and the front-end processor interface circuit, ethernet interface circuit, memory circuitry, real time clock circuit, the man-machine interface part that are electrical connected with CPU minimum system circuit respectively, the front-end processor interface circuit adopts the MAX3483 chip, the RE of MAX3483 chip links to each other with the DE interface, and the MAX3483A port is electrically connected with a resistance.CPU minimum system circuit Shanghai is connected with clock circuit and reset circuit.Ethernet interface circuit adopts the CS8900A chip controls, and adopts the I/O working method.Memory circuitry is eeprom circuit, and adopts the control of AT25080 chip carrier.Man-machine interface partly comprises LCD display, keyboard, LED light.
According to the above embodiments, can well finish the utility model.
Be as mentioned above embodiment of the present utility model.The utility model is not limited to above-mentioned execution mode, and anyone should learn the structural change of making under enlightenment of the present utility model, every with the utlity model has identical or close technical scheme, all fall within the protection range of the present utility model.
Claims (5)
1. the RS-485 based on the half-duplex mode of operation turns the Ethernet protocol transducer, it is characterized in that: it comprises CPU minimum system circuit and the front-end processor interface circuit, ethernet interface circuit, memory circuitry, real time clock circuit, the man-machine interface part that are electrical connected with CPU minimum system circuit respectively, described front-end processor interface circuit adopts the MAX3483 chip, the RE of MAX3483 chip links to each other with the DE interface, and the MAX3483A port is electrically connected with a resistance.
2. the RS-485 based on the half-duplex mode of operation according to claim 1 turns the Ethernet protocol transducer, it is characterized in that: also be connected with clock circuit and reset circuit on the described CPU minimum system circuit.
3. the RS-485 based on the half-duplex mode of operation according to claim 1 turns the Ethernet protocol transducer, it is characterized in that: described ethernet interface circuit adopts the CS8900A chip controls, and adopts the I/O working method.
4. the RS-485 based on the half-duplex mode of operation according to claim 1 turns the Ethernet protocol transducer, it is characterized in that: described memory circuitry is eeprom circuit, and adopts the control of AT25080 chip carrier.
5. the RS-485 based on the half-duplex mode of operation according to claim 1 turns the Ethernet protocol transducer, it is characterized in that: described man-machine interface partly comprises LCD display, keyboard, LED light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220399805 CN202713372U (en) | 2012-08-14 | 2012-08-14 | RS-485 to Ethernet protocol converter based on half-duplex operation mode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220399805 CN202713372U (en) | 2012-08-14 | 2012-08-14 | RS-485 to Ethernet protocol converter based on half-duplex operation mode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202713372U true CN202713372U (en) | 2013-01-30 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201220399805 Expired - Fee Related CN202713372U (en) | 2012-08-14 | 2012-08-14 | RS-485 to Ethernet protocol converter based on half-duplex operation mode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN202713372U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104243297A (en) * | 2014-10-16 | 2014-12-24 | 成都思迈科技发展有限责任公司 | Multi-service ethernet gateway system |
-
2012
- 2012-08-14 CN CN 201220399805 patent/CN202713372U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104243297A (en) * | 2014-10-16 | 2014-12-24 | 成都思迈科技发展有限责任公司 | Multi-service ethernet gateway system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130130 Termination date: 20130814 |